1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target streamer methods.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCELF.h"
21 #include "llvm/MC/MCSectionELF.h"
22 #include "llvm/MC/MCSubtargetInfo.h"
23 #include "llvm/MC/MCSymbol.h"
24 #include "llvm/Support/CommandLine.h"
25 #include "llvm/Support/ELF.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/FormattedStream.h"
31 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
32 : MCTargetStreamer(S), ModuleDirectiveAllowed(true) {
33 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
35 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
36 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
37 void MipsTargetStreamer::emitDirectiveSetMips16() {}
38 void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); }
39 void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); }
40 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
41 void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); }
42 void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); }
43 void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); }
44 void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); }
45 void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); }
46 void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); }
47 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
48 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
49 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
50 void MipsTargetStreamer::emitDirectiveNaN2008() {}
51 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
52 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
53 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
54 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
55 unsigned ReturnReg) {}
56 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
57 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
59 void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) {
60 forbidModuleDirective();
62 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
63 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
64 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
65 void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
66 void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
67 void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
68 void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
69 void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }
70 void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); }
71 void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); }
72 void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); }
73 void MipsTargetStreamer::emitDirectiveSetPop() {}
74 void MipsTargetStreamer::emitDirectiveSetPush() {}
75 void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); }
76 void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
77 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
78 const MCSymbol &Sym, bool IsReg) {
80 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
82 if (!Enabled && !IsO32ABI)
83 report_fatal_error("+nooddspreg is only valid for O32");
86 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
87 formatted_raw_ostream &OS)
88 : MipsTargetStreamer(S), OS(OS) {}
90 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
91 OS << "\t.set\tmicromips\n";
92 forbidModuleDirective();
95 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
96 OS << "\t.set\tnomicromips\n";
97 forbidModuleDirective();
100 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
101 OS << "\t.set\tmips16\n";
102 forbidModuleDirective();
105 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
106 OS << "\t.set\tnomips16\n";
107 MipsTargetStreamer::emitDirectiveSetNoMips16();
110 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
111 OS << "\t.set\treorder\n";
112 MipsTargetStreamer::emitDirectiveSetReorder();
115 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
116 OS << "\t.set\tnoreorder\n";
117 forbidModuleDirective();
120 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
121 OS << "\t.set\tmacro\n";
122 MipsTargetStreamer::emitDirectiveSetMacro();
125 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
126 OS << "\t.set\tnomacro\n";
127 MipsTargetStreamer::emitDirectiveSetNoMacro();
130 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
131 OS << "\t.set\tmsa\n";
132 MipsTargetStreamer::emitDirectiveSetMsa();
135 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
136 OS << "\t.set\tnomsa\n";
137 MipsTargetStreamer::emitDirectiveSetNoMsa();
140 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
141 OS << "\t.set\tat\n";
142 MipsTargetStreamer::emitDirectiveSetAt();
145 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
146 OS << "\t.set\tnoat\n";
147 MipsTargetStreamer::emitDirectiveSetNoAt();
150 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
151 OS << "\t.end\t" << Name << '\n';
154 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
155 OS << "\t.ent\t" << Symbol.getName() << '\n';
158 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
160 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
162 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
163 OS << "\t.nan\tlegacy\n";
166 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
167 OS << "\t.option\tpic0\n";
170 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
171 OS << "\t.option\tpic2\n";
174 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
175 unsigned ReturnReg) {
177 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
179 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
182 void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) {
183 OS << "\t.set arch=" << Arch << "\n";
184 MipsTargetStreamer::emitDirectiveSetArch(Arch);
187 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
188 OS << "\t.set\tmips1\n";
189 MipsTargetStreamer::emitDirectiveSetMips1();
192 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
193 OS << "\t.set\tmips2\n";
194 MipsTargetStreamer::emitDirectiveSetMips2();
197 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
198 OS << "\t.set\tmips3\n";
199 MipsTargetStreamer::emitDirectiveSetMips3();
202 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
203 OS << "\t.set\tmips4\n";
204 MipsTargetStreamer::emitDirectiveSetMips4();
207 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
208 OS << "\t.set\tmips5\n";
209 MipsTargetStreamer::emitDirectiveSetMips5();
212 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
213 OS << "\t.set\tmips32\n";
214 MipsTargetStreamer::emitDirectiveSetMips32();
217 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
218 OS << "\t.set\tmips32r2\n";
219 MipsTargetStreamer::emitDirectiveSetMips32R2();
222 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
223 OS << "\t.set\tmips32r6\n";
224 MipsTargetStreamer::emitDirectiveSetMips32R6();
227 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
228 OS << "\t.set\tmips64\n";
229 MipsTargetStreamer::emitDirectiveSetMips64();
232 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
233 OS << "\t.set\tmips64r2\n";
234 MipsTargetStreamer::emitDirectiveSetMips64R2();
237 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
238 OS << "\t.set\tmips64r6\n";
239 MipsTargetStreamer::emitDirectiveSetMips64R6();
242 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
243 OS << "\t.set\tdsp\n";
244 MipsTargetStreamer::emitDirectiveSetDsp();
247 void MipsTargetAsmStreamer::emitDirectiveSetPop() { OS << "\t.set\tpop\n"; }
249 void MipsTargetAsmStreamer::emitDirectiveSetPush() { OS << "\t.set\tpush\n"; }
251 // Print a 32 bit hex number with all numbers.
252 static void printHex32(unsigned Value, raw_ostream &OS) {
254 for (int i = 7; i >= 0; i--)
255 OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
258 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
259 int CPUTopSavedRegOff) {
261 printHex32(CPUBitmask, OS);
262 OS << ',' << CPUTopSavedRegOff << '\n';
265 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
266 int FPUTopSavedRegOff) {
268 printHex32(FPUBitmask, OS);
269 OS << "," << FPUTopSavedRegOff << '\n';
272 void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
274 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
275 forbidModuleDirective();
278 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
282 OS << "\t.cpsetup\t$"
283 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
287 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
293 OS << Sym.getName() << "\n";
294 forbidModuleDirective();
297 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
298 MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
299 MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
301 StringRef ModuleValue;
302 OS << "\t.module\tfp=";
303 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
306 void MipsTargetAsmStreamer::emitDirectiveSetFp(
307 MipsABIFlagsSection::FpABIKind Value) {
308 StringRef ModuleValue;
310 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
313 void MipsTargetAsmStreamer::emitMipsAbiFlags() {
314 // No action required for text output.
317 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
319 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
321 OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
324 // This part is for ELF object output.
325 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
326 const MCSubtargetInfo &STI)
327 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
328 MCAssembler &MCA = getStreamer().getAssembler();
329 uint64_t Features = STI.getFeatureBits();
330 Triple T(STI.getTargetTriple());
331 Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
335 // Update e_header flags
339 if (Features & Mips::FeatureMips64r6)
340 EFlags |= ELF::EF_MIPS_ARCH_64R6;
341 else if (Features & Mips::FeatureMips64r2)
342 EFlags |= ELF::EF_MIPS_ARCH_64R2;
343 else if (Features & Mips::FeatureMips64)
344 EFlags |= ELF::EF_MIPS_ARCH_64;
345 else if (Features & Mips::FeatureMips5)
346 EFlags |= ELF::EF_MIPS_ARCH_5;
347 else if (Features & Mips::FeatureMips4)
348 EFlags |= ELF::EF_MIPS_ARCH_4;
349 else if (Features & Mips::FeatureMips3)
350 EFlags |= ELF::EF_MIPS_ARCH_3;
351 else if (Features & Mips::FeatureMips32r6)
352 EFlags |= ELF::EF_MIPS_ARCH_32R6;
353 else if (Features & Mips::FeatureMips32r2)
354 EFlags |= ELF::EF_MIPS_ARCH_32R2;
355 else if (Features & Mips::FeatureMips32)
356 EFlags |= ELF::EF_MIPS_ARCH_32;
357 else if (Features & Mips::FeatureMips2)
358 EFlags |= ELF::EF_MIPS_ARCH_2;
360 EFlags |= ELF::EF_MIPS_ARCH_1;
363 // N64 does not require any ABI bits.
364 if (Features & Mips::FeatureO32)
365 EFlags |= ELF::EF_MIPS_ABI_O32;
366 else if (Features & Mips::FeatureN32)
367 EFlags |= ELF::EF_MIPS_ABI2;
369 if (Features & Mips::FeatureGP64Bit) {
370 if (Features & Mips::FeatureO32)
371 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
372 } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
373 EFlags |= ELF::EF_MIPS_32BITMODE;
376 if (Features & Mips::FeatureNaN2008)
377 EFlags |= ELF::EF_MIPS_NAN2008;
379 // -mabicalls and -mplt are not implemented but we should act as if they were
381 EFlags |= ELF::EF_MIPS_CPIC;
382 if (Features & Mips::FeatureN64)
383 EFlags |= ELF::EF_MIPS_PIC;
385 MCA.setELFHeaderEFlags(EFlags);
388 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
389 if (!isMicroMipsEnabled())
391 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
392 uint8_t Type = MCELF::GetType(Data);
393 if (Type != ELF::STT_FUNC)
396 // The "other" values are stored in the last 6 bits of the second byte
397 // The traditional defines for STO values assume the full byte and thus
398 // the shift to pack it.
399 MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
402 void MipsTargetELFStreamer::finish() {
403 MCAssembler &MCA = getStreamer().getAssembler();
404 const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
406 // .bss, .text and .data are always at least 16-byte aligned.
407 MCSectionData &TextSectionData =
408 MCA.getOrCreateSectionData(*OFI.getTextSection());
409 MCSectionData &DataSectionData =
410 MCA.getOrCreateSectionData(*OFI.getDataSection());
411 MCSectionData &BSSSectionData =
412 MCA.getOrCreateSectionData(*OFI.getBSSSection());
414 TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
415 DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
416 BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
418 // Emit all the option records.
419 // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
421 MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
422 MEF.EmitMipsOptionRecords();
427 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
428 const MCExpr *Value) {
429 // If on rhs is micromips symbol then mark Symbol as microMips.
430 if (Value->getKind() != MCExpr::SymbolRef)
432 const MCSymbol &RhsSym =
433 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
434 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
435 uint8_t Type = MCELF::GetType(Data);
436 if ((Type != ELF::STT_FUNC) ||
437 !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
440 MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
441 // The "other" values are stored in the last 6 bits of the second byte.
442 // The traditional defines for STO values assume the full byte and thus
443 // the shift to pack it.
444 MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
447 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
448 return static_cast<MCELFStreamer &>(Streamer);
451 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
452 MicroMipsEnabled = true;
454 MCAssembler &MCA = getStreamer().getAssembler();
455 unsigned Flags = MCA.getELFHeaderEFlags();
456 Flags |= ELF::EF_MIPS_MICROMIPS;
457 MCA.setELFHeaderEFlags(Flags);
458 forbidModuleDirective();
461 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
462 MicroMipsEnabled = false;
463 forbidModuleDirective();
466 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
467 MCAssembler &MCA = getStreamer().getAssembler();
468 unsigned Flags = MCA.getELFHeaderEFlags();
469 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
470 MCA.setELFHeaderEFlags(Flags);
471 forbidModuleDirective();
474 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
475 MCAssembler &MCA = getStreamer().getAssembler();
476 unsigned Flags = MCA.getELFHeaderEFlags();
477 Flags |= ELF::EF_MIPS_NOREORDER;
478 MCA.setELFHeaderEFlags(Flags);
479 forbidModuleDirective();
482 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
483 MCAssembler &MCA = getStreamer().getAssembler();
484 MCContext &Context = MCA.getContext();
485 MCStreamer &OS = getStreamer();
487 const MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS,
488 ELF::SHF_ALLOC | ELF::SHT_REL,
489 SectionKind::getMetadata());
491 const MCSymbolRefExpr *ExprRef =
492 MCSymbolRefExpr::Create(Name, MCSymbolRefExpr::VK_None, Context);
494 MCSectionData &SecData = MCA.getOrCreateSectionData(*Sec);
495 SecData.setAlignment(4);
499 OS.SwitchSection(Sec);
501 OS.EmitValueImpl(ExprRef, 4);
503 OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
504 OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4); // reg_offset
506 OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
507 OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4); // fpreg_offset
509 OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
510 OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4); // frame_reg
511 OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4); // return_reg
513 // The .end directive marks the end of a procedure. Invalidate
514 // the information gathered up until this point.
515 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
520 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
521 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
524 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
525 MCAssembler &MCA = getStreamer().getAssembler();
526 unsigned Flags = MCA.getELFHeaderEFlags();
527 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
528 MCA.setELFHeaderEFlags(Flags);
531 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
532 MCAssembler &MCA = getStreamer().getAssembler();
533 unsigned Flags = MCA.getELFHeaderEFlags();
534 Flags |= ELF::EF_MIPS_NAN2008;
535 MCA.setELFHeaderEFlags(Flags);
538 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
539 MCAssembler &MCA = getStreamer().getAssembler();
540 unsigned Flags = MCA.getELFHeaderEFlags();
541 Flags &= ~ELF::EF_MIPS_NAN2008;
542 MCA.setELFHeaderEFlags(Flags);
545 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
546 MCAssembler &MCA = getStreamer().getAssembler();
547 unsigned Flags = MCA.getELFHeaderEFlags();
548 // This option overrides other PIC options like -KPIC.
550 Flags &= ~ELF::EF_MIPS_PIC;
551 MCA.setELFHeaderEFlags(Flags);
554 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
555 MCAssembler &MCA = getStreamer().getAssembler();
556 unsigned Flags = MCA.getELFHeaderEFlags();
558 // NOTE: We are following the GAS behaviour here which means the directive
559 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
560 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
561 // EF_MIPS_CPIC to be mutually exclusive.
562 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
563 MCA.setELFHeaderEFlags(Flags);
566 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
567 unsigned ReturnReg_) {
568 MCContext &Context = getStreamer().getAssembler().getContext();
569 const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
572 FrameReg = RegInfo->getEncodingValue(StackReg);
573 FrameOffset = StackSize;
574 ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
577 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
578 int CPUTopSavedRegOff) {
580 GPRBitMask = CPUBitmask;
581 GPROffset = CPUTopSavedRegOff;
584 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
585 int FPUTopSavedRegOff) {
587 FPRBitMask = FPUBitmask;
588 FPROffset = FPUTopSavedRegOff;
591 void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
593 // This directive expands to:
594 // lui $gp, %hi(_gp_disp)
595 // addui $gp, $gp, %lo(_gp_disp)
596 // addu $gp, $gp, $reg
597 // when support for position independent code is enabled.
598 if (!Pic || (isN32() || isN64()))
601 // There's a GNU extension controlled by -mno-shared that allows
602 // locally-binding symbols to be accessed using absolute addresses.
603 // This is currently not supported. When supported -mno-shared makes
604 // .cpload expand to:
605 // lui $gp, %hi(__gnu_local_gp)
606 // addiu $gp, $gp, %lo(__gnu_local_gp)
608 StringRef SymName("_gp_disp");
609 MCAssembler &MCA = getStreamer().getAssembler();
610 MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
611 MCA.getOrCreateSymbolData(*GP_Disp);
614 TmpInst.setOpcode(Mips::LUi);
615 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
616 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
617 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
618 TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
619 getStreamer().EmitInstruction(TmpInst, STI);
623 TmpInst.setOpcode(Mips::ADDiu);
624 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
625 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
626 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
627 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
628 TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
629 getStreamer().EmitInstruction(TmpInst, STI);
633 TmpInst.setOpcode(Mips::ADDu);
634 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
635 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
636 TmpInst.addOperand(MCOperand::CreateReg(RegNo));
637 getStreamer().EmitInstruction(TmpInst, STI);
639 forbidModuleDirective();
642 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
646 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
647 if (!Pic || !(isN32() || isN64()))
650 MCAssembler &MCA = getStreamer().getAssembler();
653 // Either store the old $gp in a register or on the stack
655 // move $save, $gpreg
656 Inst.setOpcode(Mips::DADDu);
657 Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
658 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
659 Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
661 // sd $gpreg, offset($sp)
662 Inst.setOpcode(Mips::SD);
663 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
664 Inst.addOperand(MCOperand::CreateReg(Mips::SP));
665 Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
667 getStreamer().EmitInstruction(Inst, STI);
670 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
671 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
672 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
673 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
674 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
675 Inst.setOpcode(Mips::LUi);
676 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
677 Inst.addOperand(MCOperand::CreateExpr(HiExpr));
678 getStreamer().EmitInstruction(Inst, STI);
681 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
682 Inst.setOpcode(Mips::ADDiu);
683 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
684 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
685 Inst.addOperand(MCOperand::CreateExpr(LoExpr));
686 getStreamer().EmitInstruction(Inst, STI);
689 // daddu $gp, $gp, $funcreg
690 Inst.setOpcode(Mips::DADDu);
691 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
692 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
693 Inst.addOperand(MCOperand::CreateReg(RegNo));
694 getStreamer().EmitInstruction(Inst, STI);
696 forbidModuleDirective();
699 void MipsTargetELFStreamer::emitMipsAbiFlags() {
700 MCAssembler &MCA = getStreamer().getAssembler();
701 MCContext &Context = MCA.getContext();
702 MCStreamer &OS = getStreamer();
703 const MCSectionELF *Sec =
704 Context.getELFSection(".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS,
705 ELF::SHF_ALLOC, SectionKind::getMetadata(), 24, "");
706 MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
707 ABIShndxSD.setAlignment(8);
708 OS.SwitchSection(Sec);
710 OS << ABIFlagsSection;
713 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
715 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
717 ABIFlagsSection.OddSPReg = Enabled;