1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target streamer methods.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCTargetDesc.h"
17 #include "MipsTargetObjectFile.h"
18 #include "MipsTargetStreamer.h"
19 #include "llvm/MC/MCContext.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MCSymbolELF.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/ELF.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/FormattedStream.h"
30 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
31 : MCTargetStreamer(S), ModuleDirectiveAllowed(true) {
32 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
34 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
35 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
36 void MipsTargetStreamer::emitDirectiveSetMips16() {}
37 void MipsTargetStreamer::emitDirectiveSetNoMips16() { forbidModuleDirective(); }
38 void MipsTargetStreamer::emitDirectiveSetReorder() { forbidModuleDirective(); }
39 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
40 void MipsTargetStreamer::emitDirectiveSetMacro() { forbidModuleDirective(); }
41 void MipsTargetStreamer::emitDirectiveSetNoMacro() { forbidModuleDirective(); }
42 void MipsTargetStreamer::emitDirectiveSetMsa() { forbidModuleDirective(); }
43 void MipsTargetStreamer::emitDirectiveSetNoMsa() { forbidModuleDirective(); }
44 void MipsTargetStreamer::emitDirectiveSetAt() { forbidModuleDirective(); }
45 void MipsTargetStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
46 forbidModuleDirective();
48 void MipsTargetStreamer::emitDirectiveSetNoAt() { forbidModuleDirective(); }
49 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
50 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
51 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
52 void MipsTargetStreamer::emitDirectiveNaN2008() {}
53 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
54 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
55 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
56 void MipsTargetStreamer::emitDirectiveInsn() { forbidModuleDirective(); }
57 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
58 unsigned ReturnReg) {}
59 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
60 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
62 void MipsTargetStreamer::emitDirectiveSetArch(StringRef Arch) {
63 forbidModuleDirective();
65 void MipsTargetStreamer::emitDirectiveSetMips0() { forbidModuleDirective(); }
66 void MipsTargetStreamer::emitDirectiveSetMips1() { forbidModuleDirective(); }
67 void MipsTargetStreamer::emitDirectiveSetMips2() { forbidModuleDirective(); }
68 void MipsTargetStreamer::emitDirectiveSetMips3() { forbidModuleDirective(); }
69 void MipsTargetStreamer::emitDirectiveSetMips4() { forbidModuleDirective(); }
70 void MipsTargetStreamer::emitDirectiveSetMips5() { forbidModuleDirective(); }
71 void MipsTargetStreamer::emitDirectiveSetMips32() { forbidModuleDirective(); }
72 void MipsTargetStreamer::emitDirectiveSetMips32R2() { forbidModuleDirective(); }
73 void MipsTargetStreamer::emitDirectiveSetMips32R3() { forbidModuleDirective(); }
74 void MipsTargetStreamer::emitDirectiveSetMips32R5() { forbidModuleDirective(); }
75 void MipsTargetStreamer::emitDirectiveSetMips32R6() { forbidModuleDirective(); }
76 void MipsTargetStreamer::emitDirectiveSetMips64() { forbidModuleDirective(); }
77 void MipsTargetStreamer::emitDirectiveSetMips64R2() { forbidModuleDirective(); }
78 void MipsTargetStreamer::emitDirectiveSetMips64R3() { forbidModuleDirective(); }
79 void MipsTargetStreamer::emitDirectiveSetMips64R5() { forbidModuleDirective(); }
80 void MipsTargetStreamer::emitDirectiveSetMips64R6() { forbidModuleDirective(); }
81 void MipsTargetStreamer::emitDirectiveSetPop() { forbidModuleDirective(); }
82 void MipsTargetStreamer::emitDirectiveSetPush() { forbidModuleDirective(); }
83 void MipsTargetStreamer::emitDirectiveSetSoftFloat() {
84 forbidModuleDirective();
86 void MipsTargetStreamer::emitDirectiveSetHardFloat() {
87 forbidModuleDirective();
89 void MipsTargetStreamer::emitDirectiveSetDsp() { forbidModuleDirective(); }
90 void MipsTargetStreamer::emitDirectiveSetNoDsp() { forbidModuleDirective(); }
91 void MipsTargetStreamer::emitDirectiveCpLoad(unsigned RegNo) {}
92 void MipsTargetStreamer::emitDirectiveCpRestore(
93 SmallVector<MCInst, 3> &StoreInsts, int Offset) {
94 forbidModuleDirective();
96 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
97 const MCSymbol &Sym, bool IsReg) {
99 void MipsTargetStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
100 bool SaveLocationIsRegister) {}
102 void MipsTargetStreamer::emitDirectiveModuleFP() {}
104 void MipsTargetStreamer::emitDirectiveModuleOddSPReg() {
105 if (!ABIFlagsSection.OddSPReg && !ABIFlagsSection.Is32BitABI)
106 report_fatal_error("+nooddspreg is only valid for O32");
108 void MipsTargetStreamer::emitDirectiveModuleSoftFloat() {}
109 void MipsTargetStreamer::emitDirectiveModuleHardFloat() {}
110 void MipsTargetStreamer::emitDirectiveSetFp(
111 MipsABIFlagsSection::FpABIKind Value) {
112 forbidModuleDirective();
114 void MipsTargetStreamer::emitDirectiveSetOddSPReg() { forbidModuleDirective(); }
115 void MipsTargetStreamer::emitDirectiveSetNoOddSPReg() {
116 forbidModuleDirective();
119 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
120 formatted_raw_ostream &OS)
121 : MipsTargetStreamer(S), OS(OS) {}
123 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
124 OS << "\t.set\tmicromips\n";
125 forbidModuleDirective();
128 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
129 OS << "\t.set\tnomicromips\n";
130 forbidModuleDirective();
133 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
134 OS << "\t.set\tmips16\n";
135 forbidModuleDirective();
138 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
139 OS << "\t.set\tnomips16\n";
140 MipsTargetStreamer::emitDirectiveSetNoMips16();
143 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
144 OS << "\t.set\treorder\n";
145 MipsTargetStreamer::emitDirectiveSetReorder();
148 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
149 OS << "\t.set\tnoreorder\n";
150 forbidModuleDirective();
153 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
154 OS << "\t.set\tmacro\n";
155 MipsTargetStreamer::emitDirectiveSetMacro();
158 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
159 OS << "\t.set\tnomacro\n";
160 MipsTargetStreamer::emitDirectiveSetNoMacro();
163 void MipsTargetAsmStreamer::emitDirectiveSetMsa() {
164 OS << "\t.set\tmsa\n";
165 MipsTargetStreamer::emitDirectiveSetMsa();
168 void MipsTargetAsmStreamer::emitDirectiveSetNoMsa() {
169 OS << "\t.set\tnomsa\n";
170 MipsTargetStreamer::emitDirectiveSetNoMsa();
173 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
174 OS << "\t.set\tat\n";
175 MipsTargetStreamer::emitDirectiveSetAt();
178 void MipsTargetAsmStreamer::emitDirectiveSetAtWithArg(unsigned RegNo) {
179 OS << "\t.set\tat=$" << Twine(RegNo) << "\n";
180 MipsTargetStreamer::emitDirectiveSetAtWithArg(RegNo);
183 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
184 OS << "\t.set\tnoat\n";
185 MipsTargetStreamer::emitDirectiveSetNoAt();
188 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
189 OS << "\t.end\t" << Name << '\n';
192 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
193 OS << "\t.ent\t" << Symbol.getName() << '\n';
196 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
198 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
200 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
201 OS << "\t.nan\tlegacy\n";
204 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
205 OS << "\t.option\tpic0\n";
208 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
209 OS << "\t.option\tpic2\n";
212 void MipsTargetAsmStreamer::emitDirectiveInsn() {
213 MipsTargetStreamer::emitDirectiveInsn();
217 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
218 unsigned ReturnReg) {
220 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
222 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
225 void MipsTargetAsmStreamer::emitDirectiveSetArch(StringRef Arch) {
226 OS << "\t.set arch=" << Arch << "\n";
227 MipsTargetStreamer::emitDirectiveSetArch(Arch);
230 void MipsTargetAsmStreamer::emitDirectiveSetMips0() {
231 OS << "\t.set\tmips0\n";
232 MipsTargetStreamer::emitDirectiveSetMips0();
235 void MipsTargetAsmStreamer::emitDirectiveSetMips1() {
236 OS << "\t.set\tmips1\n";
237 MipsTargetStreamer::emitDirectiveSetMips1();
240 void MipsTargetAsmStreamer::emitDirectiveSetMips2() {
241 OS << "\t.set\tmips2\n";
242 MipsTargetStreamer::emitDirectiveSetMips2();
245 void MipsTargetAsmStreamer::emitDirectiveSetMips3() {
246 OS << "\t.set\tmips3\n";
247 MipsTargetStreamer::emitDirectiveSetMips3();
250 void MipsTargetAsmStreamer::emitDirectiveSetMips4() {
251 OS << "\t.set\tmips4\n";
252 MipsTargetStreamer::emitDirectiveSetMips4();
255 void MipsTargetAsmStreamer::emitDirectiveSetMips5() {
256 OS << "\t.set\tmips5\n";
257 MipsTargetStreamer::emitDirectiveSetMips5();
260 void MipsTargetAsmStreamer::emitDirectiveSetMips32() {
261 OS << "\t.set\tmips32\n";
262 MipsTargetStreamer::emitDirectiveSetMips32();
265 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
266 OS << "\t.set\tmips32r2\n";
267 MipsTargetStreamer::emitDirectiveSetMips32R2();
270 void MipsTargetAsmStreamer::emitDirectiveSetMips32R3() {
271 OS << "\t.set\tmips32r3\n";
272 MipsTargetStreamer::emitDirectiveSetMips32R3();
275 void MipsTargetAsmStreamer::emitDirectiveSetMips32R5() {
276 OS << "\t.set\tmips32r5\n";
277 MipsTargetStreamer::emitDirectiveSetMips32R5();
280 void MipsTargetAsmStreamer::emitDirectiveSetMips32R6() {
281 OS << "\t.set\tmips32r6\n";
282 MipsTargetStreamer::emitDirectiveSetMips32R6();
285 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
286 OS << "\t.set\tmips64\n";
287 MipsTargetStreamer::emitDirectiveSetMips64();
290 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
291 OS << "\t.set\tmips64r2\n";
292 MipsTargetStreamer::emitDirectiveSetMips64R2();
295 void MipsTargetAsmStreamer::emitDirectiveSetMips64R3() {
296 OS << "\t.set\tmips64r3\n";
297 MipsTargetStreamer::emitDirectiveSetMips64R3();
300 void MipsTargetAsmStreamer::emitDirectiveSetMips64R5() {
301 OS << "\t.set\tmips64r5\n";
302 MipsTargetStreamer::emitDirectiveSetMips64R5();
305 void MipsTargetAsmStreamer::emitDirectiveSetMips64R6() {
306 OS << "\t.set\tmips64r6\n";
307 MipsTargetStreamer::emitDirectiveSetMips64R6();
310 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
311 OS << "\t.set\tdsp\n";
312 MipsTargetStreamer::emitDirectiveSetDsp();
315 void MipsTargetAsmStreamer::emitDirectiveSetNoDsp() {
316 OS << "\t.set\tnodsp\n";
317 MipsTargetStreamer::emitDirectiveSetNoDsp();
320 void MipsTargetAsmStreamer::emitDirectiveSetPop() {
321 OS << "\t.set\tpop\n";
322 MipsTargetStreamer::emitDirectiveSetPop();
325 void MipsTargetAsmStreamer::emitDirectiveSetPush() {
326 OS << "\t.set\tpush\n";
327 MipsTargetStreamer::emitDirectiveSetPush();
330 void MipsTargetAsmStreamer::emitDirectiveSetSoftFloat() {
331 OS << "\t.set\tsoftfloat\n";
332 MipsTargetStreamer::emitDirectiveSetSoftFloat();
335 void MipsTargetAsmStreamer::emitDirectiveSetHardFloat() {
336 OS << "\t.set\thardfloat\n";
337 MipsTargetStreamer::emitDirectiveSetHardFloat();
340 // Print a 32 bit hex number with all numbers.
341 static void printHex32(unsigned Value, raw_ostream &OS) {
343 for (int i = 7; i >= 0; i--)
344 OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
347 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
348 int CPUTopSavedRegOff) {
350 printHex32(CPUBitmask, OS);
351 OS << ',' << CPUTopSavedRegOff << '\n';
354 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
355 int FPUTopSavedRegOff) {
357 printHex32(FPUBitmask, OS);
358 OS << "," << FPUTopSavedRegOff << '\n';
361 void MipsTargetAsmStreamer::emitDirectiveCpLoad(unsigned RegNo) {
363 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
364 forbidModuleDirective();
367 void MipsTargetAsmStreamer::emitDirectiveCpRestore(
368 SmallVector<MCInst, 3> &StoreInsts, int Offset) {
369 MipsTargetStreamer::emitDirectiveCpRestore(StoreInsts, Offset);
370 OS << "\t.cprestore\t" << Offset << "\n";
373 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
377 OS << "\t.cpsetup\t$"
378 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
382 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
389 forbidModuleDirective();
392 void MipsTargetAsmStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
393 bool SaveLocationIsRegister) {
395 forbidModuleDirective();
398 void MipsTargetAsmStreamer::emitDirectiveModuleFP() {
399 OS << "\t.module\tfp=";
400 OS << ABIFlagsSection.getFpABIString(ABIFlagsSection.getFpABI()) << "\n";
403 void MipsTargetAsmStreamer::emitDirectiveSetFp(
404 MipsABIFlagsSection::FpABIKind Value) {
405 MipsTargetStreamer::emitDirectiveSetFp(Value);
408 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
411 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg() {
412 MipsTargetStreamer::emitDirectiveModuleOddSPReg();
414 OS << "\t.module\t" << (ABIFlagsSection.OddSPReg ? "" : "no") << "oddspreg\n";
417 void MipsTargetAsmStreamer::emitDirectiveSetOddSPReg() {
418 MipsTargetStreamer::emitDirectiveSetOddSPReg();
419 OS << "\t.set\toddspreg\n";
422 void MipsTargetAsmStreamer::emitDirectiveSetNoOddSPReg() {
423 MipsTargetStreamer::emitDirectiveSetNoOddSPReg();
424 OS << "\t.set\tnooddspreg\n";
427 void MipsTargetAsmStreamer::emitDirectiveModuleSoftFloat() {
428 OS << "\t.module\tsoftfloat\n";
431 void MipsTargetAsmStreamer::emitDirectiveModuleHardFloat() {
432 OS << "\t.module\thardfloat\n";
435 // This part is for ELF object output.
436 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
437 const MCSubtargetInfo &STI)
438 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
439 MCAssembler &MCA = getStreamer().getAssembler();
440 Pic = MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_;
442 const FeatureBitset &Features = STI.getFeatureBits();
444 // Set the header flags that we can in the constructor.
445 // FIXME: This is a fairly terrible hack. We set the rest
446 // of these in the destructor. The problem here is two-fold:
448 // a: Some of the eflags can be set/reset by directives.
449 // b: There aren't any usage paths that initialize the ABI
450 // pointer until after we initialize either an assembler
451 // or the target machine.
452 // We can fix this by making the target streamer construct
453 // the ABI, but this is fraught with wide ranging dependency
455 unsigned EFlags = MCA.getELFHeaderEFlags();
458 if (Features[Mips::FeatureMips64r6])
459 EFlags |= ELF::EF_MIPS_ARCH_64R6;
460 else if (Features[Mips::FeatureMips64r2] ||
461 Features[Mips::FeatureMips64r3] ||
462 Features[Mips::FeatureMips64r5])
463 EFlags |= ELF::EF_MIPS_ARCH_64R2;
464 else if (Features[Mips::FeatureMips64])
465 EFlags |= ELF::EF_MIPS_ARCH_64;
466 else if (Features[Mips::FeatureMips5])
467 EFlags |= ELF::EF_MIPS_ARCH_5;
468 else if (Features[Mips::FeatureMips4])
469 EFlags |= ELF::EF_MIPS_ARCH_4;
470 else if (Features[Mips::FeatureMips3])
471 EFlags |= ELF::EF_MIPS_ARCH_3;
472 else if (Features[Mips::FeatureMips32r6])
473 EFlags |= ELF::EF_MIPS_ARCH_32R6;
474 else if (Features[Mips::FeatureMips32r2] ||
475 Features[Mips::FeatureMips32r3] ||
476 Features[Mips::FeatureMips32r5])
477 EFlags |= ELF::EF_MIPS_ARCH_32R2;
478 else if (Features[Mips::FeatureMips32])
479 EFlags |= ELF::EF_MIPS_ARCH_32;
480 else if (Features[Mips::FeatureMips2])
481 EFlags |= ELF::EF_MIPS_ARCH_2;
483 EFlags |= ELF::EF_MIPS_ARCH_1;
486 if (Features[Mips::FeatureNaN2008])
487 EFlags |= ELF::EF_MIPS_NAN2008;
489 // -mabicalls and -mplt are not implemented but we should act as if they were
491 EFlags |= ELF::EF_MIPS_CPIC;
493 MCA.setELFHeaderEFlags(EFlags);
496 void MipsTargetELFStreamer::emitLabel(MCSymbol *S) {
497 auto *Symbol = cast<MCSymbolELF>(S);
498 if (!isMicroMipsEnabled())
500 getStreamer().getAssembler().registerSymbol(*Symbol);
501 uint8_t Type = Symbol->getType();
502 if (Type != ELF::STT_FUNC)
505 Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
508 void MipsTargetELFStreamer::finish() {
509 MCAssembler &MCA = getStreamer().getAssembler();
510 const MCObjectFileInfo &OFI = *MCA.getContext().getObjectFileInfo();
512 // .bss, .text and .data are always at least 16-byte aligned.
513 MCSection &TextSection = *OFI.getTextSection();
514 MCA.registerSection(TextSection);
515 MCSection &DataSection = *OFI.getDataSection();
516 MCA.registerSection(DataSection);
517 MCSection &BSSSection = *OFI.getBSSSection();
518 MCA.registerSection(BSSSection);
520 TextSection.setAlignment(std::max(16u, TextSection.getAlignment()));
521 DataSection.setAlignment(std::max(16u, DataSection.getAlignment()));
522 BSSSection.setAlignment(std::max(16u, BSSSection.getAlignment()));
524 const FeatureBitset &Features = STI.getFeatureBits();
526 // Update e_header flags. See the FIXME and comment above in
527 // the constructor for a full rundown on this.
528 unsigned EFlags = MCA.getELFHeaderEFlags();
531 // N64 does not require any ABI bits.
532 if (getABI().IsO32())
533 EFlags |= ELF::EF_MIPS_ABI_O32;
534 else if (getABI().IsN32())
535 EFlags |= ELF::EF_MIPS_ABI2;
537 if (Features[Mips::FeatureGP64Bit]) {
538 if (getABI().IsO32())
539 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
540 } else if (Features[Mips::FeatureMips64r2] || Features[Mips::FeatureMips64])
541 EFlags |= ELF::EF_MIPS_32BITMODE;
543 // If we've set the cpic eflag and we're n64, go ahead and set the pic
545 if (EFlags & ELF::EF_MIPS_CPIC && getABI().IsN64())
546 EFlags |= ELF::EF_MIPS_PIC;
548 MCA.setELFHeaderEFlags(EFlags);
550 // Emit all the option records.
551 // At the moment we are only emitting .Mips.options (ODK_REGINFO) and
553 MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
554 MEF.EmitMipsOptionRecords();
559 void MipsTargetELFStreamer::emitAssignment(MCSymbol *S, const MCExpr *Value) {
560 auto *Symbol = cast<MCSymbolELF>(S);
561 // If on rhs is micromips symbol then mark Symbol as microMips.
562 if (Value->getKind() != MCExpr::SymbolRef)
564 const auto &RhsSym = cast<MCSymbolELF>(
565 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol());
567 if (!(RhsSym.getOther() & ELF::STO_MIPS_MICROMIPS))
570 Symbol->setOther(ELF::STO_MIPS_MICROMIPS);
573 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
574 return static_cast<MCELFStreamer &>(Streamer);
577 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
578 MicroMipsEnabled = true;
580 MCAssembler &MCA = getStreamer().getAssembler();
581 unsigned Flags = MCA.getELFHeaderEFlags();
582 Flags |= ELF::EF_MIPS_MICROMIPS;
583 MCA.setELFHeaderEFlags(Flags);
584 forbidModuleDirective();
587 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
588 MicroMipsEnabled = false;
589 forbidModuleDirective();
592 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
593 MCAssembler &MCA = getStreamer().getAssembler();
594 unsigned Flags = MCA.getELFHeaderEFlags();
595 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
596 MCA.setELFHeaderEFlags(Flags);
597 forbidModuleDirective();
600 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
601 MCAssembler &MCA = getStreamer().getAssembler();
602 unsigned Flags = MCA.getELFHeaderEFlags();
603 Flags |= ELF::EF_MIPS_NOREORDER;
604 MCA.setELFHeaderEFlags(Flags);
605 forbidModuleDirective();
608 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
609 MCAssembler &MCA = getStreamer().getAssembler();
610 MCContext &Context = MCA.getContext();
611 MCStreamer &OS = getStreamer();
613 MCSectionELF *Sec = Context.getELFSection(".pdr", ELF::SHT_PROGBITS,
614 ELF::SHF_ALLOC | ELF::SHT_REL);
616 MCSymbol *Sym = Context.getOrCreateSymbol(Name);
617 const MCSymbolRefExpr *ExprRef =
618 MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_None, Context);
620 MCA.registerSection(*Sec);
621 Sec->setAlignment(4);
625 OS.SwitchSection(Sec);
627 OS.EmitValueImpl(ExprRef, 4);
629 OS.EmitIntValue(GPRInfoSet ? GPRBitMask : 0, 4); // reg_mask
630 OS.EmitIntValue(GPRInfoSet ? GPROffset : 0, 4); // reg_offset
632 OS.EmitIntValue(FPRInfoSet ? FPRBitMask : 0, 4); // fpreg_mask
633 OS.EmitIntValue(FPRInfoSet ? FPROffset : 0, 4); // fpreg_offset
635 OS.EmitIntValue(FrameInfoSet ? FrameOffset : 0, 4); // frame_offset
636 OS.EmitIntValue(FrameInfoSet ? FrameReg : 0, 4); // frame_reg
637 OS.EmitIntValue(FrameInfoSet ? ReturnReg : 0, 4); // return_reg
639 // The .end directive marks the end of a procedure. Invalidate
640 // the information gathered up until this point.
641 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
645 // .end also implicitly sets the size.
646 MCSymbol *CurPCSym = Context.createTempSymbol();
647 OS.EmitLabel(CurPCSym);
648 const MCExpr *Size = MCBinaryExpr::createSub(
649 MCSymbolRefExpr::create(CurPCSym, MCSymbolRefExpr::VK_None, Context),
652 if (!Size->evaluateAsAbsolute(AbsSize, MCA))
653 llvm_unreachable("Function size must be evaluatable as absolute");
654 Size = MCConstantExpr::create(AbsSize, Context);
655 static_cast<MCSymbolELF *>(Sym)->setSize(Size);
658 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
659 GPRInfoSet = FPRInfoSet = FrameInfoSet = false;
661 // .ent also acts like an implicit '.type symbol, STT_FUNC'
662 static_cast<const MCSymbolELF &>(Symbol).setType(ELF::STT_FUNC);
665 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
666 MCAssembler &MCA = getStreamer().getAssembler();
667 unsigned Flags = MCA.getELFHeaderEFlags();
668 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
669 MCA.setELFHeaderEFlags(Flags);
672 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
673 MCAssembler &MCA = getStreamer().getAssembler();
674 unsigned Flags = MCA.getELFHeaderEFlags();
675 Flags |= ELF::EF_MIPS_NAN2008;
676 MCA.setELFHeaderEFlags(Flags);
679 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
680 MCAssembler &MCA = getStreamer().getAssembler();
681 unsigned Flags = MCA.getELFHeaderEFlags();
682 Flags &= ~ELF::EF_MIPS_NAN2008;
683 MCA.setELFHeaderEFlags(Flags);
686 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
687 MCAssembler &MCA = getStreamer().getAssembler();
688 unsigned Flags = MCA.getELFHeaderEFlags();
689 // This option overrides other PIC options like -KPIC.
691 Flags &= ~ELF::EF_MIPS_PIC;
692 MCA.setELFHeaderEFlags(Flags);
695 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
696 MCAssembler &MCA = getStreamer().getAssembler();
697 unsigned Flags = MCA.getELFHeaderEFlags();
699 // NOTE: We are following the GAS behaviour here which means the directive
700 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
701 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
702 // EF_MIPS_CPIC to be mutually exclusive.
703 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
704 MCA.setELFHeaderEFlags(Flags);
707 void MipsTargetELFStreamer::emitDirectiveInsn() {
708 MipsTargetStreamer::emitDirectiveInsn();
709 MipsELFStreamer &MEF = static_cast<MipsELFStreamer &>(Streamer);
710 MEF.createPendingLabelRelocs();
713 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
714 unsigned ReturnReg_) {
715 MCContext &Context = getStreamer().getAssembler().getContext();
716 const MCRegisterInfo *RegInfo = Context.getRegisterInfo();
719 FrameReg = RegInfo->getEncodingValue(StackReg);
720 FrameOffset = StackSize;
721 ReturnReg = RegInfo->getEncodingValue(ReturnReg_);
724 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
725 int CPUTopSavedRegOff) {
727 GPRBitMask = CPUBitmask;
728 GPROffset = CPUTopSavedRegOff;
731 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
732 int FPUTopSavedRegOff) {
734 FPRBitMask = FPUBitmask;
735 FPROffset = FPUTopSavedRegOff;
738 void MipsTargetELFStreamer::emitDirectiveCpLoad(unsigned RegNo) {
740 // This directive expands to:
741 // lui $gp, %hi(_gp_disp)
742 // addui $gp, $gp, %lo(_gp_disp)
743 // addu $gp, $gp, $reg
744 // when support for position independent code is enabled.
745 if (!Pic || (getABI().IsN32() || getABI().IsN64()))
748 // There's a GNU extension controlled by -mno-shared that allows
749 // locally-binding symbols to be accessed using absolute addresses.
750 // This is currently not supported. When supported -mno-shared makes
751 // .cpload expand to:
752 // lui $gp, %hi(__gnu_local_gp)
753 // addiu $gp, $gp, %lo(__gnu_local_gp)
755 StringRef SymName("_gp_disp");
756 MCAssembler &MCA = getStreamer().getAssembler();
757 MCSymbol *GP_Disp = MCA.getContext().getOrCreateSymbol(SymName);
758 MCA.registerSymbol(*GP_Disp);
761 TmpInst.setOpcode(Mips::LUi);
762 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
763 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::create(
764 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
765 TmpInst.addOperand(MCOperand::createExpr(HiSym));
766 getStreamer().EmitInstruction(TmpInst, STI);
770 TmpInst.setOpcode(Mips::ADDiu);
771 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
772 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
773 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::create(
774 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
775 TmpInst.addOperand(MCOperand::createExpr(LoSym));
776 getStreamer().EmitInstruction(TmpInst, STI);
780 TmpInst.setOpcode(Mips::ADDu);
781 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
782 TmpInst.addOperand(MCOperand::createReg(Mips::GP));
783 TmpInst.addOperand(MCOperand::createReg(RegNo));
784 getStreamer().EmitInstruction(TmpInst, STI);
786 forbidModuleDirective();
789 void MipsTargetELFStreamer::emitDirectiveCpRestore(
790 SmallVector<MCInst, 3> &StoreInsts, int Offset) {
791 MipsTargetStreamer::emitDirectiveCpRestore(StoreInsts, Offset);
793 // When PIC mode is enabled and the O32 ABI is used, this directive expands
795 // sw $gp, offset($sp)
796 // and adds a corresponding LW after every JAL.
798 // Note that .cprestore is ignored if used with the N32 and N64 ABIs or if it
799 // is used in non-PIC mode.
800 if (!Pic || (getABI().IsN32() || getABI().IsN64()))
803 for (const MCInst &Inst : StoreInsts)
804 getStreamer().EmitInstruction(Inst, STI);
807 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
811 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
812 if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
815 MCAssembler &MCA = getStreamer().getAssembler();
818 // Either store the old $gp in a register or on the stack
820 // move $save, $gpreg
821 Inst.setOpcode(Mips::OR64);
822 Inst.addOperand(MCOperand::createReg(RegOrOffset));
823 Inst.addOperand(MCOperand::createReg(Mips::GP));
824 Inst.addOperand(MCOperand::createReg(Mips::ZERO));
826 // sd $gpreg, offset($sp)
827 Inst.setOpcode(Mips::SD);
828 Inst.addOperand(MCOperand::createReg(Mips::GP));
829 Inst.addOperand(MCOperand::createReg(Mips::SP));
830 Inst.addOperand(MCOperand::createImm(RegOrOffset));
832 getStreamer().EmitInstruction(Inst, STI);
835 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::create(
836 &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
837 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::create(
838 &Sym, MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
840 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
841 Inst.setOpcode(Mips::LUi);
842 Inst.addOperand(MCOperand::createReg(Mips::GP));
843 Inst.addOperand(MCOperand::createExpr(HiExpr));
844 getStreamer().EmitInstruction(Inst, STI);
847 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
848 Inst.setOpcode(Mips::ADDiu);
849 Inst.addOperand(MCOperand::createReg(Mips::GP));
850 Inst.addOperand(MCOperand::createReg(Mips::GP));
851 Inst.addOperand(MCOperand::createExpr(LoExpr));
852 getStreamer().EmitInstruction(Inst, STI);
855 // daddu $gp, $gp, $funcreg
856 Inst.setOpcode(Mips::DADDu);
857 Inst.addOperand(MCOperand::createReg(Mips::GP));
858 Inst.addOperand(MCOperand::createReg(Mips::GP));
859 Inst.addOperand(MCOperand::createReg(RegNo));
860 getStreamer().EmitInstruction(Inst, STI);
862 forbidModuleDirective();
865 void MipsTargetELFStreamer::emitDirectiveCpreturn(unsigned SaveLocation,
866 bool SaveLocationIsRegister) {
867 // Only N32 and N64 emit anything for .cpreturn iff PIC is set.
868 if (!Pic || !(getABI().IsN32() || getABI().IsN64()))
872 // Either restore the old $gp from a register or on the stack
873 if (SaveLocationIsRegister) {
874 Inst.setOpcode(Mips::OR);
875 Inst.addOperand(MCOperand::createReg(Mips::GP));
876 Inst.addOperand(MCOperand::createReg(SaveLocation));
877 Inst.addOperand(MCOperand::createReg(Mips::ZERO));
879 Inst.setOpcode(Mips::LD);
880 Inst.addOperand(MCOperand::createReg(Mips::GP));
881 Inst.addOperand(MCOperand::createReg(Mips::SP));
882 Inst.addOperand(MCOperand::createImm(SaveLocation));
884 getStreamer().EmitInstruction(Inst, STI);
886 forbidModuleDirective();
889 void MipsTargetELFStreamer::emitMipsAbiFlags() {
890 MCAssembler &MCA = getStreamer().getAssembler();
891 MCContext &Context = MCA.getContext();
892 MCStreamer &OS = getStreamer();
893 MCSectionELF *Sec = Context.getELFSection(
894 ".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS, ELF::SHF_ALLOC, 24, "");
895 MCA.registerSection(*Sec);
896 Sec->setAlignment(8);
897 OS.SwitchSection(Sec);
899 OS << ABIFlagsSection;