1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target streamer methods.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsMCTargetDesc.h"
16 #include "MipsTargetObjectFile.h"
17 #include "MipsTargetStreamer.h"
18 #include "llvm/MC/MCContext.h"
19 #include "llvm/MC/MCELF.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MCSymbol.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/ELF.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/FormattedStream.h"
30 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
31 : MCTargetStreamer(S), canHaveModuleDirective(true) {}
32 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
33 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
34 void MipsTargetStreamer::emitDirectiveSetMips16() {}
35 void MipsTargetStreamer::emitDirectiveSetNoMips16() {}
36 void MipsTargetStreamer::emitDirectiveSetReorder() {}
37 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
38 void MipsTargetStreamer::emitDirectiveSetMacro() {}
39 void MipsTargetStreamer::emitDirectiveSetNoMacro() {}
40 void MipsTargetStreamer::emitDirectiveSetAt() {}
41 void MipsTargetStreamer::emitDirectiveSetNoAt() {}
42 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
43 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
44 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
45 void MipsTargetStreamer::emitDirectiveNaN2008() {}
46 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
47 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
48 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
49 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
50 unsigned ReturnReg) {}
51 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
52 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
54 void MipsTargetStreamer::emitDirectiveSetMips32R2() {}
55 void MipsTargetStreamer::emitDirectiveSetMips64() {}
56 void MipsTargetStreamer::emitDirectiveSetMips64R2() {}
57 void MipsTargetStreamer::emitDirectiveSetDsp() {}
58 void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
59 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
60 const MCSymbol &Sym, bool IsReg) {
63 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
64 formatted_raw_ostream &OS)
65 : MipsTargetStreamer(S), OS(OS) {}
67 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
68 OS << "\t.set\tmicromips\n";
69 setCanHaveModuleDir(false);
72 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
73 OS << "\t.set\tnomicromips\n";
74 setCanHaveModuleDir(false);
77 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
78 OS << "\t.set\tmips16\n";
79 setCanHaveModuleDir(false);
82 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
83 OS << "\t.set\tnomips16\n";
84 setCanHaveModuleDir(false);
87 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
88 OS << "\t.set\treorder\n";
89 setCanHaveModuleDir(false);
92 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
93 OS << "\t.set\tnoreorder\n";
94 setCanHaveModuleDir(false);
97 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
98 OS << "\t.set\tmacro\n";
99 setCanHaveModuleDir(false);
102 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
103 OS << "\t.set\tnomacro\n";
104 setCanHaveModuleDir(false);
107 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
108 OS << "\t.set\tat\n";
109 setCanHaveModuleDir(false);
112 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
113 OS << "\t.set\tnoat\n";
114 setCanHaveModuleDir(false);
117 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
118 OS << "\t.end\t" << Name << '\n';
121 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
122 OS << "\t.ent\t" << Symbol.getName() << '\n';
125 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
127 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
129 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
130 OS << "\t.nan\tlegacy\n";
133 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
134 OS << "\t.option\tpic0\n";
137 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
138 OS << "\t.option\tpic2\n";
141 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
142 unsigned ReturnReg) {
144 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
146 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
149 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
150 OS << "\t.set\tmips32r2\n";
151 setCanHaveModuleDir(false);
154 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
155 OS << "\t.set\tmips64\n";
156 setCanHaveModuleDir(false);
159 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
160 OS << "\t.set\tmips64r2\n";
161 setCanHaveModuleDir(false);
164 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
165 OS << "\t.set\tdsp\n";
166 setCanHaveModuleDir(false);
168 // Print a 32 bit hex number with all numbers.
169 static void printHex32(unsigned Value, raw_ostream &OS) {
171 for (int i = 7; i >= 0; i--)
172 OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
175 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
176 int CPUTopSavedRegOff) {
178 printHex32(CPUBitmask, OS);
179 OS << ',' << CPUTopSavedRegOff << '\n';
182 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
183 int FPUTopSavedRegOff) {
185 printHex32(FPUBitmask, OS);
186 OS << "," << FPUTopSavedRegOff << '\n';
189 void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
191 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
192 setCanHaveModuleDir(false);
195 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
199 OS << "\t.cpsetup\t$"
200 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
204 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
210 OS << Sym.getName() << "\n";
211 setCanHaveModuleDir(false);
214 void MipsTargetAsmStreamer::emitDirectiveModuleFP(Val_GNU_MIPS_ABI Value,
216 MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitAbi);
218 StringRef ModuleValue;
219 OS << "\t.module\tfp=";
220 OS << ABIFlagsSection.getFpABIString(Value, Is32BitAbi) << "\n";
223 void MipsTargetAsmStreamer::emitDirectiveSetFp(Val_GNU_MIPS_ABI Value,
225 StringRef ModuleValue;
227 OS << ABIFlagsSection.getFpABIString(Value, Is32BitAbi) << "\n";
230 void MipsTargetAsmStreamer::emitMipsAbiFlags() {
231 // No action required for text output.
234 // This part is for ELF object output.
235 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
236 const MCSubtargetInfo &STI)
237 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
238 MCAssembler &MCA = getStreamer().getAssembler();
239 uint64_t Features = STI.getFeatureBits();
240 Triple T(STI.getTargetTriple());
241 Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
245 // Update e_header flags
249 if (Features & Mips::FeatureMips64r6)
250 EFlags |= ELF::EF_MIPS_ARCH_64R6;
251 else if (Features & Mips::FeatureMips64r2)
252 EFlags |= ELF::EF_MIPS_ARCH_64R2;
253 else if (Features & Mips::FeatureMips64)
254 EFlags |= ELF::EF_MIPS_ARCH_64;
255 else if (Features & Mips::FeatureMips5)
256 EFlags |= ELF::EF_MIPS_ARCH_5;
257 else if (Features & Mips::FeatureMips4)
258 EFlags |= ELF::EF_MIPS_ARCH_4;
259 else if (Features & Mips::FeatureMips3)
260 EFlags |= ELF::EF_MIPS_ARCH_3;
261 else if (Features & Mips::FeatureMips32r6)
262 EFlags |= ELF::EF_MIPS_ARCH_32R6;
263 else if (Features & Mips::FeatureMips32r2)
264 EFlags |= ELF::EF_MIPS_ARCH_32R2;
265 else if (Features & Mips::FeatureMips32)
266 EFlags |= ELF::EF_MIPS_ARCH_32;
267 else if (Features & Mips::FeatureMips2)
268 EFlags |= ELF::EF_MIPS_ARCH_2;
270 EFlags |= ELF::EF_MIPS_ARCH_1;
272 if (T.isArch64Bit()) {
273 if (Features & Mips::FeatureN32)
274 EFlags |= ELF::EF_MIPS_ABI2;
275 else if (Features & Mips::FeatureO32) {
276 EFlags |= ELF::EF_MIPS_ABI_O32;
277 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
279 // No need to set any bit for N64 which is the default ABI at the moment
280 // for 64-bit Mips architectures.
282 if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
283 EFlags |= ELF::EF_MIPS_32BITMODE;
286 EFlags |= ELF::EF_MIPS_ABI_O32;
290 if (Features & Mips::FeatureNaN2008)
291 EFlags |= ELF::EF_MIPS_NAN2008;
293 MCA.setELFHeaderEFlags(EFlags);
296 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
297 if (!isMicroMipsEnabled())
299 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
300 uint8_t Type = MCELF::GetType(Data);
301 if (Type != ELF::STT_FUNC)
304 // The "other" values are stored in the last 6 bits of the second byte
305 // The traditional defines for STO values assume the full byte and thus
306 // the shift to pack it.
307 MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
310 void MipsTargetELFStreamer::finish() {
311 MCAssembler &MCA = getStreamer().getAssembler();
312 MCContext &Context = MCA.getContext();
313 MCStreamer &OS = getStreamer();
314 Triple T(STI.getTargetTriple());
315 uint64_t Features = STI.getFeatureBits();
317 if (T.isArch64Bit() && (Features & Mips::FeatureN64)) {
318 const MCSectionELF *Sec = Context.getELFSection(
319 ".MIPS.options", ELF::SHT_MIPS_OPTIONS,
320 ELF::SHF_ALLOC | ELF::SHF_MIPS_NOSTRIP, SectionKind::getMetadata());
321 OS.SwitchSection(Sec);
323 OS.EmitIntValue(1, 1); // kind
324 OS.EmitIntValue(40, 1); // size
325 OS.EmitIntValue(0, 2); // section
326 OS.EmitIntValue(0, 4); // info
327 OS.EmitIntValue(0, 4); // ri_gprmask
328 OS.EmitIntValue(0, 4); // pad
329 OS.EmitIntValue(0, 4); // ri_cpr[0]mask
330 OS.EmitIntValue(0, 4); // ri_cpr[1]mask
331 OS.EmitIntValue(0, 4); // ri_cpr[2]mask
332 OS.EmitIntValue(0, 4); // ri_cpr[3]mask
333 OS.EmitIntValue(0, 8); // ri_gp_value
335 const MCSectionELF *Sec =
336 Context.getELFSection(".reginfo", ELF::SHT_MIPS_REGINFO, ELF::SHF_ALLOC,
337 SectionKind::getMetadata());
338 OS.SwitchSection(Sec);
340 OS.EmitIntValue(0, 4); // ri_gprmask
341 OS.EmitIntValue(0, 4); // ri_cpr[0]mask
342 OS.EmitIntValue(0, 4); // ri_cpr[1]mask
343 OS.EmitIntValue(0, 4); // ri_cpr[2]mask
344 OS.EmitIntValue(0, 4); // ri_cpr[3]mask
345 OS.EmitIntValue(0, 4); // ri_gp_value
350 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
351 const MCExpr *Value) {
352 // If on rhs is micromips symbol then mark Symbol as microMips.
353 if (Value->getKind() != MCExpr::SymbolRef)
355 const MCSymbol &RhsSym =
356 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
357 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
358 uint8_t Type = MCELF::GetType(Data);
359 if ((Type != ELF::STT_FUNC) ||
360 !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
363 MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
364 // The "other" values are stored in the last 6 bits of the second byte.
365 // The traditional defines for STO values assume the full byte and thus
366 // the shift to pack it.
367 MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
370 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
371 return static_cast<MCELFStreamer &>(Streamer);
374 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
375 MicroMipsEnabled = true;
377 MCAssembler &MCA = getStreamer().getAssembler();
378 unsigned Flags = MCA.getELFHeaderEFlags();
379 Flags |= ELF::EF_MIPS_MICROMIPS;
380 MCA.setELFHeaderEFlags(Flags);
383 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
384 MicroMipsEnabled = false;
385 setCanHaveModuleDir(false);
388 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
389 MCAssembler &MCA = getStreamer().getAssembler();
390 unsigned Flags = MCA.getELFHeaderEFlags();
391 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
392 MCA.setELFHeaderEFlags(Flags);
393 setCanHaveModuleDir(false);
396 void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
398 setCanHaveModuleDir(false);
401 void MipsTargetELFStreamer::emitDirectiveSetReorder() {
403 setCanHaveModuleDir(false);
406 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
407 MCAssembler &MCA = getStreamer().getAssembler();
408 unsigned Flags = MCA.getELFHeaderEFlags();
409 Flags |= ELF::EF_MIPS_NOREORDER;
410 MCA.setELFHeaderEFlags(Flags);
411 setCanHaveModuleDir(false);
414 void MipsTargetELFStreamer::emitDirectiveSetMacro() {
416 setCanHaveModuleDir(false);
419 void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
421 setCanHaveModuleDir(false);
424 void MipsTargetELFStreamer::emitDirectiveSetAt() {
426 setCanHaveModuleDir(false);
429 void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
431 setCanHaveModuleDir(false);
434 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
438 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
442 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
443 MCAssembler &MCA = getStreamer().getAssembler();
444 unsigned Flags = MCA.getELFHeaderEFlags();
445 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
446 MCA.setELFHeaderEFlags(Flags);
449 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
450 MCAssembler &MCA = getStreamer().getAssembler();
451 unsigned Flags = MCA.getELFHeaderEFlags();
452 Flags |= ELF::EF_MIPS_NAN2008;
453 MCA.setELFHeaderEFlags(Flags);
456 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
457 MCAssembler &MCA = getStreamer().getAssembler();
458 unsigned Flags = MCA.getELFHeaderEFlags();
459 Flags &= ~ELF::EF_MIPS_NAN2008;
460 MCA.setELFHeaderEFlags(Flags);
463 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
464 MCAssembler &MCA = getStreamer().getAssembler();
465 unsigned Flags = MCA.getELFHeaderEFlags();
466 // This option overrides other PIC options like -KPIC.
468 Flags &= ~ELF::EF_MIPS_PIC;
469 MCA.setELFHeaderEFlags(Flags);
472 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
473 MCAssembler &MCA = getStreamer().getAssembler();
474 unsigned Flags = MCA.getELFHeaderEFlags();
476 // NOTE: We are following the GAS behaviour here which means the directive
477 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
478 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
479 // EF_MIPS_CPIC to be mutually exclusive.
480 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
481 MCA.setELFHeaderEFlags(Flags);
484 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
485 unsigned ReturnReg) {
489 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
490 int CPUTopSavedRegOff) {
494 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
495 int FPUTopSavedRegOff) {
499 void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
500 setCanHaveModuleDir(false);
503 void MipsTargetELFStreamer::emitDirectiveSetMips64() {
504 setCanHaveModuleDir(false);
507 void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
508 setCanHaveModuleDir(false);
511 void MipsTargetELFStreamer::emitDirectiveSetDsp() {
512 setCanHaveModuleDir(false);
515 void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
517 // This directive expands to:
518 // lui $gp, %hi(_gp_disp)
519 // addui $gp, $gp, %lo(_gp_disp)
520 // addu $gp, $gp, $reg
521 // when support for position independent code is enabled.
522 if (!Pic || (isN32() || isN64()))
525 // There's a GNU extension controlled by -mno-shared that allows
526 // locally-binding symbols to be accessed using absolute addresses.
527 // This is currently not supported. When supported -mno-shared makes
528 // .cpload expand to:
529 // lui $gp, %hi(__gnu_local_gp)
530 // addiu $gp, $gp, %lo(__gnu_local_gp)
532 StringRef SymName("_gp_disp");
533 MCAssembler &MCA = getStreamer().getAssembler();
534 MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
535 MCA.getOrCreateSymbolData(*GP_Disp);
538 TmpInst.setOpcode(Mips::LUi);
539 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
540 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
541 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
542 TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
543 getStreamer().EmitInstruction(TmpInst, STI);
547 TmpInst.setOpcode(Mips::ADDiu);
548 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
549 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
550 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
551 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
552 TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
553 getStreamer().EmitInstruction(TmpInst, STI);
557 TmpInst.setOpcode(Mips::ADDu);
558 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
559 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
560 TmpInst.addOperand(MCOperand::CreateReg(RegNo));
561 getStreamer().EmitInstruction(TmpInst, STI);
563 setCanHaveModuleDir(false);
566 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
570 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
571 if (!Pic || !(isN32() || isN64()))
574 MCAssembler &MCA = getStreamer().getAssembler();
577 // Either store the old $gp in a register or on the stack
579 // move $save, $gpreg
580 Inst.setOpcode(Mips::DADDu);
581 Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
582 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
583 Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
585 // sd $gpreg, offset($sp)
586 Inst.setOpcode(Mips::SD);
587 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
588 Inst.addOperand(MCOperand::CreateReg(Mips::SP));
589 Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
591 getStreamer().EmitInstruction(Inst, STI);
594 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
595 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
596 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
597 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
598 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
599 Inst.setOpcode(Mips::LUi);
600 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
601 Inst.addOperand(MCOperand::CreateExpr(HiExpr));
602 getStreamer().EmitInstruction(Inst, STI);
605 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
606 Inst.setOpcode(Mips::ADDiu);
607 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
608 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
609 Inst.addOperand(MCOperand::CreateExpr(LoExpr));
610 getStreamer().EmitInstruction(Inst, STI);
613 // daddu $gp, $gp, $funcreg
614 Inst.setOpcode(Mips::DADDu);
615 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
616 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
617 Inst.addOperand(MCOperand::CreateReg(RegNo));
618 getStreamer().EmitInstruction(Inst, STI);
620 setCanHaveModuleDir(false);
623 void MipsTargetELFStreamer::emitMipsAbiFlags() {
624 MCAssembler &MCA = getStreamer().getAssembler();
625 MCContext &Context = MCA.getContext();
626 MCStreamer &OS = getStreamer();
627 const MCSectionELF *Sec =
628 Context.getELFSection(".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS,
629 ELF::SHF_ALLOC, SectionKind::getMetadata());
630 MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
631 ABIShndxSD.setAlignment(8);
632 OS.SwitchSection(Sec);
634 OS << ABIFlagsSection;