1 //===-- MipsTargetStreamer.cpp - Mips Target Streamer Methods -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target streamer methods.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsMCTargetDesc.h"
16 #include "MipsTargetObjectFile.h"
17 #include "MipsTargetStreamer.h"
18 #include "llvm/MC/MCContext.h"
19 #include "llvm/MC/MCELF.h"
20 #include "llvm/MC/MCSectionELF.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/MC/MCSymbol.h"
23 #include "llvm/Support/CommandLine.h"
24 #include "llvm/Support/ELF.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/FormattedStream.h"
30 MipsTargetStreamer::MipsTargetStreamer(MCStreamer &S)
31 : MCTargetStreamer(S), canHaveModuleDirective(true) {}
32 void MipsTargetStreamer::emitDirectiveSetMicroMips() {}
33 void MipsTargetStreamer::emitDirectiveSetNoMicroMips() {}
34 void MipsTargetStreamer::emitDirectiveSetMips16() {}
35 void MipsTargetStreamer::emitDirectiveSetNoMips16() {}
36 void MipsTargetStreamer::emitDirectiveSetReorder() {}
37 void MipsTargetStreamer::emitDirectiveSetNoReorder() {}
38 void MipsTargetStreamer::emitDirectiveSetMacro() {}
39 void MipsTargetStreamer::emitDirectiveSetNoMacro() {}
40 void MipsTargetStreamer::emitDirectiveSetAt() {}
41 void MipsTargetStreamer::emitDirectiveSetNoAt() {}
42 void MipsTargetStreamer::emitDirectiveEnd(StringRef Name) {}
43 void MipsTargetStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {}
44 void MipsTargetStreamer::emitDirectiveAbiCalls() {}
45 void MipsTargetStreamer::emitDirectiveNaN2008() {}
46 void MipsTargetStreamer::emitDirectiveNaNLegacy() {}
47 void MipsTargetStreamer::emitDirectiveOptionPic0() {}
48 void MipsTargetStreamer::emitDirectiveOptionPic2() {}
49 void MipsTargetStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
50 unsigned ReturnReg) {}
51 void MipsTargetStreamer::emitMask(unsigned CPUBitmask, int CPUTopSavedRegOff) {}
52 void MipsTargetStreamer::emitFMask(unsigned FPUBitmask, int FPUTopSavedRegOff) {
54 void MipsTargetStreamer::emitDirectiveSetMips32R2() {}
55 void MipsTargetStreamer::emitDirectiveSetMips64() {}
56 void MipsTargetStreamer::emitDirectiveSetMips64R2() {}
57 void MipsTargetStreamer::emitDirectiveSetDsp() {}
58 void MipsTargetStreamer::emitDirectiveCpload(unsigned RegNo) {}
59 void MipsTargetStreamer::emitDirectiveCpsetup(unsigned RegNo, int RegOrOffset,
60 const MCSymbol &Sym, bool IsReg) {
62 void MipsTargetStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
64 if (!Enabled && !IsO32ABI)
65 report_fatal_error("+nooddspreg is only valid for O32");
68 MipsTargetAsmStreamer::MipsTargetAsmStreamer(MCStreamer &S,
69 formatted_raw_ostream &OS)
70 : MipsTargetStreamer(S), OS(OS) {}
72 void MipsTargetAsmStreamer::emitDirectiveSetMicroMips() {
73 OS << "\t.set\tmicromips\n";
74 setCanHaveModuleDir(false);
77 void MipsTargetAsmStreamer::emitDirectiveSetNoMicroMips() {
78 OS << "\t.set\tnomicromips\n";
79 setCanHaveModuleDir(false);
82 void MipsTargetAsmStreamer::emitDirectiveSetMips16() {
83 OS << "\t.set\tmips16\n";
84 setCanHaveModuleDir(false);
87 void MipsTargetAsmStreamer::emitDirectiveSetNoMips16() {
88 OS << "\t.set\tnomips16\n";
89 setCanHaveModuleDir(false);
92 void MipsTargetAsmStreamer::emitDirectiveSetReorder() {
93 OS << "\t.set\treorder\n";
94 setCanHaveModuleDir(false);
97 void MipsTargetAsmStreamer::emitDirectiveSetNoReorder() {
98 OS << "\t.set\tnoreorder\n";
99 setCanHaveModuleDir(false);
102 void MipsTargetAsmStreamer::emitDirectiveSetMacro() {
103 OS << "\t.set\tmacro\n";
104 setCanHaveModuleDir(false);
107 void MipsTargetAsmStreamer::emitDirectiveSetNoMacro() {
108 OS << "\t.set\tnomacro\n";
109 setCanHaveModuleDir(false);
112 void MipsTargetAsmStreamer::emitDirectiveSetAt() {
113 OS << "\t.set\tat\n";
114 setCanHaveModuleDir(false);
117 void MipsTargetAsmStreamer::emitDirectiveSetNoAt() {
118 OS << "\t.set\tnoat\n";
119 setCanHaveModuleDir(false);
122 void MipsTargetAsmStreamer::emitDirectiveEnd(StringRef Name) {
123 OS << "\t.end\t" << Name << '\n';
126 void MipsTargetAsmStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
127 OS << "\t.ent\t" << Symbol.getName() << '\n';
130 void MipsTargetAsmStreamer::emitDirectiveAbiCalls() { OS << "\t.abicalls\n"; }
132 void MipsTargetAsmStreamer::emitDirectiveNaN2008() { OS << "\t.nan\t2008\n"; }
134 void MipsTargetAsmStreamer::emitDirectiveNaNLegacy() {
135 OS << "\t.nan\tlegacy\n";
138 void MipsTargetAsmStreamer::emitDirectiveOptionPic0() {
139 OS << "\t.option\tpic0\n";
142 void MipsTargetAsmStreamer::emitDirectiveOptionPic2() {
143 OS << "\t.option\tpic2\n";
146 void MipsTargetAsmStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
147 unsigned ReturnReg) {
149 << StringRef(MipsInstPrinter::getRegisterName(StackReg)).lower() << ","
151 << StringRef(MipsInstPrinter::getRegisterName(ReturnReg)).lower() << '\n';
154 void MipsTargetAsmStreamer::emitDirectiveSetMips32R2() {
155 OS << "\t.set\tmips32r2\n";
156 setCanHaveModuleDir(false);
159 void MipsTargetAsmStreamer::emitDirectiveSetMips64() {
160 OS << "\t.set\tmips64\n";
161 setCanHaveModuleDir(false);
164 void MipsTargetAsmStreamer::emitDirectiveSetMips64R2() {
165 OS << "\t.set\tmips64r2\n";
166 setCanHaveModuleDir(false);
169 void MipsTargetAsmStreamer::emitDirectiveSetDsp() {
170 OS << "\t.set\tdsp\n";
171 setCanHaveModuleDir(false);
173 // Print a 32 bit hex number with all numbers.
174 static void printHex32(unsigned Value, raw_ostream &OS) {
176 for (int i = 7; i >= 0; i--)
177 OS.write_hex((Value & (0xF << (i * 4))) >> (i * 4));
180 void MipsTargetAsmStreamer::emitMask(unsigned CPUBitmask,
181 int CPUTopSavedRegOff) {
183 printHex32(CPUBitmask, OS);
184 OS << ',' << CPUTopSavedRegOff << '\n';
187 void MipsTargetAsmStreamer::emitFMask(unsigned FPUBitmask,
188 int FPUTopSavedRegOff) {
190 printHex32(FPUBitmask, OS);
191 OS << "," << FPUTopSavedRegOff << '\n';
194 void MipsTargetAsmStreamer::emitDirectiveCpload(unsigned RegNo) {
196 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << "\n";
197 setCanHaveModuleDir(false);
200 void MipsTargetAsmStreamer::emitDirectiveCpsetup(unsigned RegNo,
204 OS << "\t.cpsetup\t$"
205 << StringRef(MipsInstPrinter::getRegisterName(RegNo)).lower() << ", ";
209 << StringRef(MipsInstPrinter::getRegisterName(RegOrOffset)).lower();
215 OS << Sym.getName() << "\n";
216 setCanHaveModuleDir(false);
219 void MipsTargetAsmStreamer::emitDirectiveModuleFP(
220 MipsABIFlagsSection::FpABIKind Value, bool Is32BitABI) {
221 MipsTargetStreamer::emitDirectiveModuleFP(Value, Is32BitABI);
223 StringRef ModuleValue;
224 OS << "\t.module\tfp=";
225 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
228 void MipsTargetAsmStreamer::emitDirectiveSetFp(
229 MipsABIFlagsSection::FpABIKind Value) {
230 StringRef ModuleValue;
232 OS << ABIFlagsSection.getFpABIString(Value) << "\n";
235 void MipsTargetAsmStreamer::emitMipsAbiFlags() {
236 // No action required for text output.
239 void MipsTargetAsmStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
241 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
243 OS << "\t.module\t" << (Enabled ? "" : "no") << "oddspreg\n";
246 // This part is for ELF object output.
247 MipsTargetELFStreamer::MipsTargetELFStreamer(MCStreamer &S,
248 const MCSubtargetInfo &STI)
249 : MipsTargetStreamer(S), MicroMipsEnabled(false), STI(STI) {
250 MCAssembler &MCA = getStreamer().getAssembler();
251 uint64_t Features = STI.getFeatureBits();
252 Triple T(STI.getTargetTriple());
253 Pic = (MCA.getContext().getObjectFileInfo()->getRelocM() == Reloc::PIC_)
257 // Update e_header flags
261 if (Features & Mips::FeatureMips64r6)
262 EFlags |= ELF::EF_MIPS_ARCH_64R6;
263 else if (Features & Mips::FeatureMips64r2)
264 EFlags |= ELF::EF_MIPS_ARCH_64R2;
265 else if (Features & Mips::FeatureMips64)
266 EFlags |= ELF::EF_MIPS_ARCH_64;
267 else if (Features & Mips::FeatureMips5)
268 EFlags |= ELF::EF_MIPS_ARCH_5;
269 else if (Features & Mips::FeatureMips4)
270 EFlags |= ELF::EF_MIPS_ARCH_4;
271 else if (Features & Mips::FeatureMips3)
272 EFlags |= ELF::EF_MIPS_ARCH_3;
273 else if (Features & Mips::FeatureMips32r6)
274 EFlags |= ELF::EF_MIPS_ARCH_32R6;
275 else if (Features & Mips::FeatureMips32r2)
276 EFlags |= ELF::EF_MIPS_ARCH_32R2;
277 else if (Features & Mips::FeatureMips32)
278 EFlags |= ELF::EF_MIPS_ARCH_32;
279 else if (Features & Mips::FeatureMips2)
280 EFlags |= ELF::EF_MIPS_ARCH_2;
282 EFlags |= ELF::EF_MIPS_ARCH_1;
285 // N64 does not require any ABI bits.
286 if (Features & Mips::FeatureO32)
287 EFlags |= ELF::EF_MIPS_ABI_O32;
288 else if (Features & Mips::FeatureN32)
289 EFlags |= ELF::EF_MIPS_ABI2;
291 if (Features & Mips::FeatureGP64Bit) {
292 if (Features & Mips::FeatureO32)
293 EFlags |= ELF::EF_MIPS_32BITMODE; /* Compatibility Mode */
294 } else if (Features & Mips::FeatureMips64r2 || Features & Mips::FeatureMips64)
295 EFlags |= ELF::EF_MIPS_32BITMODE;
298 if (Features & Mips::FeatureNaN2008)
299 EFlags |= ELF::EF_MIPS_NAN2008;
301 // -mabicalls and -mplt are not implemented but we should act as if they were
303 EFlags |= ELF::EF_MIPS_CPIC;
304 if (Features & Mips::FeatureN64)
305 EFlags |= ELF::EF_MIPS_PIC;
307 MCA.setELFHeaderEFlags(EFlags);
310 void MipsTargetELFStreamer::emitLabel(MCSymbol *Symbol) {
311 if (!isMicroMipsEnabled())
313 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(Symbol);
314 uint8_t Type = MCELF::GetType(Data);
315 if (Type != ELF::STT_FUNC)
318 // The "other" values are stored in the last 6 bits of the second byte
319 // The traditional defines for STO values assume the full byte and thus
320 // the shift to pack it.
321 MCELF::setOther(Data, ELF::STO_MIPS_MICROMIPS >> 2);
324 void MipsTargetELFStreamer::finish() {
325 MCAssembler &MCA = getStreamer().getAssembler();
326 MCContext &Context = MCA.getContext();
327 MCStreamer &OS = getStreamer();
328 const MCObjectFileInfo &OFI = *Context.getObjectFileInfo();
329 Triple T(STI.getTargetTriple());
330 uint64_t Features = STI.getFeatureBits();
332 // .bss, .text and .data are always at least 16-byte aligned.
333 MCSectionData &TextSectionData =
334 MCA.getOrCreateSectionData(*OFI.getTextSection());
335 MCSectionData &DataSectionData =
336 MCA.getOrCreateSectionData(*OFI.getDataSection());
337 MCSectionData &BSSSectionData =
338 MCA.getOrCreateSectionData(*OFI.getBSSSection());
340 TextSectionData.setAlignment(std::max(16u, TextSectionData.getAlignment()));
341 DataSectionData.setAlignment(std::max(16u, DataSectionData.getAlignment()));
342 BSSSectionData.setAlignment(std::max(16u, BSSSectionData.getAlignment()));
344 if (T.isArch64Bit() && (Features & Mips::FeatureN64)) {
345 // The EntrySize value of 1 seems strange since the records are neither
346 // 1-byte long nor fixed length but it matches the value GAS emits.
347 const MCSectionELF *Sec =
348 Context.getELFSection(".MIPS.options", ELF::SHT_MIPS_OPTIONS,
349 ELF::SHF_ALLOC | ELF::SHF_MIPS_NOSTRIP,
350 SectionKind::getMetadata(), 1, "");
351 MCA.getOrCreateSectionData(*Sec).setAlignment(8);
352 OS.SwitchSection(Sec);
354 OS.EmitIntValue(1, 1); // kind
355 OS.EmitIntValue(40, 1); // size
356 OS.EmitIntValue(0, 2); // section
357 OS.EmitIntValue(0, 4); // info
358 OS.EmitIntValue(0, 4); // ri_gprmask
359 OS.EmitIntValue(0, 4); // pad
360 OS.EmitIntValue(0, 4); // ri_cpr[0]mask
361 OS.EmitIntValue(0, 4); // ri_cpr[1]mask
362 OS.EmitIntValue(0, 4); // ri_cpr[2]mask
363 OS.EmitIntValue(0, 4); // ri_cpr[3]mask
364 OS.EmitIntValue(0, 8); // ri_gp_value
366 const MCSectionELF *Sec =
367 Context.getELFSection(".reginfo", ELF::SHT_MIPS_REGINFO, ELF::SHF_ALLOC,
368 SectionKind::getMetadata(), 24, "");
369 MCA.getOrCreateSectionData(*Sec)
370 .setAlignment(Features & Mips::FeatureN32 ? 8 : 4);
371 OS.SwitchSection(Sec);
373 OS.EmitIntValue(0, 4); // ri_gprmask
374 OS.EmitIntValue(0, 4); // ri_cpr[0]mask
375 OS.EmitIntValue(0, 4); // ri_cpr[1]mask
376 OS.EmitIntValue(0, 4); // ri_cpr[2]mask
377 OS.EmitIntValue(0, 4); // ri_cpr[3]mask
378 OS.EmitIntValue(0, 4); // ri_gp_value
383 void MipsTargetELFStreamer::emitAssignment(MCSymbol *Symbol,
384 const MCExpr *Value) {
385 // If on rhs is micromips symbol then mark Symbol as microMips.
386 if (Value->getKind() != MCExpr::SymbolRef)
388 const MCSymbol &RhsSym =
389 static_cast<const MCSymbolRefExpr *>(Value)->getSymbol();
390 MCSymbolData &Data = getStreamer().getOrCreateSymbolData(&RhsSym);
391 uint8_t Type = MCELF::GetType(Data);
392 if ((Type != ELF::STT_FUNC) ||
393 !(MCELF::getOther(Data) & (ELF::STO_MIPS_MICROMIPS >> 2)))
396 MCSymbolData &SymbolData = getStreamer().getOrCreateSymbolData(Symbol);
397 // The "other" values are stored in the last 6 bits of the second byte.
398 // The traditional defines for STO values assume the full byte and thus
399 // the shift to pack it.
400 MCELF::setOther(SymbolData, ELF::STO_MIPS_MICROMIPS >> 2);
403 MCELFStreamer &MipsTargetELFStreamer::getStreamer() {
404 return static_cast<MCELFStreamer &>(Streamer);
407 void MipsTargetELFStreamer::emitDirectiveSetMicroMips() {
408 MicroMipsEnabled = true;
410 MCAssembler &MCA = getStreamer().getAssembler();
411 unsigned Flags = MCA.getELFHeaderEFlags();
412 Flags |= ELF::EF_MIPS_MICROMIPS;
413 MCA.setELFHeaderEFlags(Flags);
416 void MipsTargetELFStreamer::emitDirectiveSetNoMicroMips() {
417 MicroMipsEnabled = false;
418 setCanHaveModuleDir(false);
421 void MipsTargetELFStreamer::emitDirectiveSetMips16() {
422 MCAssembler &MCA = getStreamer().getAssembler();
423 unsigned Flags = MCA.getELFHeaderEFlags();
424 Flags |= ELF::EF_MIPS_ARCH_ASE_M16;
425 MCA.setELFHeaderEFlags(Flags);
426 setCanHaveModuleDir(false);
429 void MipsTargetELFStreamer::emitDirectiveSetNoMips16() {
431 setCanHaveModuleDir(false);
434 void MipsTargetELFStreamer::emitDirectiveSetReorder() {
436 setCanHaveModuleDir(false);
439 void MipsTargetELFStreamer::emitDirectiveSetNoReorder() {
440 MCAssembler &MCA = getStreamer().getAssembler();
441 unsigned Flags = MCA.getELFHeaderEFlags();
442 Flags |= ELF::EF_MIPS_NOREORDER;
443 MCA.setELFHeaderEFlags(Flags);
444 setCanHaveModuleDir(false);
447 void MipsTargetELFStreamer::emitDirectiveSetMacro() {
449 setCanHaveModuleDir(false);
452 void MipsTargetELFStreamer::emitDirectiveSetNoMacro() {
454 setCanHaveModuleDir(false);
457 void MipsTargetELFStreamer::emitDirectiveSetAt() {
459 setCanHaveModuleDir(false);
462 void MipsTargetELFStreamer::emitDirectiveSetNoAt() {
464 setCanHaveModuleDir(false);
467 void MipsTargetELFStreamer::emitDirectiveEnd(StringRef Name) {
471 void MipsTargetELFStreamer::emitDirectiveEnt(const MCSymbol &Symbol) {
475 void MipsTargetELFStreamer::emitDirectiveAbiCalls() {
476 MCAssembler &MCA = getStreamer().getAssembler();
477 unsigned Flags = MCA.getELFHeaderEFlags();
478 Flags |= ELF::EF_MIPS_CPIC | ELF::EF_MIPS_PIC;
479 MCA.setELFHeaderEFlags(Flags);
482 void MipsTargetELFStreamer::emitDirectiveNaN2008() {
483 MCAssembler &MCA = getStreamer().getAssembler();
484 unsigned Flags = MCA.getELFHeaderEFlags();
485 Flags |= ELF::EF_MIPS_NAN2008;
486 MCA.setELFHeaderEFlags(Flags);
489 void MipsTargetELFStreamer::emitDirectiveNaNLegacy() {
490 MCAssembler &MCA = getStreamer().getAssembler();
491 unsigned Flags = MCA.getELFHeaderEFlags();
492 Flags &= ~ELF::EF_MIPS_NAN2008;
493 MCA.setELFHeaderEFlags(Flags);
496 void MipsTargetELFStreamer::emitDirectiveOptionPic0() {
497 MCAssembler &MCA = getStreamer().getAssembler();
498 unsigned Flags = MCA.getELFHeaderEFlags();
499 // This option overrides other PIC options like -KPIC.
501 Flags &= ~ELF::EF_MIPS_PIC;
502 MCA.setELFHeaderEFlags(Flags);
505 void MipsTargetELFStreamer::emitDirectiveOptionPic2() {
506 MCAssembler &MCA = getStreamer().getAssembler();
507 unsigned Flags = MCA.getELFHeaderEFlags();
509 // NOTE: We are following the GAS behaviour here which means the directive
510 // 'pic2' also sets the CPIC bit in the ELF header. This is different from
511 // what is stated in the SYSV ABI which consider the bits EF_MIPS_PIC and
512 // EF_MIPS_CPIC to be mutually exclusive.
513 Flags |= ELF::EF_MIPS_PIC | ELF::EF_MIPS_CPIC;
514 MCA.setELFHeaderEFlags(Flags);
517 void MipsTargetELFStreamer::emitFrame(unsigned StackReg, unsigned StackSize,
518 unsigned ReturnReg) {
522 void MipsTargetELFStreamer::emitMask(unsigned CPUBitmask,
523 int CPUTopSavedRegOff) {
527 void MipsTargetELFStreamer::emitFMask(unsigned FPUBitmask,
528 int FPUTopSavedRegOff) {
532 void MipsTargetELFStreamer::emitDirectiveSetMips32R2() {
533 setCanHaveModuleDir(false);
536 void MipsTargetELFStreamer::emitDirectiveSetMips64() {
537 setCanHaveModuleDir(false);
540 void MipsTargetELFStreamer::emitDirectiveSetMips64R2() {
541 setCanHaveModuleDir(false);
544 void MipsTargetELFStreamer::emitDirectiveSetDsp() {
545 setCanHaveModuleDir(false);
548 void MipsTargetELFStreamer::emitDirectiveCpload(unsigned RegNo) {
550 // This directive expands to:
551 // lui $gp, %hi(_gp_disp)
552 // addui $gp, $gp, %lo(_gp_disp)
553 // addu $gp, $gp, $reg
554 // when support for position independent code is enabled.
555 if (!Pic || (isN32() || isN64()))
558 // There's a GNU extension controlled by -mno-shared that allows
559 // locally-binding symbols to be accessed using absolute addresses.
560 // This is currently not supported. When supported -mno-shared makes
561 // .cpload expand to:
562 // lui $gp, %hi(__gnu_local_gp)
563 // addiu $gp, $gp, %lo(__gnu_local_gp)
565 StringRef SymName("_gp_disp");
566 MCAssembler &MCA = getStreamer().getAssembler();
567 MCSymbol *GP_Disp = MCA.getContext().GetOrCreateSymbol(SymName);
568 MCA.getOrCreateSymbolData(*GP_Disp);
571 TmpInst.setOpcode(Mips::LUi);
572 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
573 const MCSymbolRefExpr *HiSym = MCSymbolRefExpr::Create(
574 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_HI, MCA.getContext());
575 TmpInst.addOperand(MCOperand::CreateExpr(HiSym));
576 getStreamer().EmitInstruction(TmpInst, STI);
580 TmpInst.setOpcode(Mips::ADDiu);
581 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
582 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
583 const MCSymbolRefExpr *LoSym = MCSymbolRefExpr::Create(
584 "_gp_disp", MCSymbolRefExpr::VK_Mips_ABS_LO, MCA.getContext());
585 TmpInst.addOperand(MCOperand::CreateExpr(LoSym));
586 getStreamer().EmitInstruction(TmpInst, STI);
590 TmpInst.setOpcode(Mips::ADDu);
591 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
592 TmpInst.addOperand(MCOperand::CreateReg(Mips::GP));
593 TmpInst.addOperand(MCOperand::CreateReg(RegNo));
594 getStreamer().EmitInstruction(TmpInst, STI);
596 setCanHaveModuleDir(false);
599 void MipsTargetELFStreamer::emitDirectiveCpsetup(unsigned RegNo,
603 // Only N32 and N64 emit anything for .cpsetup iff PIC is set.
604 if (!Pic || !(isN32() || isN64()))
607 MCAssembler &MCA = getStreamer().getAssembler();
610 // Either store the old $gp in a register or on the stack
612 // move $save, $gpreg
613 Inst.setOpcode(Mips::DADDu);
614 Inst.addOperand(MCOperand::CreateReg(RegOrOffset));
615 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
616 Inst.addOperand(MCOperand::CreateReg(Mips::ZERO));
618 // sd $gpreg, offset($sp)
619 Inst.setOpcode(Mips::SD);
620 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
621 Inst.addOperand(MCOperand::CreateReg(Mips::SP));
622 Inst.addOperand(MCOperand::CreateImm(RegOrOffset));
624 getStreamer().EmitInstruction(Inst, STI);
627 const MCSymbolRefExpr *HiExpr = MCSymbolRefExpr::Create(
628 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_HI, MCA.getContext());
629 const MCSymbolRefExpr *LoExpr = MCSymbolRefExpr::Create(
630 Sym.getName(), MCSymbolRefExpr::VK_Mips_GPOFF_LO, MCA.getContext());
631 // lui $gp, %hi(%neg(%gp_rel(funcSym)))
632 Inst.setOpcode(Mips::LUi);
633 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
634 Inst.addOperand(MCOperand::CreateExpr(HiExpr));
635 getStreamer().EmitInstruction(Inst, STI);
638 // addiu $gp, $gp, %lo(%neg(%gp_rel(funcSym)))
639 Inst.setOpcode(Mips::ADDiu);
640 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
641 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
642 Inst.addOperand(MCOperand::CreateExpr(LoExpr));
643 getStreamer().EmitInstruction(Inst, STI);
646 // daddu $gp, $gp, $funcreg
647 Inst.setOpcode(Mips::DADDu);
648 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
649 Inst.addOperand(MCOperand::CreateReg(Mips::GP));
650 Inst.addOperand(MCOperand::CreateReg(RegNo));
651 getStreamer().EmitInstruction(Inst, STI);
653 setCanHaveModuleDir(false);
656 void MipsTargetELFStreamer::emitMipsAbiFlags() {
657 MCAssembler &MCA = getStreamer().getAssembler();
658 MCContext &Context = MCA.getContext();
659 MCStreamer &OS = getStreamer();
660 const MCSectionELF *Sec =
661 Context.getELFSection(".MIPS.abiflags", ELF::SHT_MIPS_ABIFLAGS,
662 ELF::SHF_ALLOC, SectionKind::getMetadata(), 24, "");
663 MCSectionData &ABIShndxSD = MCA.getOrCreateSectionData(*Sec);
664 ABIShndxSD.setAlignment(8);
665 OS.SwitchSection(Sec);
667 OS << ABIFlagsSection;
670 void MipsTargetELFStreamer::emitDirectiveModuleOddSPReg(bool Enabled,
672 MipsTargetStreamer::emitDirectiveModuleOddSPReg(Enabled, IsO32ABI);
674 ABIFlagsSection.OddSPReg = Enabled;