1 //===-- MipsMCTargetDesc.h - Mips Target Descriptions -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
15 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
26 class MCSubtargetInfo;
30 class raw_pwrite_stream;
32 extern Target TheMipsTarget;
33 extern Target TheMipselTarget;
34 extern Target TheMips64Target;
35 extern Target TheMips64elTarget;
37 MCCodeEmitter *createMipsMCCodeEmitterEB(const MCInstrInfo &MCII,
38 const MCRegisterInfo &MRI,
40 MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
41 const MCRegisterInfo &MRI,
44 MCAsmBackend *createMipsAsmBackendEB32(const Target &T,
45 const MCRegisterInfo &MRI, StringRef TT,
47 MCAsmBackend *createMipsAsmBackendEL32(const Target &T,
48 const MCRegisterInfo &MRI, StringRef TT,
50 MCAsmBackend *createMipsAsmBackendEB64(const Target &T,
51 const MCRegisterInfo &MRI, StringRef TT,
53 MCAsmBackend *createMipsAsmBackendEL64(const Target &T,
54 const MCRegisterInfo &MRI, StringRef TT,
57 MCObjectWriter *createMipsELFObjectWriter(raw_pwrite_stream &OS, uint8_t OSABI,
58 bool IsLittleEndian, bool Is64Bit);
61 StringRef selectMipsCPU(StringRef TT, StringRef CPU);
64 } // End llvm namespace
66 // Defines symbolic names for Mips registers. This defines a mapping from
67 // register name to register number.
68 #define GET_REGINFO_ENUM
69 #include "MipsGenRegisterInfo.inc"
71 // Defines symbolic names for the Mips instructions.
72 #define GET_INSTRINFO_ENUM
73 #include "MipsGenInstrInfo.inc"
75 #define GET_SUBTARGETINFO_ENUM
76 #include "MipsGenSubtargetInfo.inc"