1 //===-- MipsMCTargetDesc.cpp - Mips Target Descriptions -------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides Mips specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #include "InstPrinter/MipsInstPrinter.h"
15 #include "MipsELFStreamer.h"
16 #include "MipsMCAsmInfo.h"
17 #include "MipsMCNaCl.h"
18 #include "MipsMCTargetDesc.h"
19 #include "MipsTargetStreamer.h"
20 #include "llvm/ADT/Triple.h"
21 #include "llvm/MC/MCCodeGenInfo.h"
22 #include "llvm/MC/MCELFStreamer.h"
23 #include "llvm/MC/MCInstrInfo.h"
24 #include "llvm/MC/MCRegisterInfo.h"
25 #include "llvm/MC/MCSubtargetInfo.h"
26 #include "llvm/MC/MCSymbol.h"
27 #include "llvm/MC/MachineLocation.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/Support/FormattedStream.h"
31 #include "llvm/Support/TargetRegistry.h"
35 #define GET_INSTRINFO_MC_DESC
36 #include "MipsGenInstrInfo.inc"
38 #define GET_SUBTARGETINFO_MC_DESC
39 #include "MipsGenSubtargetInfo.inc"
41 #define GET_REGINFO_MC_DESC
42 #include "MipsGenRegisterInfo.inc"
44 /// Select the Mips CPU for the given triple and cpu name.
45 /// FIXME: Merge with the copy in MipsSubtarget.cpp
46 static inline StringRef selectMipsCPU(StringRef TT, StringRef CPU) {
47 if (CPU.empty() || CPU == "generic") {
49 if (TheTriple.getArch() == Triple::mips ||
50 TheTriple.getArch() == Triple::mipsel)
58 static MCInstrInfo *createMipsMCInstrInfo() {
59 MCInstrInfo *X = new MCInstrInfo();
60 InitMipsMCInstrInfo(X);
64 static MCRegisterInfo *createMipsMCRegisterInfo(StringRef TT) {
65 MCRegisterInfo *X = new MCRegisterInfo();
66 InitMipsMCRegisterInfo(X, Mips::RA);
70 static MCSubtargetInfo *createMipsMCSubtargetInfo(StringRef TT, StringRef CPU,
72 CPU = selectMipsCPU(TT, CPU);
73 MCSubtargetInfo *X = new MCSubtargetInfo();
74 InitMipsMCSubtargetInfo(X, TT, CPU, FS);
78 static MCAsmInfo *createMipsMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
79 MCAsmInfo *MAI = new MipsMCAsmInfo(TT);
81 unsigned SP = MRI.getDwarfRegNum(Mips::SP, true);
82 MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, SP, 0);
83 MAI->addInitialFrameState(Inst);
88 static MCCodeGenInfo *createMipsMCCodeGenInfo(StringRef TT, Reloc::Model RM,
90 CodeGenOpt::Level OL) {
91 MCCodeGenInfo *X = new MCCodeGenInfo();
92 if (CM == CodeModel::JITDefault)
94 else if (RM == Reloc::Default)
96 X->InitMCCodeGenInfo(RM, CM, OL);
100 static MCInstPrinter *createMipsMCInstPrinter(const Target &T,
101 unsigned SyntaxVariant,
102 const MCAsmInfo &MAI,
103 const MCInstrInfo &MII,
104 const MCRegisterInfo &MRI,
105 const MCSubtargetInfo &STI) {
106 return new MipsInstPrinter(MAI, MII, MRI);
109 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
110 MCContext &Context, MCAsmBackend &MAB,
111 raw_ostream &OS, MCCodeEmitter *Emitter,
112 const MCSubtargetInfo &STI,
113 bool RelaxAll, bool NoExecStack) {
115 if (!Triple(TT).isOSNaCl())
116 S = createMipsELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll,
119 S = createMipsNaClELFStreamer(Context, MAB, OS, Emitter, STI, RelaxAll,
121 new MipsTargetELFStreamer(*S, STI);
126 createMCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
127 bool isVerboseAsm, bool useDwarfDirectory,
128 MCInstPrinter *InstPrint, MCCodeEmitter *CE,
129 MCAsmBackend *TAB, bool ShowInst) {
130 MCStreamer *S = llvm::createAsmStreamer(
131 Ctx, OS, isVerboseAsm, useDwarfDirectory, InstPrint, CE, TAB, ShowInst);
132 new MipsTargetAsmStreamer(*S, OS);
136 extern "C" void LLVMInitializeMipsTargetMC() {
137 // Register the MC asm info.
138 RegisterMCAsmInfoFn X(TheMipsTarget, createMipsMCAsmInfo);
139 RegisterMCAsmInfoFn Y(TheMipselTarget, createMipsMCAsmInfo);
140 RegisterMCAsmInfoFn A(TheMips64Target, createMipsMCAsmInfo);
141 RegisterMCAsmInfoFn B(TheMips64elTarget, createMipsMCAsmInfo);
143 // Register the MC codegen info.
144 TargetRegistry::RegisterMCCodeGenInfo(TheMipsTarget,
145 createMipsMCCodeGenInfo);
146 TargetRegistry::RegisterMCCodeGenInfo(TheMipselTarget,
147 createMipsMCCodeGenInfo);
148 TargetRegistry::RegisterMCCodeGenInfo(TheMips64Target,
149 createMipsMCCodeGenInfo);
150 TargetRegistry::RegisterMCCodeGenInfo(TheMips64elTarget,
151 createMipsMCCodeGenInfo);
153 // Register the MC instruction info.
154 TargetRegistry::RegisterMCInstrInfo(TheMipsTarget, createMipsMCInstrInfo);
155 TargetRegistry::RegisterMCInstrInfo(TheMipselTarget, createMipsMCInstrInfo);
156 TargetRegistry::RegisterMCInstrInfo(TheMips64Target, createMipsMCInstrInfo);
157 TargetRegistry::RegisterMCInstrInfo(TheMips64elTarget,
158 createMipsMCInstrInfo);
160 // Register the MC register info.
161 TargetRegistry::RegisterMCRegInfo(TheMipsTarget, createMipsMCRegisterInfo);
162 TargetRegistry::RegisterMCRegInfo(TheMipselTarget, createMipsMCRegisterInfo);
163 TargetRegistry::RegisterMCRegInfo(TheMips64Target, createMipsMCRegisterInfo);
164 TargetRegistry::RegisterMCRegInfo(TheMips64elTarget,
165 createMipsMCRegisterInfo);
167 // Register the MC Code Emitter
168 TargetRegistry::RegisterMCCodeEmitter(TheMipsTarget,
169 createMipsMCCodeEmitterEB);
170 TargetRegistry::RegisterMCCodeEmitter(TheMipselTarget,
171 createMipsMCCodeEmitterEL);
172 TargetRegistry::RegisterMCCodeEmitter(TheMips64Target,
173 createMipsMCCodeEmitterEB);
174 TargetRegistry::RegisterMCCodeEmitter(TheMips64elTarget,
175 createMipsMCCodeEmitterEL);
177 // Register the object streamer.
178 TargetRegistry::RegisterMCObjectStreamer(TheMipsTarget, createMCStreamer);
179 TargetRegistry::RegisterMCObjectStreamer(TheMipselTarget, createMCStreamer);
180 TargetRegistry::RegisterMCObjectStreamer(TheMips64Target, createMCStreamer);
181 TargetRegistry::RegisterMCObjectStreamer(TheMips64elTarget,
184 // Register the asm streamer.
185 TargetRegistry::RegisterAsmStreamer(TheMipsTarget, createMCAsmStreamer);
186 TargetRegistry::RegisterAsmStreamer(TheMipselTarget, createMCAsmStreamer);
187 TargetRegistry::RegisterAsmStreamer(TheMips64Target, createMCAsmStreamer);
188 TargetRegistry::RegisterAsmStreamer(TheMips64elTarget, createMCAsmStreamer);
190 // Register the asm backend.
191 TargetRegistry::RegisterMCAsmBackend(TheMipsTarget,
192 createMipsAsmBackendEB32);
193 TargetRegistry::RegisterMCAsmBackend(TheMipselTarget,
194 createMipsAsmBackendEL32);
195 TargetRegistry::RegisterMCAsmBackend(TheMips64Target,
196 createMipsAsmBackendEB64);
197 TargetRegistry::RegisterMCAsmBackend(TheMips64elTarget,
198 createMipsAsmBackendEL64);
200 // Register the MC subtarget info.
201 TargetRegistry::RegisterMCSubtargetInfo(TheMipsTarget,
202 createMipsMCSubtargetInfo);
203 TargetRegistry::RegisterMCSubtargetInfo(TheMipselTarget,
204 createMipsMCSubtargetInfo);
205 TargetRegistry::RegisterMCSubtargetInfo(TheMips64Target,
206 createMipsMCSubtargetInfo);
207 TargetRegistry::RegisterMCSubtargetInfo(TheMips64elTarget,
208 createMipsMCSubtargetInfo);
210 // Register the MCInstPrinter.
211 TargetRegistry::RegisterMCInstPrinter(TheMipsTarget,
212 createMipsMCInstPrinter);
213 TargetRegistry::RegisterMCInstPrinter(TheMipselTarget,
214 createMipsMCInstPrinter);
215 TargetRegistry::RegisterMCInstPrinter(TheMips64Target,
216 createMipsMCInstPrinter);
217 TargetRegistry::RegisterMCInstPrinter(TheMips64elTarget,
218 createMipsMCInstPrinter);