1 //===-- MipsMCCodeEmitter.h - Convert Mips Code to Machine Code -----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file defines the MipsMCCodeEmitter class.
12 //===----------------------------------------------------------------------===//
15 #ifndef LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
16 #define LLVM_LIB_TARGET_MIPS_MCTARGETDESC_MIPSMCCODEEMITTER_H
18 #include "llvm/MC/MCCodeEmitter.h"
19 #include "llvm/Support/DataTypes.h"
30 class MCSubtargetInfo;
33 class MipsMCCodeEmitter : public MCCodeEmitter {
34 MipsMCCodeEmitter(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
35 void operator=(const MipsMCCodeEmitter &) LLVM_DELETED_FUNCTION;
36 const MCInstrInfo &MCII;
40 bool isMicroMips(const MCSubtargetInfo &STI) const;
43 MipsMCCodeEmitter(const MCInstrInfo &mcii, MCContext &Ctx_, bool IsLittle)
44 : MCII(mcii), Ctx(Ctx_), IsLittleEndian(IsLittle) {}
46 ~MipsMCCodeEmitter() {}
48 void EmitByte(unsigned char C, raw_ostream &OS) const;
50 void EmitInstruction(uint64_t Val, unsigned Size, const MCSubtargetInfo &STI,
51 raw_ostream &OS) const;
53 void EncodeInstruction(const MCInst &MI, raw_ostream &OS,
54 SmallVectorImpl<MCFixup> &Fixups,
55 const MCSubtargetInfo &STI) const override;
57 // getBinaryCodeForInstr - TableGen'erated function for getting the
58 // binary encoding for an instruction.
59 uint64_t getBinaryCodeForInstr(const MCInst &MI,
60 SmallVectorImpl<MCFixup> &Fixups,
61 const MCSubtargetInfo &STI) const;
63 // getJumpTargetOpValue - Return binary encoding of the jump
64 // target operand. If the machine operand requires relocation,
65 // record the relocation and return zero.
66 unsigned getJumpTargetOpValue(const MCInst &MI, unsigned OpNo,
67 SmallVectorImpl<MCFixup> &Fixups,
68 const MCSubtargetInfo &STI) const;
70 // getBranchJumpOpValueMM - Return binary encoding of the microMIPS jump
71 // target operand. If the machine operand requires relocation,
72 // record the relocation and return zero.
73 unsigned getJumpTargetOpValueMM(const MCInst &MI, unsigned OpNo,
74 SmallVectorImpl<MCFixup> &Fixups,
75 const MCSubtargetInfo &STI) const;
77 // getUImm5Lsl2Encoding - Return binary encoding of the microMIPS jump
79 unsigned getUImm5Lsl2Encoding(const MCInst &MI, unsigned OpNo,
80 SmallVectorImpl<MCFixup> &Fixups,
81 const MCSubtargetInfo &STI) const;
83 unsigned getSImm3Lsa2Value(const MCInst &MI, unsigned OpNo,
84 SmallVectorImpl<MCFixup> &Fixups,
85 const MCSubtargetInfo &STI) const;
87 unsigned getUImm6Lsl2Encoding(const MCInst &MI, unsigned OpNo,
88 SmallVectorImpl<MCFixup> &Fixups,
89 const MCSubtargetInfo &STI) const;
91 // getSImm9AddiuspValue - Return binary encoding of the microMIPS addiusp
92 // instruction immediate operand.
93 unsigned getSImm9AddiuspValue(const MCInst &MI, unsigned OpNo,
94 SmallVectorImpl<MCFixup> &Fixups,
95 const MCSubtargetInfo &STI) const;
97 // getBranchTargetOpValue - Return binary encoding of the branch
98 // target operand. If the machine operand requires relocation,
99 // record the relocation and return zero.
100 unsigned getBranchTargetOpValue(const MCInst &MI, unsigned OpNo,
101 SmallVectorImpl<MCFixup> &Fixups,
102 const MCSubtargetInfo &STI) const;
104 // getBranchTarget7OpValue - Return binary encoding of the microMIPS branch
105 // target operand. If the machine operand requires relocation,
106 // record the relocation and return zero.
107 unsigned getBranchTarget7OpValueMM(const MCInst &MI, unsigned OpNo,
108 SmallVectorImpl<MCFixup> &Fixups,
109 const MCSubtargetInfo &STI) const;
111 // getBranchTargetOpValue - Return binary encoding of the microMIPS branch
112 // target operand. If the machine operand requires relocation,
113 // record the relocation and return zero.
114 unsigned getBranchTargetOpValueMM(const MCInst &MI, unsigned OpNo,
115 SmallVectorImpl<MCFixup> &Fixups,
116 const MCSubtargetInfo &STI) const;
118 // getBranchTarget21OpValue - Return binary encoding of the branch
119 // offset operand. If the machine operand requires relocation,
120 // record the relocation and return zero.
121 unsigned getBranchTarget21OpValue(const MCInst &MI, unsigned OpNo,
122 SmallVectorImpl<MCFixup> &Fixups,
123 const MCSubtargetInfo &STI) const;
125 // getBranchTarget26OpValue - Return binary encoding of the branch
126 // offset operand. If the machine operand requires relocation,
127 // record the relocation and return zero.
128 unsigned getBranchTarget26OpValue(const MCInst &MI, unsigned OpNo,
129 SmallVectorImpl<MCFixup> &Fixups,
130 const MCSubtargetInfo &STI) const;
132 // getJumpOffset16OpValue - Return binary encoding of the jump
133 // offset operand. If the machine operand requires relocation,
134 // record the relocation and return zero.
135 unsigned getJumpOffset16OpValue(const MCInst &MI, unsigned OpNo,
136 SmallVectorImpl<MCFixup> &Fixups,
137 const MCSubtargetInfo &STI) const;
139 // getMachineOpValue - Return binary encoding of operand. If the machin
140 // operand requires relocation, record the relocation and return zero.
141 unsigned getMachineOpValue(const MCInst &MI, const MCOperand &MO,
142 SmallVectorImpl<MCFixup> &Fixups,
143 const MCSubtargetInfo &STI) const;
145 unsigned getMSAMemEncoding(const MCInst &MI, unsigned OpNo,
146 SmallVectorImpl<MCFixup> &Fixups,
147 const MCSubtargetInfo &STI) const;
149 unsigned getMemEncoding(const MCInst &MI, unsigned OpNo,
150 SmallVectorImpl<MCFixup> &Fixups,
151 const MCSubtargetInfo &STI) const;
152 unsigned getMemEncodingMMImm4(const MCInst &MI, unsigned OpNo,
153 SmallVectorImpl<MCFixup> &Fixups,
154 const MCSubtargetInfo &STI) const;
155 unsigned getMemEncodingMMImm4Lsl1(const MCInst &MI, unsigned OpNo,
156 SmallVectorImpl<MCFixup> &Fixups,
157 const MCSubtargetInfo &STI) const;
158 unsigned getMemEncodingMMImm4Lsl2(const MCInst &MI, unsigned OpNo,
159 SmallVectorImpl<MCFixup> &Fixups,
160 const MCSubtargetInfo &STI) const;
161 unsigned getMemEncodingMMSPImm5Lsl2(const MCInst &MI, unsigned OpNo,
162 SmallVectorImpl<MCFixup> &Fixups,
163 const MCSubtargetInfo &STI) const;
164 unsigned getMemEncodingMMImm12(const MCInst &MI, unsigned OpNo,
165 SmallVectorImpl<MCFixup> &Fixups,
166 const MCSubtargetInfo &STI) const;
167 unsigned getMemEncodingMMImm4sp(const MCInst &MI, unsigned OpNo,
168 SmallVectorImpl<MCFixup> &Fixups,
169 const MCSubtargetInfo &STI) const;
170 unsigned getSizeExtEncoding(const MCInst &MI, unsigned OpNo,
171 SmallVectorImpl<MCFixup> &Fixups,
172 const MCSubtargetInfo &STI) const;
173 unsigned getSizeInsEncoding(const MCInst &MI, unsigned OpNo,
174 SmallVectorImpl<MCFixup> &Fixups,
175 const MCSubtargetInfo &STI) const;
177 // getLSAImmEncoding - Return binary encoding of LSA immediate.
178 unsigned getLSAImmEncoding(const MCInst &MI, unsigned OpNo,
179 SmallVectorImpl<MCFixup> &Fixups,
180 const MCSubtargetInfo &STI) const;
182 unsigned getSimm19Lsl2Encoding(const MCInst &MI, unsigned OpNo,
183 SmallVectorImpl<MCFixup> &Fixups,
184 const MCSubtargetInfo &STI) const;
186 unsigned getSimm18Lsl3Encoding(const MCInst &MI, unsigned OpNo,
187 SmallVectorImpl<MCFixup> &Fixups,
188 const MCSubtargetInfo &STI) const;
190 unsigned getUImm3Mod8Encoding(const MCInst &MI, unsigned OpNo,
191 SmallVectorImpl<MCFixup> &Fixups,
192 const MCSubtargetInfo &STI) const;
193 unsigned getUImm4AndValue(const MCInst &MI, unsigned OpNo,
194 SmallVectorImpl<MCFixup> &Fixups,
195 const MCSubtargetInfo &STI) const;
197 unsigned getRegisterPairOpValue(const MCInst &MI, unsigned OpNo,
198 SmallVectorImpl<MCFixup> &Fixups,
199 const MCSubtargetInfo &STI) const;
201 unsigned getExprOpValue(const MCExpr *Expr, SmallVectorImpl<MCFixup> &Fixups,
202 const MCSubtargetInfo &STI) const;
204 unsigned getRegisterListOpValue(const MCInst &MI, unsigned OpNo,
205 SmallVectorImpl<MCFixup> &Fixups,
206 const MCSubtargetInfo &STI) const;
208 unsigned getRegisterListOpValue16(const MCInst &MI, unsigned OpNo,
209 SmallVectorImpl<MCFixup> &Fixups,
210 const MCSubtargetInfo &STI) const;
211 }; // class MipsMCCodeEmitter