1 //===-- MipsInstPrinter.cpp - Convert Mips MCInst to assembly syntax ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class prints an Mips MCInst to a .s file.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "asm-printer"
15 #include "MipsInstPrinter.h"
16 #include "MipsInstrInfo.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/MC/MCExpr.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/MC/MCInstrInfo.h"
21 #include "llvm/MC/MCSymbol.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/raw_ostream.h"
26 #define PRINT_ALIAS_INSTR
27 #include "MipsGenAsmWriter.inc"
30 static bool isReg(const MCInst &MI, unsigned OpNo) {
31 assert(MI.getOperand(OpNo).isReg() && "Register operand expected.");
32 return MI.getOperand(OpNo).getReg() == R;
35 const char* Mips::MipsFCCToString(Mips::CondCode CC) {
38 case FCOND_T: return "f";
40 case FCOND_OR: return "un";
42 case FCOND_UNE: return "eq";
44 case FCOND_ONE: return "ueq";
46 case FCOND_UGE: return "olt";
48 case FCOND_OGE: return "ult";
50 case FCOND_UGT: return "ole";
52 case FCOND_OGT: return "ule";
54 case FCOND_ST: return "sf";
56 case FCOND_GLE: return "ngle";
58 case FCOND_SNE: return "seq";
60 case FCOND_GL: return "ngl";
62 case FCOND_NLT: return "lt";
64 case FCOND_GE: return "nge";
66 case FCOND_NLE: return "le";
68 case FCOND_GT: return "ngt";
70 llvm_unreachable("Impossible condition code!");
73 void MipsInstPrinter::printRegName(raw_ostream &OS, unsigned RegNo) const {
74 OS << '$' << StringRef(getRegisterName(RegNo)).lower();
77 void MipsInstPrinter::printInst(const MCInst *MI, raw_ostream &O,
79 switch (MI->getOpcode()) {
84 O << "\t.set\tpush\n";
85 O << "\t.set\tmips32r2\n";
88 // Try to print any aliases first.
89 if (!printAliasInstr(MI, O) && !printAlias(*MI, O))
90 printInstruction(MI, O);
91 printAnnotation(O, Annot);
93 switch (MI->getOpcode()) {
102 static void printExpr(const MCExpr *Expr, raw_ostream &OS) {
104 const MCSymbolRefExpr *SRE;
106 if (const MCBinaryExpr *BE = dyn_cast<MCBinaryExpr>(Expr)) {
107 SRE = dyn_cast<MCSymbolRefExpr>(BE->getLHS());
108 const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(BE->getRHS());
109 assert(SRE && CE && "Binary expression must be sym+const.");
110 Offset = CE->getValue();
112 else if (!(SRE = dyn_cast<MCSymbolRefExpr>(Expr)))
113 assert(false && "Unexpected MCExpr type.");
115 MCSymbolRefExpr::VariantKind Kind = SRE->getKind();
118 default: llvm_unreachable("Invalid kind!");
119 case MCSymbolRefExpr::VK_None: break;
120 case MCSymbolRefExpr::VK_Mips_GPREL: OS << "%gp_rel("; break;
121 case MCSymbolRefExpr::VK_Mips_GOT_CALL: OS << "%call16("; break;
122 case MCSymbolRefExpr::VK_Mips_GOT16: OS << "%got("; break;
123 case MCSymbolRefExpr::VK_Mips_GOT: OS << "%got("; break;
124 case MCSymbolRefExpr::VK_Mips_ABS_HI: OS << "%hi("; break;
125 case MCSymbolRefExpr::VK_Mips_ABS_LO: OS << "%lo("; break;
126 case MCSymbolRefExpr::VK_Mips_TLSGD: OS << "%tlsgd("; break;
127 case MCSymbolRefExpr::VK_Mips_TLSLDM: OS << "%tlsldm("; break;
128 case MCSymbolRefExpr::VK_Mips_DTPREL_HI: OS << "%dtprel_hi("; break;
129 case MCSymbolRefExpr::VK_Mips_DTPREL_LO: OS << "%dtprel_lo("; break;
130 case MCSymbolRefExpr::VK_Mips_GOTTPREL: OS << "%gottprel("; break;
131 case MCSymbolRefExpr::VK_Mips_TPREL_HI: OS << "%tprel_hi("; break;
132 case MCSymbolRefExpr::VK_Mips_TPREL_LO: OS << "%tprel_lo("; break;
133 case MCSymbolRefExpr::VK_Mips_GPOFF_HI: OS << "%hi(%neg(%gp_rel("; break;
134 case MCSymbolRefExpr::VK_Mips_GPOFF_LO: OS << "%lo(%neg(%gp_rel("; break;
135 case MCSymbolRefExpr::VK_Mips_GOT_DISP: OS << "%got_disp("; break;
136 case MCSymbolRefExpr::VK_Mips_GOT_PAGE: OS << "%got_page("; break;
137 case MCSymbolRefExpr::VK_Mips_GOT_OFST: OS << "%got_ofst("; break;
138 case MCSymbolRefExpr::VK_Mips_HIGHER: OS << "%higher("; break;
139 case MCSymbolRefExpr::VK_Mips_HIGHEST: OS << "%highest("; break;
140 case MCSymbolRefExpr::VK_Mips_GOT_HI16: OS << "%got_hi("; break;
141 case MCSymbolRefExpr::VK_Mips_GOT_LO16: OS << "%got_lo("; break;
142 case MCSymbolRefExpr::VK_Mips_CALL_HI16: OS << "%call_hi("; break;
143 case MCSymbolRefExpr::VK_Mips_CALL_LO16: OS << "%call_lo("; break;
146 OS << SRE->getSymbol();
154 if ((Kind == MCSymbolRefExpr::VK_Mips_GPOFF_HI) ||
155 (Kind == MCSymbolRefExpr::VK_Mips_GPOFF_LO))
157 else if (Kind != MCSymbolRefExpr::VK_None)
161 void MipsInstPrinter::printOperand(const MCInst *MI, unsigned OpNo,
163 const MCOperand &Op = MI->getOperand(OpNo);
165 printRegName(O, Op.getReg());
174 assert(Op.isExpr() && "unknown operand kind in printOperand");
175 printExpr(Op.getExpr(), O);
178 void MipsInstPrinter::printUnsignedImm(const MCInst *MI, int opNum,
180 const MCOperand &MO = MI->getOperand(opNum);
182 O << (unsigned short int)MO.getImm();
184 printOperand(MI, opNum, O);
187 void MipsInstPrinter::
188 printMemOperand(const MCInst *MI, int opNum, raw_ostream &O) {
189 // Load/Store memory operands -- imm($reg)
190 // If PIC target the target is loaded as the
191 // pattern lw $25,%call16($28)
192 printOperand(MI, opNum+1, O);
194 printOperand(MI, opNum, O);
198 void MipsInstPrinter::
199 printMemOperandEA(const MCInst *MI, int opNum, raw_ostream &O) {
200 // when using stack locations for not load/store instructions
201 // print the same way as all normal 3 operand instructions.
202 printOperand(MI, opNum, O);
204 printOperand(MI, opNum+1, O);
208 void MipsInstPrinter::
209 printFCCOperand(const MCInst *MI, int opNum, raw_ostream &O) {
210 const MCOperand& MO = MI->getOperand(opNum);
211 O << MipsFCCToString((Mips::CondCode)MO.getImm());
214 bool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI,
215 unsigned OpNo, raw_ostream &OS) {
216 OS << "\t" << Str << "\t";
217 printOperand(&MI, OpNo, OS);
221 bool MipsInstPrinter::printAlias(const char *Str, const MCInst &MI,
222 unsigned OpNo0, unsigned OpNo1,
224 printAlias(Str, MI, OpNo0, OS);
226 printOperand(&MI, OpNo1, OS);
230 bool MipsInstPrinter::printAlias(const MCInst &MI, raw_ostream &OS) {
231 switch (MI.getOpcode()) {
233 if (isReg<Mips::ZERO>(MI, 1) && printAlias("beqz", MI, 0, 2, OS))
237 if (isReg<Mips::ZERO_64>(MI, 1) && printAlias("beqz", MI, 0, 2, OS))
241 if (isReg<Mips::ZERO>(MI, 1) && printAlias("bnez", MI, 0, 2, OS))
245 if (isReg<Mips::ZERO_64>(MI, 1) && printAlias("bnez", MI, 0, 2, OS))
249 if (isReg<Mips::FCC0>(MI, 0) && printAlias("bc1t", MI, 1, OS))
253 if (isReg<Mips::FCC0>(MI, 0) && printAlias("bc1f", MI, 1, OS))
257 if (isReg<Mips::ZERO>(MI, 2) && printAlias("move", MI, 0, 1, OS))
260 default: return false;