1 //===-- MSP430RegisterInfo.td - MSP430 Register defs -------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
11 // Declarations that describe the MSP430 register file
12 //===----------------------------------------------------------------------===//
14 class MSP430Reg<bits<4> num, string n> : Register<n> {
15 field bits<4> Num = num;
16 let Namespace = "MSP430";
19 class MSP430RegWithSubregs<bits<4> num, string n, list<Register> subregs>
20 : RegisterWithSubRegs<n, subregs> {
21 field bits<4> Num = num;
22 let Namespace = "MSP430";
25 //===----------------------------------------------------------------------===//
27 //===----------------------------------------------------------------------===//
29 def PCB : MSP430Reg<0, "r0">;
30 def SPB : MSP430Reg<1, "r1">;
31 def SRB : MSP430Reg<2, "r2">;
32 def CGB : MSP430Reg<3, "r3">;
33 def FPB : MSP430Reg<4, "r4">;
34 def R5B : MSP430Reg<5, "r5">;
35 def R6B : MSP430Reg<6, "r6">;
36 def R7B : MSP430Reg<7, "r7">;
37 def R8B : MSP430Reg<8, "r8">;
38 def R9B : MSP430Reg<9, "r9">;
39 def R10B : MSP430Reg<10, "r10">;
40 def R11B : MSP430Reg<11, "r11">;
41 def R12B : MSP430Reg<12, "r12">;
42 def R13B : MSP430Reg<13, "r13">;
43 def R14B : MSP430Reg<14, "r14">;
44 def R15B : MSP430Reg<15, "r15">;
46 def subreg_8bit : SubRegIndex<8> { let Namespace = "MSP430"; }
48 let SubRegIndices = [subreg_8bit] in {
49 def PC : MSP430RegWithSubregs<0, "r0", [PCB]>;
50 def SP : MSP430RegWithSubregs<1, "r1", [SPB]>;
51 def SR : MSP430RegWithSubregs<2, "r2", [SRB]>;
52 def CG : MSP430RegWithSubregs<3, "r3", [CGB]>;
53 def FP : MSP430RegWithSubregs<4, "r4", [FPB]>;
54 def R5 : MSP430RegWithSubregs<5, "r5", [R5B]>;
55 def R6 : MSP430RegWithSubregs<6, "r6", [R6B]>;
56 def R7 : MSP430RegWithSubregs<7, "r7", [R7B]>;
57 def R8 : MSP430RegWithSubregs<8, "r8", [R8B]>;
58 def R9 : MSP430RegWithSubregs<9, "r9", [R9B]>;
59 def R10 : MSP430RegWithSubregs<10, "r10", [R10B]>;
60 def R11 : MSP430RegWithSubregs<11, "r11", [R11B]>;
61 def R12 : MSP430RegWithSubregs<12, "r12", [R12B]>;
62 def R13 : MSP430RegWithSubregs<13, "r13", [R13B]>;
63 def R14 : MSP430RegWithSubregs<14, "r14", [R14B]>;
64 def R15 : MSP430RegWithSubregs<15, "r15", [R15B]>;
67 def GR8 : RegisterClass<"MSP430", [i8], 8,
69 (add R12B, R13B, R14B, R15B, R11B, R10B, R9B, R8B, R7B, R6B, R5B,
70 // Frame pointer, sometimes allocable
72 // Volatile, but not allocable
75 def GR16 : RegisterClass<"MSP430", [i16], 16,
77 (add R12, R13, R14, R15, R11, R10, R9, R8, R7, R6, R5,
78 // Frame pointer, sometimes allocable
80 // Volatile, but not allocable