1 //===- HexagonMCInstrInfo.cpp - Utility functions on Hexagon MCInsts ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // Utility functions for Hexagon specific MCInst queries
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
15 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H
17 #include "HexagonMCExpr.h"
18 #include "llvm/MC/MCInst.h"
21 class HexagonMCChecker;
27 class MCSubtargetInfo;
29 enum class MemAccessSize;
31 class DuplexCandidate {
33 unsigned packetIndexI, packetIndexJ, iClass;
34 DuplexCandidate(unsigned i, unsigned j, unsigned iClass)
35 : packetIndexI(i), packetIndexJ(j), iClass(iClass) {}
37 namespace HexagonMCInstrInfo {
38 size_t const innerLoopOffset = 0;
39 int64_t const innerLoopMask = 1 << innerLoopOffset;
41 size_t const outerLoopOffset = 1;
42 int64_t const outerLoopMask = 1 << outerLoopOffset;
44 // do not reorder memory load/stores by default load/stores are re-ordered
45 // and by default loads can be re-ordered
46 size_t const memReorderDisabledOffset = 2;
47 int64_t const memReorderDisabledMask = 1 << memReorderDisabledOffset;
49 // allow re-ordering of memory stores by default stores cannot be re-ordered
50 size_t const memStoreReorderEnabledOffset = 3;
51 int64_t const memStoreReorderEnabledMask = 1 << memStoreReorderEnabledOffset;
53 size_t const bundleInstructionsOffset = 1;
55 void addConstant(MCInst &MI, uint64_t Value, MCContext &Context);
56 void addConstExtender(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
59 // Returns a iterator range of instructions in this bundle
60 iterator_range<MCInst::const_iterator> bundleInstructions(MCInst const &MCI);
62 // Returns the number of instructions in the bundle
63 size_t bundleSize(MCInst const &MCI);
65 // Put the packet in to canonical form, compound, duplex, pad, and shuffle
66 bool canonicalizePacket(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
67 MCContext &Context, MCInst &MCB,
68 HexagonMCChecker *Checker);
70 // Clamp off upper 26 bits of extendable operand for emission
71 void clampExtended(MCInstrInfo const &MCII, MCContext &Context, MCInst &MCI);
73 // Return the extender for instruction at Index or nullptr if none
74 MCInst const *extenderForIndex(MCInst const &MCB, size_t Index);
75 void extendIfNeeded(MCContext &Context, MCInstrInfo const &MCII, MCInst &MCB,
76 MCInst const &MCI, bool MustExtend);
78 // Create a duplex instruction given the two subinsts
79 MCInst *deriveDuplex(MCContext &Context, unsigned iClass, MCInst const &inst0,
81 MCInst deriveExtender(MCInstrInfo const &MCII, MCInst const &Inst,
84 // Convert this instruction in to a duplex subinst
85 MCInst deriveSubInst(MCInst const &Inst);
87 // Return the extender for instruction at Index or nullptr if none
88 MCInst const *extenderForIndex(MCInst const &MCB, size_t Index);
90 // Return memory access size
91 HexagonII::MemAccessSize getAccessSize(MCInstrInfo const &MCII,
94 // Return number of bits in the constant extended operand.
95 unsigned getBitCount(MCInstrInfo const &MCII, MCInst const &MCI);
97 // Return constant extended operand number.
98 unsigned short getCExtOpNum(MCInstrInfo const &MCII, MCInst const &MCI);
100 MCInstrDesc const &getDesc(MCInstrInfo const &MCII, MCInst const &MCI);
102 // Return which duplex group this instruction belongs to
103 unsigned getDuplexCandidateGroup(MCInst const &MI);
105 // Return a list of all possible instruction duplex combinations
106 SmallVector<DuplexCandidate, 8> getDuplexPossibilties(MCInstrInfo const &MCII,
109 // Return the index of the extendable operand
110 unsigned short getExtendableOp(MCInstrInfo const &MCII, MCInst const &MCI);
112 // Return a reference to the extendable operand
113 MCOperand const &getExtendableOperand(MCInstrInfo const &MCII,
116 // Return the implicit alignment of the extendable operand
117 unsigned getExtentAlignment(MCInstrInfo const &MCII, MCInst const &MCI);
119 // Return the number of logical bits of the extendable operand
120 unsigned getExtentBits(MCInstrInfo const &MCII, MCInst const &MCI);
122 // Return the max value that a constant extendable operand can have
123 // without being extended.
124 int getMaxValue(MCInstrInfo const &MCII, MCInst const &MCI);
126 // Return the min value that a constant extendable operand can have
127 // without being extended.
128 int getMinValue(MCInstrInfo const &MCII, MCInst const &MCI);
130 // Return instruction name
131 char const *getName(MCInstrInfo const &MCII, MCInst const &MCI);
133 // Return the operand index for the new value.
134 unsigned short getNewValueOp(MCInstrInfo const &MCII, MCInst const &MCI);
136 // Return the operand that consumes or produces a new value.
137 MCOperand const &getNewValueOperand(MCInstrInfo const &MCII, MCInst const &MCI);
138 unsigned short getNewValueOp2(MCInstrInfo const &MCII, MCInst const &MCI);
139 MCOperand const &getNewValueOperand2(MCInstrInfo const &MCII,
142 int getSubTarget(MCInstrInfo const &MCII, MCInst const &MCI);
144 // Return the Hexagon ISA class for the insn.
145 unsigned getType(MCInstrInfo const &MCII, MCInst const &MCI);
147 /// Return the slots used by the insn.
148 unsigned getUnits(MCInstrInfo const &MCII, MCSubtargetInfo const &STI,
151 // Does the packet have an extender for the instruction at Index
152 bool hasExtenderForIndex(MCInst const &MCB, size_t Index);
154 bool hasImmExt(MCInst const &MCI);
156 // Return whether the instruction is a legal new-value producer.
157 bool hasNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
158 bool hasNewValue2(MCInstrInfo const &MCII, MCInst const &MCI);
160 // Return the instruction at Index
161 MCInst const &instruction(MCInst const &MCB, size_t Index);
163 // Returns whether this MCInst is a wellformed bundle
164 bool isBundle(MCInst const &MCI);
166 // Return whether the insn is an actual insn.
167 bool isCanon(MCInstrInfo const &MCII, MCInst const &MCI);
168 bool isCompound(MCInstrInfo const &MCII, MCInst const &MCI);
170 // Return the duplex iclass given the two duplex classes
171 unsigned iClassOfDuplexPair(unsigned Ga, unsigned Gb);
173 int64_t minConstant(MCInst const &MCI, size_t Index);
174 template <unsigned N, unsigned S>
175 bool inRange(MCInst const &MCI, size_t Index) {
176 return isShiftedUInt<N, S>(minConstant(MCI, Index));
178 template <unsigned N, unsigned S>
179 bool inSRange(MCInst const &MCI, size_t Index) {
180 return isShiftedInt<N, S>(minConstant(MCI, Index));
182 template <unsigned N> bool inRange(MCInst const &MCI, size_t Index) {
183 return isUInt<N>(minConstant(MCI, Index));
186 // Return whether the instruction needs to be constant extended.
187 bool isConstExtended(MCInstrInfo const &MCII, MCInst const &MCI);
189 // Is this double register suitable for use in a duplex subinst
190 bool isDblRegForSubInst(unsigned Reg);
192 // Is this a duplex instruction
193 bool isDuplex(MCInstrInfo const &MCII, MCInst const &MCI);
195 // Can these instructions be duplexed
196 bool isDuplexPair(MCInst const &MIa, MCInst const &MIb);
198 // Can these duplex classes be combine in to a duplex instruction
199 bool isDuplexPairMatch(unsigned Ga, unsigned Gb);
201 // Return true if the insn may be extended based on the operand value.
202 bool isExtendable(MCInstrInfo const &MCII, MCInst const &MCI);
204 // Return whether the instruction must be always extended.
205 bool isExtended(MCInstrInfo const &MCII, MCInst const &MCI);
207 /// Return whether it is a floating-point insn.
208 bool isFloat(MCInstrInfo const &MCII, MCInst const &MCI);
210 // Returns whether this instruction is an immediate extender
211 bool isImmext(MCInst const &MCI);
213 // Returns whether this bundle is an endloop0
214 bool isInnerLoop(MCInst const &MCI);
216 // Is this an integer register
217 bool isIntReg(unsigned Reg);
219 // Is this register suitable for use in a duplex subinst
220 bool isIntRegForSubInst(unsigned Reg);
221 bool isMemReorderDisabled(MCInst const &MCI);
222 bool isMemStoreReorderEnabled(MCInst const &MCI);
224 // Return whether the insn is a new-value consumer.
225 bool isNewValue(MCInstrInfo const &MCII, MCInst const &MCI);
227 // Return true if the operand can be constant extended.
228 bool isOperandExtended(MCInstrInfo const &MCII, MCInst const &MCI,
229 unsigned short OperandNum);
231 // Can these two instructions be duplexed
232 bool isOrderedDuplexPair(MCInstrInfo const &MCII, MCInst const &MIa,
233 bool ExtendedA, MCInst const &MIb, bool ExtendedB,
236 // Returns whether this bundle is an endloop1
237 bool isOuterLoop(MCInst const &MCI);
239 // Return whether this instruction is predicated
240 bool isPredicated(MCInstrInfo const &MCII, MCInst const &MCI);
241 bool isPredicateLate(MCInstrInfo const &MCII, MCInst const &MCI);
242 bool isPredicatedNew(MCInstrInfo const &MCII, MCInst const &MCI);
244 // Return whether the predicate sense is true
245 bool isPredicatedTrue(MCInstrInfo const &MCII, MCInst const &MCI);
247 // Is this a predicate register
248 bool isPredReg(unsigned Reg);
250 // Return whether the insn is a prefix.
251 bool isPrefix(MCInstrInfo const &MCII, MCInst const &MCI);
253 // Return whether the insn is solo, i.e., cannot be in a packet.
254 bool isSolo(MCInstrInfo const &MCII, MCInst const &MCI);
256 /// Return whether the insn can be packaged only with A and X-type insns.
257 bool isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI);
259 /// Return whether the insn can be packaged only with an A-type insn in slot #1.
260 bool isSoloAin1(MCInstrInfo const &MCII, MCInst const &MCI);
261 bool isVector(MCInstrInfo const &MCII, MCInst const &MCI);
263 // Pad the bundle with nops to satisfy endloop requirements
264 void padEndloop(MCInst &MCI);
266 bool prefersSlot3(MCInstrInfo const &MCII, MCInst const &MCI);
268 // Replace the instructions inside MCB, represented by Candidate
269 void replaceDuplex(MCContext &Context, MCInst &MCB, DuplexCandidate Candidate);
271 // Marks a bundle as endloop0
272 void setInnerLoop(MCInst &MCI);
273 void setMemReorderDisabled(MCInst &MCI);
274 void setMemStoreReorderEnabled(MCInst &MCI);
276 // Marks a bundle as endloop1
277 void setOuterLoop(MCInst &MCI);
279 // Would duplexing this instruction create a requirement to extend
280 bool subInstWouldBeExtended(MCInst const &potentialDuplex);
282 // Attempt to find and replace compound pairs
283 void tryCompound(MCInstrInfo const &MCII, MCContext &Context, MCInst &MCI);
287 #endif // LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCINSTRINFO_H