1 //===-- HexagonMCCodeEmitter.cpp - Hexagon Target Descriptions ------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "MCTargetDesc/HexagonBaseInfo.h"
12 #include "MCTargetDesc/HexagonFixupKinds.h"
13 #include "MCTargetDesc/HexagonMCCodeEmitter.h"
14 #include "MCTargetDesc/HexagonMCInstrInfo.h"
15 #include "MCTargetDesc/HexagonMCTargetDesc.h"
16 #include "llvm/ADT/Statistic.h"
17 #include "llvm/MC/MCCodeEmitter.h"
18 #include "llvm/MC/MCContext.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/MC/MCInst.h"
21 #include "llvm/MC/MCInstrInfo.h"
22 #include "llvm/MC/MCRegisterInfo.h"
23 #include "llvm/MC/MCSubtargetInfo.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/raw_ostream.h"
27 #define DEBUG_TYPE "mccodeemitter"
30 using namespace Hexagon;
32 STATISTIC(MCNumEmitted, "Number of MC instructions emitted");
35 void emitLittleEndian(uint64_t Binary, raw_ostream &OS) {
36 OS << static_cast<uint8_t>((Binary >> 0x00) & 0xff);
37 OS << static_cast<uint8_t>((Binary >> 0x08) & 0xff);
38 OS << static_cast<uint8_t>((Binary >> 0x10) & 0xff);
39 OS << static_cast<uint8_t>((Binary >> 0x18) & 0xff);
43 HexagonMCCodeEmitter::HexagonMCCodeEmitter(MCInstrInfo const &aMII,
45 : MCT(aMCT), MCII(aMII), Addend(new unsigned(0)),
46 Extended(new bool(false)), CurrentBundle(new MCInst const *) {}
48 uint32_t HexagonMCCodeEmitter::parseBits(size_t Instruction, size_t Last,
50 MCInst const &MCI) const {
51 if (Instruction == 0) {
52 if (HexagonMCInstrInfo::isInnerLoop(MCB)) {
53 assert(Instruction != Last);
54 return HexagonII::INST_PARSE_LOOP_END;
57 if (Instruction == 1) {
58 if (HexagonMCInstrInfo::isOuterLoop(MCB)) {
59 assert(Instruction != Last);
60 return HexagonII::INST_PARSE_LOOP_END;
63 if(Instruction == Last)
64 return HexagonII::INST_PARSE_PACKET_END;
65 return HexagonII::INST_PARSE_NOT_END;
68 void HexagonMCCodeEmitter::encodeInstruction(MCInst const &MI, raw_ostream &OS,
69 SmallVectorImpl<MCFixup> &Fixups,
70 MCSubtargetInfo const &STI) const {
71 MCInst &HMB = const_cast<MCInst &>(MI);
73 assert(HexagonMCInstrInfo::isBundle(HMB));
74 DEBUG(dbgs() << "Encoding bundle\n";);
78 size_t Instruction = 0;
79 size_t Last = HexagonMCInstrInfo::bundleSize(HMB) - 1;
80 for (auto &I : HexagonMCInstrInfo::bundleInstructions(HMB)) {
81 MCInst &HMI = const_cast<MCInst &>(*I.getInst());
82 EncodeSingleInstruction(HMI, OS, Fixups, STI,
83 parseBits(Instruction, Last, HMB, HMI),
85 *Extended = HexagonMCInstrInfo::isImmext(HMI);
86 *Addend += HEXAGON_INSTR_SIZE;
92 /// EncodeSingleInstruction - Emit a single
93 void HexagonMCCodeEmitter::EncodeSingleInstruction(
94 const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
95 const MCSubtargetInfo &STI, uint32_t Parse, size_t Index) const {
97 assert(!HexagonMCInstrInfo::isBundle(HMB));
100 // Pseudo instructions don't get encoded and shouldn't be here
101 // in the first place!
102 assert(!HexagonMCInstrInfo::getDesc(MCII, HMB).isPseudo() &&
103 "pseudo-instruction found");
104 DEBUG(dbgs() << "Encoding insn"
105 " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'"
108 if (HexagonMCInstrInfo::isNewValue(MCII, HMB)) {
109 // Calculate the new value distance to the associated producer
111 HMB.getOperand(HexagonMCInstrInfo::getNewValueOp(MCII, HMB));
112 unsigned SOffset = 0;
113 unsigned Register = MCO.getReg();
115 auto Instructions = HexagonMCInstrInfo::bundleInstructions(**CurrentBundle);
116 auto i = Instructions.begin() + Index - 1;
118 assert(i != Instructions.begin() - 1 && "Couldn't find producer");
119 MCInst const &Inst = *i->getInst();
120 if (HexagonMCInstrInfo::isImmext(Inst))
124 HexagonMCInstrInfo::hasNewValue(MCII, Inst)
125 ? HexagonMCInstrInfo::getNewValueOperand(MCII, Inst).getReg()
126 : static_cast<unsigned>(Hexagon::NoRegister);
127 if (Register != Register1)
128 // This isn't the register we're looking for
130 if (!HexagonMCInstrInfo::isPredicated(MCII, Inst))
131 // Producer is unpredicated
133 assert(HexagonMCInstrInfo::isPredicated(MCII, HMB) &&
134 "Unpredicated consumer depending on predicated producer");
135 if (HexagonMCInstrInfo::isPredicatedTrue(MCII, Inst) ==
136 HexagonMCInstrInfo::isPredicatedTrue(MCII, HMB))
137 // Producer predicate sense matched ours
140 // Hexagon PRM 10.11 Construct Nt from distance
141 unsigned Offset = SOffset;
143 MCO.setReg(Offset + Hexagon::R0);
146 Binary = getBinaryCodeForInstr(HMB, Fixups, STI);
147 // Check for unimplemented instructions. Immediate extenders
148 // are encoded as zero, so they need to be accounted for.
150 ((HMB.getOpcode() != DuplexIClass0) && (HMB.getOpcode() != A4_ext) &&
151 (HMB.getOpcode() != A4_ext_b) && (HMB.getOpcode() != A4_ext_c) &&
152 (HMB.getOpcode() != A4_ext_g))) {
153 // Use a A2_nop for unimplemented instructions.
154 DEBUG(dbgs() << "Unimplemented inst: "
155 " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'"
157 llvm_unreachable("Unimplemented Instruction");
160 emitLittleEndian(Binary, OS);
164 static Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI,
166 const MCSymbolRefExpr::VariantKind kind) {
167 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI);
168 unsigned insnType = llvm::HexagonMCInstrInfo::getType(MCII, MI);
170 if (insnType == HexagonII::TypePREFIX) {
172 case llvm::MCSymbolRefExpr::VK_GOTOFF:
173 return Hexagon::fixup_Hexagon_GOTREL_32_6_X;
174 case llvm::MCSymbolRefExpr::VK_GOT:
175 return Hexagon::fixup_Hexagon_GOT_32_6_X;
176 case llvm::MCSymbolRefExpr::VK_TPREL:
177 return Hexagon::fixup_Hexagon_TPREL_32_6_X;
178 case llvm::MCSymbolRefExpr::VK_DTPREL:
179 return Hexagon::fixup_Hexagon_DTPREL_32_6_X;
180 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
181 return Hexagon::fixup_Hexagon_GD_GOT_32_6_X;
182 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
183 return Hexagon::fixup_Hexagon_LD_GOT_32_6_X;
184 case llvm::MCSymbolRefExpr::VK_Hexagon_IE:
185 return Hexagon::fixup_Hexagon_IE_32_6_X;
186 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
187 return Hexagon::fixup_Hexagon_IE_GOT_32_6_X;
190 return Hexagon::fixup_Hexagon_B32_PCREL_X;
192 return Hexagon::fixup_Hexagon_32_6_X;
194 } else if (MCID.isBranch())
195 return (Hexagon::fixup_Hexagon_B13_PCREL);
197 switch (MCID.getOpcode()) {
199 case Hexagon::A2_tfrih:
201 case llvm::MCSymbolRefExpr::VK_GOT:
202 return Hexagon::fixup_Hexagon_GOT_HI16;
203 case llvm::MCSymbolRefExpr::VK_GOTOFF:
204 return Hexagon::fixup_Hexagon_GOTREL_HI16;
205 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
206 return Hexagon::fixup_Hexagon_GD_GOT_HI16;
207 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
208 return Hexagon::fixup_Hexagon_LD_GOT_HI16;
209 case llvm::MCSymbolRefExpr::VK_Hexagon_IE:
210 return Hexagon::fixup_Hexagon_IE_HI16;
211 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
212 return Hexagon::fixup_Hexagon_IE_GOT_HI16;
213 case llvm::MCSymbolRefExpr::VK_TPREL:
214 return Hexagon::fixup_Hexagon_TPREL_HI16;
215 case llvm::MCSymbolRefExpr::VK_DTPREL:
216 return Hexagon::fixup_Hexagon_DTPREL_HI16;
218 return Hexagon::fixup_Hexagon_HI16;
222 case Hexagon::A2_tfril:
224 case llvm::MCSymbolRefExpr::VK_GOT:
225 return Hexagon::fixup_Hexagon_GOT_LO16;
226 case llvm::MCSymbolRefExpr::VK_GOTOFF:
227 return Hexagon::fixup_Hexagon_GOTREL_LO16;
228 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
229 return Hexagon::fixup_Hexagon_GD_GOT_LO16;
230 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
231 return Hexagon::fixup_Hexagon_LD_GOT_LO16;
232 case llvm::MCSymbolRefExpr::VK_Hexagon_IE:
233 return Hexagon::fixup_Hexagon_IE_LO16;
234 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
235 return Hexagon::fixup_Hexagon_IE_GOT_LO16;
236 case llvm::MCSymbolRefExpr::VK_TPREL:
237 return Hexagon::fixup_Hexagon_TPREL_LO16;
238 case llvm::MCSymbolRefExpr::VK_DTPREL:
239 return Hexagon::fixup_Hexagon_DTPREL_LO16;
241 return Hexagon::fixup_Hexagon_LO16;
244 // The only relocs left should be GP relative:
246 if (MCID.mayStore() || MCID.mayLoad()) {
247 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses;
249 if (*ImpUses == Hexagon::GP) {
250 switch (HexagonMCInstrInfo::getAccessSize(MCII, MI)) {
251 case HexagonII::MemAccessSize::ByteAccess:
252 return fixup_Hexagon_GPREL16_0;
253 case HexagonII::MemAccessSize::HalfWordAccess:
254 return fixup_Hexagon_GPREL16_1;
255 case HexagonII::MemAccessSize::WordAccess:
256 return fixup_Hexagon_GPREL16_2;
257 case HexagonII::MemAccessSize::DoubleWordAccess:
258 return fixup_Hexagon_GPREL16_3;
260 llvm_unreachable("unhandled fixup");
265 llvm_unreachable("unhandled fixup");
268 return LastTargetFixupKind;
271 unsigned HexagonMCCodeEmitter::getExprOpValue(const MCInst &MI,
274 SmallVectorImpl<MCFixup> &Fixups,
275 const MCSubtargetInfo &STI) const
280 if (ME->evaluateAsAbsolute(Res))
283 MCExpr::ExprKind MK = ME->getKind();
284 if (MK == MCExpr::Constant) {
285 return cast<MCConstantExpr>(ME)->getValue();
287 if (MK == MCExpr::Binary) {
289 Res = getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getLHS(), Fixups, STI);
291 getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getRHS(), Fixups, STI);
295 assert(MK == MCExpr::SymbolRef);
297 Hexagon::Fixups FixupKind =
298 Hexagon::Fixups(Hexagon::fixup_Hexagon_TPREL_LO16);
299 const MCSymbolRefExpr *MCSRE = static_cast<const MCSymbolRefExpr *>(ME);
300 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI);
301 unsigned bits = HexagonMCInstrInfo::getExtentBits(MCII, MI) -
302 HexagonMCInstrInfo::getExtentAlignment(MCII, MI);
303 const MCSymbolRefExpr::VariantKind kind = MCSRE->getKind();
305 DEBUG(dbgs() << "----------------------------------------\n");
306 DEBUG(dbgs() << "Opcode Name: " << HexagonMCInstrInfo::getName(MCII, MI)
308 DEBUG(dbgs() << "Opcode: " << MCID.getOpcode() << "\n");
309 DEBUG(dbgs() << "Relocation bits: " << bits << "\n");
310 DEBUG(dbgs() << "Addend: " << *Addend << "\n");
311 DEBUG(dbgs() << "----------------------------------------\n");
315 DEBUG(dbgs() << "unrecognized bit count of " << bits << '\n');
320 case llvm::MCSymbolRefExpr::VK_Hexagon_PCREL:
321 FixupKind = Hexagon::fixup_Hexagon_32_PCREL;
323 case llvm::MCSymbolRefExpr::VK_GOT:
324 FixupKind = *Extended ? Hexagon::fixup_Hexagon_GOT_32_6_X
325 : Hexagon::fixup_Hexagon_GOT_32;
327 case llvm::MCSymbolRefExpr::VK_GOTOFF:
328 FixupKind = *Extended ? Hexagon::fixup_Hexagon_GOTREL_32_6_X
329 : Hexagon::fixup_Hexagon_GOTREL_32;
331 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
332 FixupKind = *Extended ? Hexagon::fixup_Hexagon_GD_GOT_32_6_X
333 : Hexagon::fixup_Hexagon_GD_GOT_32;
335 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
336 FixupKind = *Extended ? Hexagon::fixup_Hexagon_LD_GOT_32_6_X
337 : Hexagon::fixup_Hexagon_LD_GOT_32;
339 case llvm::MCSymbolRefExpr::VK_Hexagon_IE:
340 FixupKind = *Extended ? Hexagon::fixup_Hexagon_IE_32_6_X
341 : Hexagon::fixup_Hexagon_IE_32;
343 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
344 FixupKind = *Extended ? Hexagon::fixup_Hexagon_IE_GOT_32_6_X
345 : Hexagon::fixup_Hexagon_IE_GOT_32;
347 case llvm::MCSymbolRefExpr::VK_TPREL:
348 FixupKind = *Extended ? Hexagon::fixup_Hexagon_TPREL_32_6_X
349 : Hexagon::fixup_Hexagon_TPREL_32;
351 case llvm::MCSymbolRefExpr::VK_DTPREL:
352 FixupKind = *Extended ? Hexagon::fixup_Hexagon_DTPREL_32_6_X
353 : Hexagon::fixup_Hexagon_DTPREL_32;
357 *Extended ? Hexagon::fixup_Hexagon_32_6_X : Hexagon::fixup_Hexagon_32;
364 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_PLT:
365 FixupKind = Hexagon::fixup_Hexagon_GD_PLT_B22_PCREL;
367 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_PLT:
368 FixupKind = Hexagon::fixup_Hexagon_LD_PLT_B22_PCREL;
371 if (MCID.isBranch() || MCID.isCall()) {
372 FixupKind = *Extended ? Hexagon::fixup_Hexagon_B22_PCREL_X
373 : Hexagon::fixup_Hexagon_B22_PCREL;
375 errs() << "unrecognized relocation, bits: " << bits << "\n";
376 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
386 FixupKind = Hexagon::fixup_Hexagon_16_X;
388 case llvm::MCSymbolRefExpr::VK_GOT:
389 FixupKind = Hexagon::fixup_Hexagon_GOT_16_X;
391 case llvm::MCSymbolRefExpr::VK_GOTOFF:
392 FixupKind = Hexagon::fixup_Hexagon_GOTREL_16_X;
394 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
395 FixupKind = Hexagon::fixup_Hexagon_GD_GOT_16_X;
397 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
398 FixupKind = Hexagon::fixup_Hexagon_LD_GOT_16_X;
400 case llvm::MCSymbolRefExpr::VK_Hexagon_IE:
401 FixupKind = Hexagon::fixup_Hexagon_IE_16_X;
403 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
404 FixupKind = Hexagon::fixup_Hexagon_IE_GOT_16_X;
406 case llvm::MCSymbolRefExpr::VK_TPREL:
407 FixupKind = Hexagon::fixup_Hexagon_TPREL_16_X;
409 case llvm::MCSymbolRefExpr::VK_DTPREL:
410 FixupKind = Hexagon::fixup_Hexagon_DTPREL_16_X;
416 errs() << "unrecognized relocation, bits " << bits << "\n";
417 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
419 case llvm::MCSymbolRefExpr::VK_GOTOFF:
420 if ((MCID.getOpcode() == Hexagon::HI) ||
421 (MCID.getOpcode() == Hexagon::LO_H))
422 FixupKind = Hexagon::fixup_Hexagon_GOTREL_HI16;
424 FixupKind = Hexagon::fixup_Hexagon_GOTREL_LO16;
426 case llvm::MCSymbolRefExpr::VK_Hexagon_GPREL:
427 FixupKind = Hexagon::fixup_Hexagon_GPREL16_0;
429 case llvm::MCSymbolRefExpr::VK_Hexagon_LO16:
430 FixupKind = Hexagon::fixup_Hexagon_LO16;
432 case llvm::MCSymbolRefExpr::VK_Hexagon_HI16:
433 FixupKind = Hexagon::fixup_Hexagon_HI16;
435 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
436 FixupKind = Hexagon::fixup_Hexagon_GD_GOT_16;
438 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
439 FixupKind = Hexagon::fixup_Hexagon_LD_GOT_16;
441 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
442 FixupKind = Hexagon::fixup_Hexagon_IE_GOT_16;
444 case llvm::MCSymbolRefExpr::VK_TPREL:
445 FixupKind = Hexagon::fixup_Hexagon_TPREL_16;
447 case llvm::MCSymbolRefExpr::VK_DTPREL:
448 FixupKind = Hexagon::fixup_Hexagon_DTPREL_16;
454 if (MCID.isBranch() || MCID.isCall())
455 FixupKind = *Extended ? Hexagon::fixup_Hexagon_B15_PCREL_X
456 : Hexagon::fixup_Hexagon_B15_PCREL;
461 FixupKind = Hexagon::fixup_Hexagon_B13_PCREL;
463 errs() << "unrecognized relocation, bits " << bits << "\n";
464 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
472 FixupKind = Hexagon::fixup_Hexagon_12_X;
474 // There isn't a GOT_12_X, both 11_X and 16_X resolve to 6/26
475 case llvm::MCSymbolRefExpr::VK_GOT:
476 FixupKind = Hexagon::fixup_Hexagon_GOT_16_X;
478 case llvm::MCSymbolRefExpr::VK_GOTOFF:
479 FixupKind = Hexagon::fixup_Hexagon_GOTREL_16_X;
483 errs() << "unrecognized relocation, bits " << bits << "\n";
484 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
492 FixupKind = Hexagon::fixup_Hexagon_11_X;
494 case llvm::MCSymbolRefExpr::VK_GOT:
495 FixupKind = Hexagon::fixup_Hexagon_GOT_11_X;
497 case llvm::MCSymbolRefExpr::VK_GOTOFF:
498 FixupKind = Hexagon::fixup_Hexagon_GOTREL_11_X;
500 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
501 FixupKind = Hexagon::fixup_Hexagon_GD_GOT_11_X;
503 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
504 FixupKind = Hexagon::fixup_Hexagon_LD_GOT_11_X;
506 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
507 FixupKind = Hexagon::fixup_Hexagon_IE_GOT_11_X;
509 case llvm::MCSymbolRefExpr::VK_TPREL:
510 FixupKind = Hexagon::fixup_Hexagon_TPREL_11_X;
512 case llvm::MCSymbolRefExpr::VK_DTPREL:
513 FixupKind = Hexagon::fixup_Hexagon_DTPREL_11_X;
517 errs() << "unrecognized relocation, bits " << bits << "\n";
518 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
524 FixupKind = Hexagon::fixup_Hexagon_10_X;
528 if (MCID.isBranch() ||
529 (llvm::HexagonMCInstrInfo::getType(MCII, MI) == HexagonII::TypeCR))
530 FixupKind = *Extended ? Hexagon::fixup_Hexagon_B9_PCREL_X
531 : Hexagon::fixup_Hexagon_B9_PCREL;
533 FixupKind = Hexagon::fixup_Hexagon_9_X;
535 errs() << "unrecognized relocation, bits " << bits << "\n";
536 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
542 FixupKind = Hexagon::fixup_Hexagon_8_X;
544 errs() << "unrecognized relocation, bits " << bits << "\n";
545 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
550 if (MCID.isBranch() ||
551 (llvm::HexagonMCInstrInfo::getType(MCII, MI) == HexagonII::TypeCR))
552 FixupKind = *Extended ? Hexagon::fixup_Hexagon_B7_PCREL_X
553 : Hexagon::fixup_Hexagon_B7_PCREL;
555 FixupKind = Hexagon::fixup_Hexagon_7_X;
557 errs() << "unrecognized relocation, bits " << bits << "\n";
558 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
566 FixupKind = Hexagon::fixup_Hexagon_6_X;
568 case llvm::MCSymbolRefExpr::VK_Hexagon_PCREL:
569 FixupKind = Hexagon::fixup_Hexagon_6_PCREL_X;
571 // This is part of an extender, GOT_11 is a
572 // Word32_U6 unsigned/truncated reloc.
573 case llvm::MCSymbolRefExpr::VK_GOT:
574 FixupKind = Hexagon::fixup_Hexagon_GOT_11_X;
576 case llvm::MCSymbolRefExpr::VK_GOTOFF:
577 FixupKind = Hexagon::fixup_Hexagon_GOTREL_11_X;
581 errs() << "unrecognized relocation, bits " << bits << "\n";
582 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
587 FixupKind = getFixupNoBits(MCII, MI, MO, kind);
592 MCFixup::create(*Addend, MO.getExpr(), MCFixupKind(FixupKind));
593 Fixups.push_back(fixup);
594 // All of the information is in the fixup.
599 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO,
600 SmallVectorImpl<MCFixup> &Fixups,
601 MCSubtargetInfo const &STI) const {
603 return MCT.getRegisterInfo()->getEncodingValue(MO.getReg());
605 return static_cast<unsigned>(MO.getImm());
609 return getExprOpValue(MI, MO, MO.getExpr(), Fixups, STI);
612 MCCodeEmitter *llvm::createHexagonMCCodeEmitter(MCInstrInfo const &MII,
613 MCRegisterInfo const &MRI,
615 return new HexagonMCCodeEmitter(MII, MCT);
618 #include "HexagonGenMCCodeEmitter.inc"