1 //===-- HexagonMCCodeEmitter.cpp - Hexagon Target Descriptions ------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "MCTargetDesc/HexagonBaseInfo.h"
12 #include "MCTargetDesc/HexagonFixupKinds.h"
13 #include "MCTargetDesc/HexagonMCCodeEmitter.h"
14 #include "MCTargetDesc/HexagonMCInstrInfo.h"
15 #include "MCTargetDesc/HexagonMCTargetDesc.h"
16 #include "llvm/ADT/Statistic.h"
17 #include "llvm/MC/MCCodeEmitter.h"
18 #include "llvm/MC/MCContext.h"
19 #include "llvm/MC/MCExpr.h"
20 #include "llvm/MC/MCInst.h"
21 #include "llvm/MC/MCInstrInfo.h"
22 #include "llvm/MC/MCRegisterInfo.h"
23 #include "llvm/MC/MCSubtargetInfo.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/Support/EndianStream.h"
26 #include "llvm/Support/raw_ostream.h"
28 #define DEBUG_TYPE "mccodeemitter"
31 using namespace Hexagon;
33 STATISTIC(MCNumEmitted, "Number of MC instructions emitted");
35 HexagonMCCodeEmitter::HexagonMCCodeEmitter(MCInstrInfo const &aMII,
37 : MCT(aMCT), MCII(aMII), Addend(new unsigned(0)),
38 Extended(new bool(false)), CurrentBundle(new MCInst const *) {}
40 uint32_t HexagonMCCodeEmitter::parseBits(size_t Instruction, size_t Last,
42 MCInst const &MCI) const {
43 if (Instruction == 0) {
44 if (HexagonMCInstrInfo::isInnerLoop(MCB)) {
45 assert(Instruction != Last);
46 return HexagonII::INST_PARSE_LOOP_END;
49 if (Instruction == 1) {
50 if (HexagonMCInstrInfo::isOuterLoop(MCB)) {
51 assert(Instruction != Last);
52 return HexagonII::INST_PARSE_LOOP_END;
55 if(Instruction == Last)
56 return HexagonII::INST_PARSE_PACKET_END;
57 return HexagonII::INST_PARSE_NOT_END;
60 void HexagonMCCodeEmitter::encodeInstruction(MCInst const &MI, raw_ostream &OS,
61 SmallVectorImpl<MCFixup> &Fixups,
62 MCSubtargetInfo const &STI) const {
63 MCInst &HMB = const_cast<MCInst &>(MI);
65 assert(HexagonMCInstrInfo::isBundle(HMB));
66 DEBUG(dbgs() << "Encoding bundle\n";);
70 size_t Instruction = 0;
71 size_t Last = HexagonMCInstrInfo::bundleSize(HMB) - 1;
72 for (auto &I : HexagonMCInstrInfo::bundleInstructions(HMB)) {
73 MCInst &HMI = const_cast<MCInst &>(*I.getInst());
74 EncodeSingleInstruction(HMI, OS, Fixups, STI,
75 parseBits(Instruction, Last, HMB, HMI),
77 *Extended = HexagonMCInstrInfo::isImmext(HMI);
78 *Addend += HEXAGON_INSTR_SIZE;
84 /// EncodeSingleInstruction - Emit a single
85 void HexagonMCCodeEmitter::EncodeSingleInstruction(
86 const MCInst &MI, raw_ostream &OS, SmallVectorImpl<MCFixup> &Fixups,
87 const MCSubtargetInfo &STI, uint32_t Parse, size_t Index) const {
89 assert(!HexagonMCInstrInfo::isBundle(HMB));
92 // Pseudo instructions don't get encoded and shouldn't be here
93 // in the first place!
94 assert(!HexagonMCInstrInfo::getDesc(MCII, HMB).isPseudo() &&
95 "pseudo-instruction found");
96 DEBUG(dbgs() << "Encoding insn"
97 " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'"
100 if (HexagonMCInstrInfo::isNewValue(MCII, HMB)) {
101 // Calculate the new value distance to the associated producer
103 HMB.getOperand(HexagonMCInstrInfo::getNewValueOp(MCII, HMB));
104 unsigned SOffset = 0;
105 unsigned Register = MCO.getReg();
107 auto Instructions = HexagonMCInstrInfo::bundleInstructions(**CurrentBundle);
108 auto i = Instructions.begin() + Index - 1;
110 assert(i != Instructions.begin() - 1 && "Couldn't find producer");
111 MCInst const &Inst = *i->getInst();
112 if (HexagonMCInstrInfo::isImmext(Inst))
116 HexagonMCInstrInfo::hasNewValue(MCII, Inst)
117 ? HexagonMCInstrInfo::getNewValueOperand(MCII, Inst).getReg()
118 : static_cast<unsigned>(Hexagon::NoRegister);
119 if (Register != Register1)
120 // This isn't the register we're looking for
122 if (!HexagonMCInstrInfo::isPredicated(MCII, Inst))
123 // Producer is unpredicated
125 assert(HexagonMCInstrInfo::isPredicated(MCII, HMB) &&
126 "Unpredicated consumer depending on predicated producer");
127 if (HexagonMCInstrInfo::isPredicatedTrue(MCII, Inst) ==
128 HexagonMCInstrInfo::isPredicatedTrue(MCII, HMB))
129 // Producer predicate sense matched ours
132 // Hexagon PRM 10.11 Construct Nt from distance
133 unsigned Offset = SOffset;
135 MCO.setReg(Offset + Hexagon::R0);
138 Binary = getBinaryCodeForInstr(HMB, Fixups, STI);
139 // Check for unimplemented instructions. Immediate extenders
140 // are encoded as zero, so they need to be accounted for.
142 ((HMB.getOpcode() != DuplexIClass0) && (HMB.getOpcode() != A4_ext) &&
143 (HMB.getOpcode() != A4_ext_b) && (HMB.getOpcode() != A4_ext_c) &&
144 (HMB.getOpcode() != A4_ext_g))) {
145 // Use a A2_nop for unimplemented instructions.
146 DEBUG(dbgs() << "Unimplemented inst: "
147 " `" << HexagonMCInstrInfo::getName(MCII, HMB) << "'"
149 llvm_unreachable("Unimplemented Instruction");
152 support::endian::Writer<support::little>(OS).write<uint32_t>(Binary);
156 static Hexagon::Fixups getFixupNoBits(MCInstrInfo const &MCII, const MCInst &MI,
158 const MCSymbolRefExpr::VariantKind kind) {
159 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI);
160 unsigned insnType = llvm::HexagonMCInstrInfo::getType(MCII, MI);
162 if (insnType == HexagonII::TypePREFIX) {
164 case llvm::MCSymbolRefExpr::VK_GOTOFF:
165 return Hexagon::fixup_Hexagon_GOTREL_32_6_X;
166 case llvm::MCSymbolRefExpr::VK_GOT:
167 return Hexagon::fixup_Hexagon_GOT_32_6_X;
168 case llvm::MCSymbolRefExpr::VK_TPREL:
169 return Hexagon::fixup_Hexagon_TPREL_32_6_X;
170 case llvm::MCSymbolRefExpr::VK_DTPREL:
171 return Hexagon::fixup_Hexagon_DTPREL_32_6_X;
172 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
173 return Hexagon::fixup_Hexagon_GD_GOT_32_6_X;
174 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
175 return Hexagon::fixup_Hexagon_LD_GOT_32_6_X;
176 case llvm::MCSymbolRefExpr::VK_Hexagon_IE:
177 return Hexagon::fixup_Hexagon_IE_32_6_X;
178 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
179 return Hexagon::fixup_Hexagon_IE_GOT_32_6_X;
182 return Hexagon::fixup_Hexagon_B32_PCREL_X;
184 return Hexagon::fixup_Hexagon_32_6_X;
186 } else if (MCID.isBranch())
187 return (Hexagon::fixup_Hexagon_B13_PCREL);
189 switch (MCID.getOpcode()) {
191 case Hexagon::A2_tfrih:
193 case llvm::MCSymbolRefExpr::VK_GOT:
194 return Hexagon::fixup_Hexagon_GOT_HI16;
195 case llvm::MCSymbolRefExpr::VK_GOTOFF:
196 return Hexagon::fixup_Hexagon_GOTREL_HI16;
197 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
198 return Hexagon::fixup_Hexagon_GD_GOT_HI16;
199 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
200 return Hexagon::fixup_Hexagon_LD_GOT_HI16;
201 case llvm::MCSymbolRefExpr::VK_Hexagon_IE:
202 return Hexagon::fixup_Hexagon_IE_HI16;
203 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
204 return Hexagon::fixup_Hexagon_IE_GOT_HI16;
205 case llvm::MCSymbolRefExpr::VK_TPREL:
206 return Hexagon::fixup_Hexagon_TPREL_HI16;
207 case llvm::MCSymbolRefExpr::VK_DTPREL:
208 return Hexagon::fixup_Hexagon_DTPREL_HI16;
210 return Hexagon::fixup_Hexagon_HI16;
214 case Hexagon::A2_tfril:
216 case llvm::MCSymbolRefExpr::VK_GOT:
217 return Hexagon::fixup_Hexagon_GOT_LO16;
218 case llvm::MCSymbolRefExpr::VK_GOTOFF:
219 return Hexagon::fixup_Hexagon_GOTREL_LO16;
220 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
221 return Hexagon::fixup_Hexagon_GD_GOT_LO16;
222 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
223 return Hexagon::fixup_Hexagon_LD_GOT_LO16;
224 case llvm::MCSymbolRefExpr::VK_Hexagon_IE:
225 return Hexagon::fixup_Hexagon_IE_LO16;
226 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
227 return Hexagon::fixup_Hexagon_IE_GOT_LO16;
228 case llvm::MCSymbolRefExpr::VK_TPREL:
229 return Hexagon::fixup_Hexagon_TPREL_LO16;
230 case llvm::MCSymbolRefExpr::VK_DTPREL:
231 return Hexagon::fixup_Hexagon_DTPREL_LO16;
233 return Hexagon::fixup_Hexagon_LO16;
236 // The only relocs left should be GP relative:
238 if (MCID.mayStore() || MCID.mayLoad()) {
239 for (const uint16_t *ImpUses = MCID.getImplicitUses(); *ImpUses;
241 if (*ImpUses == Hexagon::GP) {
242 switch (HexagonMCInstrInfo::getAccessSize(MCII, MI)) {
243 case HexagonII::MemAccessSize::ByteAccess:
244 return fixup_Hexagon_GPREL16_0;
245 case HexagonII::MemAccessSize::HalfWordAccess:
246 return fixup_Hexagon_GPREL16_1;
247 case HexagonII::MemAccessSize::WordAccess:
248 return fixup_Hexagon_GPREL16_2;
249 case HexagonII::MemAccessSize::DoubleWordAccess:
250 return fixup_Hexagon_GPREL16_3;
252 llvm_unreachable("unhandled fixup");
257 llvm_unreachable("unhandled fixup");
260 return LastTargetFixupKind;
263 unsigned HexagonMCCodeEmitter::getExprOpValue(const MCInst &MI,
266 SmallVectorImpl<MCFixup> &Fixups,
267 const MCSubtargetInfo &STI) const
272 if (ME->evaluateAsAbsolute(Res))
275 MCExpr::ExprKind MK = ME->getKind();
276 if (MK == MCExpr::Constant) {
277 return cast<MCConstantExpr>(ME)->getValue();
279 if (MK == MCExpr::Binary) {
281 Res = getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getLHS(), Fixups, STI);
283 getExprOpValue(MI, MO, cast<MCBinaryExpr>(ME)->getRHS(), Fixups, STI);
287 assert(MK == MCExpr::SymbolRef);
289 Hexagon::Fixups FixupKind =
290 Hexagon::Fixups(Hexagon::fixup_Hexagon_TPREL_LO16);
291 const MCSymbolRefExpr *MCSRE = static_cast<const MCSymbolRefExpr *>(ME);
292 const MCInstrDesc &MCID = HexagonMCInstrInfo::getDesc(MCII, MI);
293 unsigned bits = HexagonMCInstrInfo::getExtentBits(MCII, MI) -
294 HexagonMCInstrInfo::getExtentAlignment(MCII, MI);
295 const MCSymbolRefExpr::VariantKind kind = MCSRE->getKind();
297 DEBUG(dbgs() << "----------------------------------------\n");
298 DEBUG(dbgs() << "Opcode Name: " << HexagonMCInstrInfo::getName(MCII, MI)
300 DEBUG(dbgs() << "Opcode: " << MCID.getOpcode() << "\n");
301 DEBUG(dbgs() << "Relocation bits: " << bits << "\n");
302 DEBUG(dbgs() << "Addend: " << *Addend << "\n");
303 DEBUG(dbgs() << "----------------------------------------\n");
307 DEBUG(dbgs() << "unrecognized bit count of " << bits << '\n');
312 case llvm::MCSymbolRefExpr::VK_Hexagon_PCREL:
313 FixupKind = Hexagon::fixup_Hexagon_32_PCREL;
315 case llvm::MCSymbolRefExpr::VK_GOT:
316 FixupKind = *Extended ? Hexagon::fixup_Hexagon_GOT_32_6_X
317 : Hexagon::fixup_Hexagon_GOT_32;
319 case llvm::MCSymbolRefExpr::VK_GOTOFF:
320 FixupKind = *Extended ? Hexagon::fixup_Hexagon_GOTREL_32_6_X
321 : Hexagon::fixup_Hexagon_GOTREL_32;
323 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
324 FixupKind = *Extended ? Hexagon::fixup_Hexagon_GD_GOT_32_6_X
325 : Hexagon::fixup_Hexagon_GD_GOT_32;
327 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
328 FixupKind = *Extended ? Hexagon::fixup_Hexagon_LD_GOT_32_6_X
329 : Hexagon::fixup_Hexagon_LD_GOT_32;
331 case llvm::MCSymbolRefExpr::VK_Hexagon_IE:
332 FixupKind = *Extended ? Hexagon::fixup_Hexagon_IE_32_6_X
333 : Hexagon::fixup_Hexagon_IE_32;
335 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
336 FixupKind = *Extended ? Hexagon::fixup_Hexagon_IE_GOT_32_6_X
337 : Hexagon::fixup_Hexagon_IE_GOT_32;
339 case llvm::MCSymbolRefExpr::VK_TPREL:
340 FixupKind = *Extended ? Hexagon::fixup_Hexagon_TPREL_32_6_X
341 : Hexagon::fixup_Hexagon_TPREL_32;
343 case llvm::MCSymbolRefExpr::VK_DTPREL:
344 FixupKind = *Extended ? Hexagon::fixup_Hexagon_DTPREL_32_6_X
345 : Hexagon::fixup_Hexagon_DTPREL_32;
349 *Extended ? Hexagon::fixup_Hexagon_32_6_X : Hexagon::fixup_Hexagon_32;
356 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_PLT:
357 FixupKind = Hexagon::fixup_Hexagon_GD_PLT_B22_PCREL;
359 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_PLT:
360 FixupKind = Hexagon::fixup_Hexagon_LD_PLT_B22_PCREL;
363 if (MCID.isBranch() || MCID.isCall()) {
364 FixupKind = *Extended ? Hexagon::fixup_Hexagon_B22_PCREL_X
365 : Hexagon::fixup_Hexagon_B22_PCREL;
367 errs() << "unrecognized relocation, bits: " << bits << "\n";
368 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
378 FixupKind = Hexagon::fixup_Hexagon_16_X;
380 case llvm::MCSymbolRefExpr::VK_GOT:
381 FixupKind = Hexagon::fixup_Hexagon_GOT_16_X;
383 case llvm::MCSymbolRefExpr::VK_GOTOFF:
384 FixupKind = Hexagon::fixup_Hexagon_GOTREL_16_X;
386 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
387 FixupKind = Hexagon::fixup_Hexagon_GD_GOT_16_X;
389 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
390 FixupKind = Hexagon::fixup_Hexagon_LD_GOT_16_X;
392 case llvm::MCSymbolRefExpr::VK_Hexagon_IE:
393 FixupKind = Hexagon::fixup_Hexagon_IE_16_X;
395 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
396 FixupKind = Hexagon::fixup_Hexagon_IE_GOT_16_X;
398 case llvm::MCSymbolRefExpr::VK_TPREL:
399 FixupKind = Hexagon::fixup_Hexagon_TPREL_16_X;
401 case llvm::MCSymbolRefExpr::VK_DTPREL:
402 FixupKind = Hexagon::fixup_Hexagon_DTPREL_16_X;
408 errs() << "unrecognized relocation, bits " << bits << "\n";
409 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
411 case llvm::MCSymbolRefExpr::VK_GOTOFF:
412 if ((MCID.getOpcode() == Hexagon::HI) ||
413 (MCID.getOpcode() == Hexagon::LO_H))
414 FixupKind = Hexagon::fixup_Hexagon_GOTREL_HI16;
416 FixupKind = Hexagon::fixup_Hexagon_GOTREL_LO16;
418 case llvm::MCSymbolRefExpr::VK_Hexagon_GPREL:
419 FixupKind = Hexagon::fixup_Hexagon_GPREL16_0;
421 case llvm::MCSymbolRefExpr::VK_Hexagon_LO16:
422 FixupKind = Hexagon::fixup_Hexagon_LO16;
424 case llvm::MCSymbolRefExpr::VK_Hexagon_HI16:
425 FixupKind = Hexagon::fixup_Hexagon_HI16;
427 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
428 FixupKind = Hexagon::fixup_Hexagon_GD_GOT_16;
430 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
431 FixupKind = Hexagon::fixup_Hexagon_LD_GOT_16;
433 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
434 FixupKind = Hexagon::fixup_Hexagon_IE_GOT_16;
436 case llvm::MCSymbolRefExpr::VK_TPREL:
437 FixupKind = Hexagon::fixup_Hexagon_TPREL_16;
439 case llvm::MCSymbolRefExpr::VK_DTPREL:
440 FixupKind = Hexagon::fixup_Hexagon_DTPREL_16;
446 if (MCID.isBranch() || MCID.isCall())
447 FixupKind = *Extended ? Hexagon::fixup_Hexagon_B15_PCREL_X
448 : Hexagon::fixup_Hexagon_B15_PCREL;
453 FixupKind = Hexagon::fixup_Hexagon_B13_PCREL;
455 errs() << "unrecognized relocation, bits " << bits << "\n";
456 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
464 FixupKind = Hexagon::fixup_Hexagon_12_X;
466 // There isn't a GOT_12_X, both 11_X and 16_X resolve to 6/26
467 case llvm::MCSymbolRefExpr::VK_GOT:
468 FixupKind = Hexagon::fixup_Hexagon_GOT_16_X;
470 case llvm::MCSymbolRefExpr::VK_GOTOFF:
471 FixupKind = Hexagon::fixup_Hexagon_GOTREL_16_X;
475 errs() << "unrecognized relocation, bits " << bits << "\n";
476 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
484 FixupKind = Hexagon::fixup_Hexagon_11_X;
486 case llvm::MCSymbolRefExpr::VK_GOT:
487 FixupKind = Hexagon::fixup_Hexagon_GOT_11_X;
489 case llvm::MCSymbolRefExpr::VK_GOTOFF:
490 FixupKind = Hexagon::fixup_Hexagon_GOTREL_11_X;
492 case llvm::MCSymbolRefExpr::VK_Hexagon_GD_GOT:
493 FixupKind = Hexagon::fixup_Hexagon_GD_GOT_11_X;
495 case llvm::MCSymbolRefExpr::VK_Hexagon_LD_GOT:
496 FixupKind = Hexagon::fixup_Hexagon_LD_GOT_11_X;
498 case llvm::MCSymbolRefExpr::VK_Hexagon_IE_GOT:
499 FixupKind = Hexagon::fixup_Hexagon_IE_GOT_11_X;
501 case llvm::MCSymbolRefExpr::VK_TPREL:
502 FixupKind = Hexagon::fixup_Hexagon_TPREL_11_X;
504 case llvm::MCSymbolRefExpr::VK_DTPREL:
505 FixupKind = Hexagon::fixup_Hexagon_DTPREL_11_X;
509 errs() << "unrecognized relocation, bits " << bits << "\n";
510 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
516 FixupKind = Hexagon::fixup_Hexagon_10_X;
520 if (MCID.isBranch() ||
521 (llvm::HexagonMCInstrInfo::getType(MCII, MI) == HexagonII::TypeCR))
522 FixupKind = *Extended ? Hexagon::fixup_Hexagon_B9_PCREL_X
523 : Hexagon::fixup_Hexagon_B9_PCREL;
525 FixupKind = Hexagon::fixup_Hexagon_9_X;
527 errs() << "unrecognized relocation, bits " << bits << "\n";
528 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
534 FixupKind = Hexagon::fixup_Hexagon_8_X;
536 errs() << "unrecognized relocation, bits " << bits << "\n";
537 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
542 if (MCID.isBranch() ||
543 (llvm::HexagonMCInstrInfo::getType(MCII, MI) == HexagonII::TypeCR))
544 FixupKind = *Extended ? Hexagon::fixup_Hexagon_B7_PCREL_X
545 : Hexagon::fixup_Hexagon_B7_PCREL;
547 FixupKind = Hexagon::fixup_Hexagon_7_X;
549 errs() << "unrecognized relocation, bits " << bits << "\n";
550 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
558 FixupKind = Hexagon::fixup_Hexagon_6_X;
560 case llvm::MCSymbolRefExpr::VK_Hexagon_PCREL:
561 FixupKind = Hexagon::fixup_Hexagon_6_PCREL_X;
563 // This is part of an extender, GOT_11 is a
564 // Word32_U6 unsigned/truncated reloc.
565 case llvm::MCSymbolRefExpr::VK_GOT:
566 FixupKind = Hexagon::fixup_Hexagon_GOT_11_X;
568 case llvm::MCSymbolRefExpr::VK_GOTOFF:
569 FixupKind = Hexagon::fixup_Hexagon_GOTREL_11_X;
573 errs() << "unrecognized relocation, bits " << bits << "\n";
574 errs() << "name = " << HexagonMCInstrInfo::getName(MCII, MI) << "\n";
579 FixupKind = getFixupNoBits(MCII, MI, MO, kind);
584 MCFixup::create(*Addend, MO.getExpr(), MCFixupKind(FixupKind));
585 Fixups.push_back(fixup);
586 // All of the information is in the fixup.
591 HexagonMCCodeEmitter::getMachineOpValue(MCInst const &MI, MCOperand const &MO,
592 SmallVectorImpl<MCFixup> &Fixups,
593 MCSubtargetInfo const &STI) const {
595 return MCT.getRegisterInfo()->getEncodingValue(MO.getReg());
597 return static_cast<unsigned>(MO.getImm());
601 return getExprOpValue(MI, MO, MO.getExpr(), Fixups, STI);
604 MCCodeEmitter *llvm::createHexagonMCCodeEmitter(MCInstrInfo const &MII,
605 MCRegisterInfo const &MRI,
607 return new HexagonMCCodeEmitter(MII, MCT);
610 #include "HexagonGenMCCodeEmitter.inc"