1 //===-- HexagonBaseInfo.h - Top level definitions for Hexagon --*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains small standalone helper functions and enum definitions for
11 // the Hexagon target useful for the compiler back-end and the MC libraries.
12 // As such, it deliberately does not include references to LLVM core
13 // code gen types, passes, etc..
15 //===----------------------------------------------------------------------===//
17 #ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
18 #define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONBASEINFO_H
20 #include "HexagonMCTargetDesc.h"
21 #include "llvm/Support/ErrorHandling.h"
26 /// HexagonII - This namespace holds all of the target specific flags that
27 /// instruction info tracks.
30 // *** The code below must match HexagonInstrFormat*.td *** //
33 // *** Must match HexagonInstrFormat*.td ***
46 TypePREFIX = 30, // Such as extenders.
47 TypeENDLOOP = 31 // Such as end of a HW loop.
64 NoAddrMode = 0, // No addressing mode
65 Absolute = 1, // Absolute addressing mode
66 AbsoluteSet = 2, // Absolute set addressing mode
67 BaseImmOffset = 3, // Indirect with offset
68 BaseLongOffset = 4, // Indirect with long offset
69 BaseRegOffset = 5, // Indirect with register offset
70 PostInc = 6 // Post increment addressing mode
73 enum class MemAccessSize {
74 NoMemAccess = 0, // Not a memory acces instruction.
75 ByteAccess = 1, // Byte access instruction (memb).
76 HalfWordAccess = 2, // Half word access instruction (memh).
77 WordAccess = 3, // Word access instruction (memw).
78 DoubleWordAccess = 4 // Double word access instruction (memd)
81 // MCInstrDesc TSFlags
82 // *** Must match HexagonInstrFormat*.td ***
84 // This 5-bit field describes the insn type.
91 // Packed only with A or X-type instructions.
94 // Only A-type instruction in first slot or nothing.
98 // Predicated instructions.
100 PredicatedMask = 0x1,
101 PredicatedFalsePos = 9,
102 PredicatedFalseMask = 0x1,
103 PredicatedNewPos = 10,
104 PredicatedNewMask = 0x1,
105 PredicateLatePos = 11,
106 PredicateLateMask = 0x1,
108 // New-Value consumer instructions.
111 // New-Value producer instructions.
113 hasNewValueMask = 0x1,
114 // Which operand consumes or produces a new value.
116 NewValueOpMask = 0x7,
117 // Stores that can become new-value stores.
119 mayNVStoreMask = 0x1,
120 // New-value store instructions.
123 // Loads that can become current-value loads.
126 // Current-value load instructions.
132 ExtendableMask = 0x1,
133 // Insns must be extended.
136 // Which operand may be extended.
137 ExtendableOpPos = 23,
138 ExtendableOpMask = 0x7,
139 // Signed or unsigned range.
140 ExtentSignedPos = 26,
141 ExtentSignedMask = 0x1,
142 // Number of bits of range before extending operand.
144 ExtentBitsMask = 0x1f,
145 // Alignment power-of-two before extending operand.
147 ExtentAlignMask = 0x3,
150 validSubTargetPos = 34,
151 validSubTargetMask = 0xf,
153 // Addressing mode for load/store instructions.
156 // Access size for load/store instructions.
157 MemAccessSizePos = 43,
158 MemAccesSizeMask = 0x7,
160 // Branch predicted taken.
164 // Floating-point instructions.
169 // *** The code above must match HexagonInstrFormat*.td *** //
171 // Hexagon specific MO operand flag mask.
172 enum HexagonMOTargetFlagVal {
173 //===------------------------------------------------------------------===//
174 // Hexagon Specific MachineOperand flags.
177 HMOTF_ConstExtended = 1,
179 /// MO_PCREL - On a symbol operand, indicates a PC-relative relocation
180 /// Used for computing a global address for PIC compilations
183 /// MO_GOT - Indicates a GOT-relative relocation
186 // Low or high part of a symbol.
189 // Offset from the base of the SDA.
194 INST_PARSE_MASK = 0x0000c000,
195 INST_PARSE_PACKET_END = 0x0000c000,
196 INST_PARSE_LOOP_END = 0x00008000,
197 INST_PARSE_NOT_END = 0x00004000,
198 INST_PARSE_DUPLEX = 0x00000000,
199 INST_PARSE_EXTENDER = 0x00000000
202 } // End namespace HexagonII.
204 } // End namespace llvm.