1 //===- HexagonOperands.td - Hexagon immediate processing -*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illnois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 def s4_0ImmOperand : AsmOperandClass { let Name = "s4_0Imm"; }
11 def s4_1ImmOperand : AsmOperandClass { let Name = "s4_1Imm"; }
12 def s4_2ImmOperand : AsmOperandClass { let Name = "s4_2Imm"; }
13 def s4_3ImmOperand : AsmOperandClass { let Name = "s4_3Imm"; }
14 def s4_6ImmOperand : AsmOperandClass { let Name = "s4_6Imm"; }
15 def s3_6ImmOperand : AsmOperandClass { let Name = "s3_6Imm"; }
17 // Immediate operands.
19 let PrintMethod = "printImmOperand" in {
20 def s32Imm : Operand<i32>;
21 def s8Imm : Operand<i32>;
22 def s8Imm64 : Operand<i64>;
23 def s6Imm : Operand<i32>;
24 def s6_3Imm : Operand<i32>;
25 def s4Imm : Operand<i32>;
26 def s4_0Imm : Operand<i32> { let DecoderMethod = "s4_0ImmDecoder"; }
27 def s4_1Imm : Operand<i32> { let DecoderMethod = "s4_1ImmDecoder"; }
28 def s4_2Imm : Operand<i32> { let DecoderMethod = "s4_2ImmDecoder"; }
29 def s4_3Imm : Operand<i32> { let DecoderMethod = "s4_3ImmDecoder"; }
30 def u64Imm : Operand<i64>;
31 def u32Imm : Operand<i32>;
32 def u26_6Imm : Operand<i32>;
33 def u16Imm : Operand<i32>;
34 def u16_0Imm : Operand<i32>;
35 def u16_1Imm : Operand<i32>;
36 def u16_2Imm : Operand<i32>;
37 def u16_3Imm : Operand<i32>;
38 def u11_3Imm : Operand<i32>;
39 def u10Imm : Operand<i32>;
40 def u9Imm : Operand<i32>;
41 def u8Imm : Operand<i32>;
42 def u7Imm : Operand<i32>;
43 def u6Imm : Operand<i32>;
44 def u6_0Imm : Operand<i32>;
45 def u6_1Imm : Operand<i32>;
46 def u6_2Imm : Operand<i32>;
47 def u6_3Imm : Operand<i32>;
48 def u5Imm : Operand<i32>;
49 def u5_2Imm : Operand<i32>;
50 def u5_3Imm : Operand<i32>;
51 def u4Imm : Operand<i32>;
52 def u4_0Imm : Operand<i32>;
53 def u4_2Imm : Operand<i32>;
54 def u3Imm : Operand<i32>;
55 def u3_0Imm : Operand<i32>;
56 def u3_1Imm : Operand<i32>;
57 def u2Imm : Operand<i32>;
58 def u1Imm : Operand<i32>;
59 def n8Imm : Operand<i32>;
60 def m6Imm : Operand<i32>;
63 let OperandType = "OPERAND_IMMEDIATE" in {
64 def s4_6Imm : Operand<i32> { let ParserMatchClass = s4_6ImmOperand;
65 let PrintMethod = "prints4_6ImmOperand";
66 let DecoderMethod = "s4_6ImmDecoder";}
67 def s4_7Imm : Operand<i32> { let PrintMethod = "prints4_7ImmOperand";
68 let DecoderMethod = "s4_6ImmDecoder";}
69 def s3_6Imm : Operand<i32> { let ParserMatchClass = s3_6ImmOperand;
70 let PrintMethod = "prints3_6ImmOperand";
71 let DecoderMethod = "s3_6ImmDecoder";}
72 def s3_7Imm : Operand<i32> { let PrintMethod = "prints3_7ImmOperand";
73 let DecoderMethod = "s3_6ImmDecoder";}
76 let PrintMethod = "printNOneImmOperand" in
77 def nOneImm : Operand<i32>;
80 // Immediate predicates
82 def s32ImmPred : PatLeaf<(i32 imm), [{
83 int64_t v = (int64_t)N->getSExtValue();
87 def s32_0ImmPred : PatLeaf<(i32 imm), [{
88 int64_t v = (int64_t)N->getSExtValue();
92 def s31_1ImmPred : PatLeaf<(i32 imm), [{
93 int64_t v = (int64_t)N->getSExtValue();
94 return isShiftedInt<31,1>(v);
97 def s30_2ImmPred : PatLeaf<(i32 imm), [{
98 int64_t v = (int64_t)N->getSExtValue();
99 return isShiftedInt<31,1>(v);
102 def s29_3ImmPred : PatLeaf<(i32 imm), [{
103 int64_t v = (int64_t)N->getSExtValue();
104 return isShiftedInt<31,1>(v);
107 def s22_10ImmPred : PatLeaf<(i32 imm), [{
108 int64_t v = (int64_t)N->getSExtValue();
109 return isShiftedInt<22,10>(v);
112 def s8_24ImmPred : PatLeaf<(i32 imm), [{
113 int64_t v = (int64_t)N->getSExtValue();
114 return isShiftedInt<8,24>(v);
117 def s16_16ImmPred : PatLeaf<(i32 imm), [{
118 int64_t v = (int64_t)N->getSExtValue();
119 return isShiftedInt<16,16>(v);
122 def s26_6ImmPred : PatLeaf<(i32 imm), [{
123 int64_t v = (int64_t)N->getSExtValue();
124 return isShiftedInt<26,6>(v);
127 def s16ImmPred : PatLeaf<(i32 imm), [{
128 int64_t v = (int64_t)N->getSExtValue();
132 def s13ImmPred : PatLeaf<(i32 imm), [{
133 int64_t v = (int64_t)N->getSExtValue();
137 def s12ImmPred : PatLeaf<(i32 imm), [{
138 int64_t v = (int64_t)N->getSExtValue();
142 def s11_0ImmPred : PatLeaf<(i32 imm), [{
143 int64_t v = (int64_t)N->getSExtValue();
147 def s11_1ImmPred : PatLeaf<(i32 imm), [{
148 int64_t v = (int64_t)N->getSExtValue();
149 return isShiftedInt<11,1>(v);
152 def s11_2ImmPred : PatLeaf<(i32 imm), [{
153 int64_t v = (int64_t)N->getSExtValue();
154 return isShiftedInt<11,2>(v);
157 def s11_3ImmPred : PatLeaf<(i32 imm), [{
158 int64_t v = (int64_t)N->getSExtValue();
159 return isShiftedInt<11,3>(v);
162 def s10ImmPred : PatLeaf<(i32 imm), [{
163 int64_t v = (int64_t)N->getSExtValue();
167 def s9ImmPred : PatLeaf<(i32 imm), [{
168 int64_t v = (int64_t)N->getSExtValue();
172 def m9ImmPred : PatLeaf<(i32 imm), [{
173 int64_t v = (int64_t)N->getSExtValue();
174 return isInt<9>(v) && (v != -256);
177 def s8ImmPred : PatLeaf<(i32 imm), [{
178 int64_t v = (int64_t)N->getSExtValue();
182 def s8Imm64Pred : PatLeaf<(i64 imm), [{
183 int64_t v = (int64_t)N->getSExtValue();
187 def s6ImmPred : PatLeaf<(i32 imm), [{
188 int64_t v = (int64_t)N->getSExtValue();
192 def s4_0ImmPred : PatLeaf<(i32 imm), [{
193 int64_t v = (int64_t)N->getSExtValue();
197 def s4_1ImmPred : PatLeaf<(i32 imm), [{
198 int64_t v = (int64_t)N->getSExtValue();
199 return isShiftedInt<4,1>(v);
202 def s4_2ImmPred : PatLeaf<(i32 imm), [{
203 int64_t v = (int64_t)N->getSExtValue();
204 return isShiftedInt<4,2>(v);
207 def s4_3ImmPred : PatLeaf<(i32 imm), [{
208 int64_t v = (int64_t)N->getSExtValue();
209 return isShiftedInt<4,3>(v);
213 def u64ImmPred : PatLeaf<(i64 imm), [{
214 // Adding "N ||" to suppress gcc unused warning.
218 def u32ImmPred : PatLeaf<(i32 imm), [{
219 int64_t v = (int64_t)N->getSExtValue();
220 return isUInt<32>(v);
223 def u32_0ImmPred : PatLeaf<(i32 imm), [{
224 int64_t v = (int64_t)N->getSExtValue();
225 return isUInt<32>(v);
228 def u31_1ImmPred : PatLeaf<(i32 imm), [{
229 int64_t v = (int64_t)N->getSExtValue();
230 return isShiftedUInt<31,1>(v);
233 def u30_2ImmPred : PatLeaf<(i32 imm), [{
234 int64_t v = (int64_t)N->getSExtValue();
235 return isShiftedUInt<30,2>(v);
238 def u29_3ImmPred : PatLeaf<(i32 imm), [{
239 int64_t v = (int64_t)N->getSExtValue();
240 return isShiftedUInt<29,3>(v);
243 def u26_6ImmPred : PatLeaf<(i32 imm), [{
244 int64_t v = (int64_t)N->getSExtValue();
245 return isShiftedUInt<26,6>(v);
248 def u16ImmPred : PatLeaf<(i32 imm), [{
249 int64_t v = (int64_t)N->getSExtValue();
250 return isUInt<16>(v);
253 def u16_s8ImmPred : PatLeaf<(i32 imm), [{
254 int64_t v = (int64_t)N->getSExtValue();
255 return isShiftedUInt<16,8>(v);
258 def u16_0ImmPred : PatLeaf<(i32 imm), [{
259 int64_t v = (int64_t)N->getSExtValue();
260 return isUInt<16>(v);
263 def u11_3ImmPred : PatLeaf<(i32 imm), [{
264 int64_t v = (int64_t)N->getSExtValue();
265 return isShiftedUInt<11,3>(v);
268 def u9ImmPred : PatLeaf<(i32 imm), [{
269 int64_t v = (int64_t)N->getSExtValue();
273 def u8ImmPred : PatLeaf<(i32 imm), [{
274 int64_t v = (int64_t)N->getSExtValue();
278 def u7StrictPosImmPred : ImmLeaf<i32, [{
279 // u7StrictPosImmPred predicate - True if the immediate fits in an 7-bit
280 // unsigned field and is strictly greater than 0.
281 return isUInt<7>(Imm) && Imm > 0;
284 def u7ImmPred : PatLeaf<(i32 imm), [{
285 int64_t v = (int64_t)N->getSExtValue();
289 def u6ImmPred : PatLeaf<(i32 imm), [{
290 int64_t v = (int64_t)N->getSExtValue();
294 def u6_0ImmPred : PatLeaf<(i32 imm), [{
295 int64_t v = (int64_t)N->getSExtValue();
299 def u6_1ImmPred : PatLeaf<(i32 imm), [{
300 int64_t v = (int64_t)N->getSExtValue();
301 return isShiftedUInt<6,1>(v);
304 def u6_2ImmPred : PatLeaf<(i32 imm), [{
305 int64_t v = (int64_t)N->getSExtValue();
306 return isShiftedUInt<6,2>(v);
309 def u6_3ImmPred : PatLeaf<(i32 imm), [{
310 int64_t v = (int64_t)N->getSExtValue();
311 return isShiftedUInt<6,3>(v);
314 def u5ImmPred : PatLeaf<(i32 imm), [{
315 int64_t v = (int64_t)N->getSExtValue();
319 def u4ImmPred : PatLeaf<(i32 imm), [{
320 int64_t v = (int64_t)N->getSExtValue();
324 def u3ImmPred : PatLeaf<(i32 imm), [{
325 int64_t v = (int64_t)N->getSExtValue();
329 def u2ImmPred : PatLeaf<(i32 imm), [{
330 int64_t v = (int64_t)N->getSExtValue();
334 def u1ImmPred : PatLeaf<(i1 imm), [{
335 int64_t v = (int64_t)N->getSExtValue();
339 def m5BImmPred : PatLeaf<(i32 imm), [{
340 // m5BImmPred predicate - True if the (char) number is in range -1 .. -31
341 // and will fit in a 5 bit field when made positive, for use in memops.
342 // this is specific to the zero extending of a negative by CombineInstr
343 int8_t v = (int8_t)N->getSExtValue();
344 return (-31 <= v && v <= -1);
347 def m5HImmPred : PatLeaf<(i32 imm), [{
348 // m5HImmPred predicate - True if the (short) number is in range -1 .. -31
349 // and will fit in a 5 bit field when made positive, for use in memops.
350 // this is specific to the zero extending of a negative by CombineInstr
351 int16_t v = (int16_t)N->getSExtValue();
352 return (-31 <= v && v <= -1);
355 def m5ImmPred : PatLeaf<(i32 imm), [{
356 // m5ImmPred predicate - True if the number is in range -1 .. -31
357 // and will fit in a 5 bit field when made positive, for use in memops.
358 int64_t v = (int64_t)N->getSExtValue();
359 return (-31 <= v && v <= -1);
362 //InN means negative integers in [-(2^N - 1), 0]
363 def n8ImmPred : PatLeaf<(i32 imm), [{
364 // n8ImmPred predicate - True if the immediate fits in a 8-bit signed
366 int64_t v = (int64_t)N->getSExtValue();
367 return (-255 <= v && v <= 0);
370 def nOneImmPred : PatLeaf<(i32 imm), [{
371 // nOneImmPred predicate - True if the immediate is -1.
372 int64_t v = (int64_t)N->getSExtValue();
376 def Set5ImmPred : PatLeaf<(i32 imm), [{
377 // Set5ImmPred predicate - True if the number is in the series of values.
378 // [ 2^0, 2^1, ... 2^31 ]
379 // For use in setbit immediate.
380 uint32_t v = (int32_t)N->getSExtValue();
381 // Constrain to 32 bits, and then check for single bit.
382 return ImmIsSingleBit(v);
385 def Clr5ImmPred : PatLeaf<(i32 imm), [{
386 // Clr5ImmPred predicate - True if the number is in the series of
387 // bit negated values.
388 // [ 2^0, 2^1, ... 2^31 ]
389 // For use in clrbit immediate.
390 // Note: we are bit NOTing the value.
391 uint32_t v = ~ (int32_t)N->getSExtValue();
392 // Constrain to 32 bits, and then check for single bit.
393 return ImmIsSingleBit(v);
396 def SetClr5ImmPred : PatLeaf<(i32 imm), [{
397 // SetClr5ImmPred predicate - True if the immediate is in range 0..31.
398 int32_t v = (int32_t)N->getSExtValue();
399 return (v >= 0 && v <= 31);
402 def Set4ImmPred : PatLeaf<(i32 imm), [{
403 // Set4ImmPred predicate - True if the number is in the series of values:
404 // [ 2^0, 2^1, ... 2^15 ].
405 // For use in setbit immediate.
406 uint16_t v = (int16_t)N->getSExtValue();
407 // Constrain to 16 bits, and then check for single bit.
408 return ImmIsSingleBit(v);
411 def Clr4ImmPred : PatLeaf<(i32 imm), [{
412 // Clr4ImmPred predicate - True if the number is in the series of
413 // bit negated values:
414 // [ 2^0, 2^1, ... 2^15 ].
415 // For use in setbit and clrbit immediate.
416 uint16_t v = ~ (int16_t)N->getSExtValue();
417 // Constrain to 16 bits, and then check for single bit.
418 return ImmIsSingleBit(v);
421 def SetClr4ImmPred : PatLeaf<(i32 imm), [{
422 // SetClr4ImmPred predicate - True if the immediate is in the range 0..15.
423 int16_t v = (int16_t)N->getSExtValue();
424 return (v >= 0 && v <= 15);
427 def Set3ImmPred : PatLeaf<(i32 imm), [{
428 // Set3ImmPred predicate - True if the number is in the series of values:
429 // [ 2^0, 2^1, ... 2^7 ].
430 // For use in setbit immediate.
431 uint8_t v = (int8_t)N->getSExtValue();
432 // Constrain to 8 bits, and then check for single bit.
433 return ImmIsSingleBit(v);
436 def Clr3ImmPred : PatLeaf<(i32 imm), [{
437 // Clr3ImmPred predicate - True if the number is in the series of
438 // bit negated values:
439 // [ 2^0, 2^1, ... 2^7 ].
440 // For use in setbit and clrbit immediate.
441 uint8_t v = ~ (int8_t)N->getSExtValue();
442 // Constrain to 8 bits, and then check for single bit.
443 return ImmIsSingleBit(v);
446 def SetClr3ImmPred : PatLeaf<(i32 imm), [{
447 // SetClr3ImmPred predicate - True if the immediate is in the range 0..7.
448 int8_t v = (int8_t)N->getSExtValue();
449 return (v >= 0 && v <= 7);
453 // Extendable immediate operands.
455 let PrintMethod = "printExtOperand" in {
456 def f32Ext : Operand<f32>;
457 def s16Ext : Operand<i32> { let DecoderMethod = "s16ImmDecoder"; }
458 def s12Ext : Operand<i32> { let DecoderMethod = "s12ImmDecoder"; }
459 def s11_0Ext : Operand<i32> { let DecoderMethod = "s11_0ImmDecoder"; }
460 def s11_1Ext : Operand<i32> { let DecoderMethod = "s11_1ImmDecoder"; }
461 def s11_2Ext : Operand<i32> { let DecoderMethod = "s11_2ImmDecoder"; }
462 def s11_3Ext : Operand<i32> { let DecoderMethod = "s11_3ImmDecoder"; }
463 def s10Ext : Operand<i32> { let DecoderMethod = "s10ImmDecoder"; }
464 def s9Ext : Operand<i32> { let DecoderMethod = "s90ImmDecoder"; }
465 def s8Ext : Operand<i32> { let DecoderMethod = "s8ImmDecoder"; }
466 def s7Ext : Operand<i32>;
467 def s6Ext : Operand<i32> { let DecoderMethod = "s6_0ImmDecoder"; }
468 def u6Ext : Operand<i32>;
469 def u7Ext : Operand<i32>;
470 def u8Ext : Operand<i32>;
471 def u9Ext : Operand<i32>;
472 def u10Ext : Operand<i32>;
473 def u6_0Ext : Operand<i32>;
474 def u6_1Ext : Operand<i32>;
475 def u6_2Ext : Operand<i32>;
476 def u6_3Ext : Operand<i32>;
479 def s10ExtPred : PatLeaf<(i32 imm), [{
480 int64_t v = (int64_t)N->getSExtValue();
484 // Return true if extending this immediate is profitable and the value
485 // can fit in a 32-bit signed field.
486 return isConstExtProfitable(Node) && isInt<32>(v);
489 def s8ExtPred : PatLeaf<(i32 imm), [{
490 int64_t v = (int64_t)N->getSExtValue();
494 // Return true if extending this immediate is profitable and the value
495 // can fit in a 32-bit signed field.
496 return isConstExtProfitable(Node) && isInt<32>(v);
499 def u8ExtPred : PatLeaf<(i32 imm), [{
500 int64_t v = (int64_t)N->getSExtValue();
504 // Return true if extending this immediate is profitable and the value
505 // can fit in a 32-bit unsigned field.
506 return isConstExtProfitable(Node) && isUInt<32>(v);
509 def u9ExtPred : PatLeaf<(i32 imm), [{
510 int64_t v = (int64_t)N->getSExtValue();
514 // Return true if extending this immediate is profitable and the value
515 // can fit in a 32-bit unsigned field.
516 return isConstExtProfitable(Node) && isUInt<32>(v);
520 def s4_7ImmPred : PatLeaf<(i32 imm), [{
521 int64_t v = (int64_t)N->getSExtValue();
522 if (HST->hasV60TOps())
523 // Return true if the immediate can fit in a 10-bit sign extended field and
524 // is 128-byte aligned.
525 return isShiftedInt<4,7>(v);
529 def s3_7ImmPred : PatLeaf<(i32 imm), [{
530 int64_t v = (int64_t)N->getSExtValue();
531 if (HST->hasV60TOps())
532 // Return true if the immediate can fit in a 9-bit sign extended field and
533 // is 128-byte aligned.
534 return isShiftedInt<3,7>(v);
538 def s4_6ImmPred : PatLeaf<(i32 imm), [{
539 int64_t v = (int64_t)N->getSExtValue();
540 if (HST->hasV60TOps())
541 // Return true if the immediate can fit in a 10-bit sign extended field and
542 // is 64-byte aligned.
543 return isShiftedInt<4,6>(v);
547 def s3_6ImmPred : PatLeaf<(i32 imm), [{
548 int64_t v = (int64_t)N->getSExtValue();
549 if (HST->hasV60TOps())
550 // Return true if the immediate can fit in a 9-bit sign extended field and
551 // is 64-byte aligned.
552 return isShiftedInt<3,6>(v);
557 // This complex pattern exists only to create a machine instruction operand
558 // of type "frame index". There doesn't seem to be a way to do that directly
560 def AddrFI : ComplexPattern<i32, 1, "SelectAddrFI", [frameindex], []>;
562 // These complex patterns are not strictly necessary, since global address
563 // folding will happen during DAG combining. For distinguishing between GA
564 // and GP, pat frags with HexagonCONST32 and HexagonCONST32_GP can be used.
565 def AddrGA : ComplexPattern<i32, 1, "SelectAddrGA", [], []>;
566 def AddrGP : ComplexPattern<i32, 1, "SelectAddrGP", [], []>;
570 let PrintMethod = "printGlobalOperand" in {
571 def globaladdress : Operand<i32>;
572 def globaladdressExt : Operand<i32>;
575 let PrintMethod = "printJumpTable" in
576 def jumptablebase : Operand<i32>;
578 def brtarget : Operand<OtherVT>;
579 def brtargetExt : Operand<OtherVT> {
580 let PrintMethod = "printExtBrtarget";
582 def calltarget : Operand<i32>;
584 def bblabel : Operand<i32>;
585 def bbl : SDNode<"ISD::BasicBlock", SDTPtrLeaf , [], "BasicBlockSDNode">;
587 def symbolHi32 : Operand<i32> {
588 let PrintMethod = "printSymbolHi";
590 def symbolLo32 : Operand<i32> {
591 let PrintMethod = "printSymbolLo";
594 // Return true if for a 32 to 64-bit sign-extended load.
595 def is_sext_i32 : PatLeaf<(i64 DoubleRegs:$src1), [{
596 LoadSDNode *LD = dyn_cast<LoadSDNode>(N);
599 return LD->getExtensionType() == ISD::SEXTLOAD &&
600 LD->getMemoryVT().getScalarType() == MVT::i32;