1 //===-- HexagonAsmPrinter.cpp - Print machine instrs to Hexagon assembly --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to Hexagon assembly language. This printer is
12 // the output mechanism used by `llc'.
14 //===----------------------------------------------------------------------===//
17 #include "HexagonAsmPrinter.h"
18 #include "HexagonMachineFunctionInfo.h"
19 #include "HexagonSubtarget.h"
20 #include "HexagonTargetMachine.h"
21 #include "MCTargetDesc/HexagonInstPrinter.h"
22 #include "MCTargetDesc/HexagonMCInstrInfo.h"
23 #include "MCTargetDesc/HexagonMCShuffler.h"
24 #include "llvm/ADT/SmallString.h"
25 #include "llvm/ADT/SmallVector.h"
26 #include "llvm/ADT/StringExtras.h"
27 #include "llvm/Analysis/ConstantFolding.h"
28 #include "llvm/CodeGen/AsmPrinter.h"
29 #include "llvm/CodeGen/MachineFunctionPass.h"
30 #include "llvm/CodeGen/MachineInstr.h"
31 #include "llvm/CodeGen/MachineInstrBuilder.h"
32 #include "llvm/CodeGen/MachineModuleInfo.h"
33 #include "llvm/IR/Constants.h"
34 #include "llvm/IR/DataLayout.h"
35 #include "llvm/IR/DerivedTypes.h"
36 #include "llvm/IR/Mangler.h"
37 #include "llvm/IR/Module.h"
38 #include "llvm/MC/MCAsmInfo.h"
39 #include "llvm/MC/MCContext.h"
40 #include "llvm/MC/MCExpr.h"
41 #include "llvm/MC/MCInst.h"
42 #include "llvm/MC/MCSection.h"
43 #include "llvm/MC/MCStreamer.h"
44 #include "llvm/MC/MCSymbol.h"
45 #include "llvm/Support/CommandLine.h"
46 #include "llvm/Support/Compiler.h"
47 #include "llvm/Support/Debug.h"
48 #include "llvm/Support/Format.h"
49 #include "llvm/Support/MathExtras.h"
50 #include "llvm/Support/TargetRegistry.h"
51 #include "llvm/Support/raw_ostream.h"
52 #include "llvm/Target/TargetInstrInfo.h"
53 #include "llvm/Target/TargetLoweringObjectFile.h"
54 #include "llvm/Target/TargetOptions.h"
55 #include "llvm/Target/TargetRegisterInfo.h"
60 void HexagonLowerToMC(const MCInstrInfo &MCII, const MachineInstr *MI,
61 MCInst &MCB, HexagonAsmPrinter &AP);
64 #define DEBUG_TYPE "asm-printer"
66 static cl::opt<bool> AlignCalls(
67 "hexagon-align-calls", cl::Hidden, cl::init(true),
68 cl::desc("Insert falign after call instruction for Hexagon target"));
70 HexagonAsmPrinter::HexagonAsmPrinter(TargetMachine &TM,
71 std::unique_ptr<MCStreamer> Streamer)
72 : AsmPrinter(TM, std::move(Streamer)), Subtarget(nullptr) {}
74 void HexagonAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
76 const MachineOperand &MO = MI->getOperand(OpNo);
78 switch (MO.getType()) {
79 default: llvm_unreachable ("<unknown operand type>");
80 case MachineOperand::MO_Register:
81 O << HexagonInstPrinter::getRegisterName(MO.getReg());
83 case MachineOperand::MO_Immediate:
86 case MachineOperand::MO_MachineBasicBlock:
87 MO.getMBB()->getSymbol()->print(O, MAI);
89 case MachineOperand::MO_ConstantPoolIndex:
90 GetCPISymbol(MO.getIndex())->print(O, MAI);
92 case MachineOperand::MO_GlobalAddress:
93 // Computing the address of a global symbol, not calling it.
94 getSymbol(MO.getGlobal())->print(O, MAI);
95 printOffset(MO.getOffset(), O);
101 // isBlockOnlyReachableByFallthrough - We need to override this since the
102 // default AsmPrinter does not print labels for any basic block that
103 // is only reachable by a fall through. That works for all cases except
104 // for the case in which the basic block is reachable by a fall through but
105 // through an indirect from a jump table. In this case, the jump table
106 // will contain a label not defined by AsmPrinter.
108 bool HexagonAsmPrinter::
109 isBlockOnlyReachableByFallthrough(const MachineBasicBlock *MBB) const {
110 if (MBB->hasAddressTaken()) {
113 return AsmPrinter::isBlockOnlyReachableByFallthrough(MBB);
117 /// PrintAsmOperand - Print out an operand for an inline asm expression.
119 bool HexagonAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
121 const char *ExtraCode,
123 // Does this asm operand have a single letter operand modifier?
124 if (ExtraCode && ExtraCode[0]) {
125 if (ExtraCode[1] != 0) return true; // Unknown modifier.
127 switch (ExtraCode[0]) {
129 // See if this is a generic print operand
130 return AsmPrinter::PrintAsmOperand(MI, OpNo, AsmVariant, ExtraCode, OS);
131 case 'c': // Don't print "$" before a global var name or constant.
132 // Hexagon never has a prefix.
133 printOperand(MI, OpNo, OS);
135 case 'L': // Write second word of DImode reference.
136 // Verify that this operand has two consecutive registers.
137 if (!MI->getOperand(OpNo).isReg() ||
138 OpNo+1 == MI->getNumOperands() ||
139 !MI->getOperand(OpNo+1).isReg())
141 ++OpNo; // Return the high-part.
144 // Write 'i' if an integer constant, otherwise nothing. Used to print
146 if (MI->getOperand(OpNo).isImm())
152 printOperand(MI, OpNo, OS);
156 bool HexagonAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
157 unsigned OpNo, unsigned AsmVariant,
158 const char *ExtraCode,
160 if (ExtraCode && ExtraCode[0])
161 return true; // Unknown modifier.
163 const MachineOperand &Base = MI->getOperand(OpNo);
164 const MachineOperand &Offset = MI->getOperand(OpNo+1);
167 printOperand(MI, OpNo, O);
169 llvm_unreachable("Unimplemented");
171 if (Offset.isImm()) {
173 O << " + #" << Offset.getImm();
176 llvm_unreachable("Unimplemented");
182 /// printMachineInstruction -- Print out a single Hexagon MI in Darwin syntax to
183 /// the current output stream.
185 void HexagonAsmPrinter::EmitInstruction(const MachineInstr *MI) {
186 MCInst MCB = HexagonMCInstrInfo::createBundle();
187 const MCInstrInfo &MCII = *Subtarget->getInstrInfo();
189 if (MI->isBundle()) {
190 const MachineBasicBlock* MBB = MI->getParent();
191 MachineBasicBlock::const_instr_iterator MII = MI->getIterator();
192 unsigned IgnoreCount = 0;
194 for (++MII; MII != MBB->instr_end() && MII->isInsideBundle(); ++MII) {
195 if (MII->getOpcode() == TargetOpcode::DBG_VALUE ||
196 MII->getOpcode() == TargetOpcode::IMPLICIT_DEF)
199 HexagonLowerToMC(MCII, &*MII, MCB, *this);
204 HexagonLowerToMC(MCII, MI, MCB, *this);
205 HexagonMCInstrInfo::padEndloop(OutStreamer->getContext(), MCB);
207 // Examine the packet and try to find instructions that can be converted
209 HexagonMCInstrInfo::tryCompound(MCII, OutStreamer->getContext(), MCB);
210 // Examine the packet and convert pairs of instructions to duplex
211 // instructions when possible.
212 SmallVector<DuplexCandidate, 8> possibleDuplexes;
213 possibleDuplexes = HexagonMCInstrInfo::getDuplexPossibilties(MCII, MCB);
214 HexagonMCShuffle(MCII, *Subtarget, OutStreamer->getContext(), MCB,
216 EmitToStreamer(*OutStreamer, MCB);
219 extern "C" void LLVMInitializeHexagonAsmPrinter() {
220 RegisterAsmPrinter<HexagonAsmPrinter> X(TheHexagonTarget);