1 //===-- HexagonDisassembler.cpp - Disassembler for Hexagon ISA ------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 #include "MCTargetDesc/HexagonBaseInfo.h"
12 #include "MCTargetDesc/HexagonMCInstrInfo.h"
13 #include "MCTargetDesc/HexagonMCTargetDesc.h"
15 #include "llvm/MC/MCContext.h"
16 #include "llvm/MC/MCDisassembler.h"
17 #include "llvm/MC/MCExpr.h"
18 #include "llvm/MC/MCFixedLenDisassembler.h"
19 #include "llvm/MC/MCInst.h"
20 #include "llvm/MC/MCInstrDesc.h"
21 #include "llvm/MC/MCSubtargetInfo.h"
22 #include "llvm/Support/Debug.h"
23 #include "llvm/Support/Endian.h"
24 #include "llvm/Support/ErrorHandling.h"
25 #include "llvm/Support/LEB128.h"
26 #include "llvm/Support/TargetRegistry.h"
27 #include "llvm/Support/raw_ostream.h"
32 using namespace Hexagon;
34 #define DEBUG_TYPE "hexagon-disassembler"
36 // Pull DecodeStatus and its enum values into the global namespace.
37 typedef llvm::MCDisassembler::DecodeStatus DecodeStatus;
40 /// \brief Hexagon disassembler for all Hexagon platforms.
41 class HexagonDisassembler : public MCDisassembler {
43 std::unique_ptr<MCInst *> CurrentBundle;
44 HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx)
45 : MCDisassembler(STI, Ctx), CurrentBundle(new MCInst *) {}
47 DecodeStatus getSingleInstruction(MCInst &Instr, MCInst &MCB,
48 ArrayRef<uint8_t> Bytes, uint64_t Address,
49 raw_ostream &VStream, raw_ostream &CStream,
50 bool &Complete) const;
51 DecodeStatus getInstruction(MCInst &Instr, uint64_t &Size,
52 ArrayRef<uint8_t> Bytes, uint64_t Address,
54 raw_ostream &CStream) const override;
58 static DecodeStatus DecodeModRegsRegisterClass(MCInst &Inst, unsigned RegNo,
59 uint64_t Address, const void *Decoder);
60 static DecodeStatus DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo,
61 uint64_t Address, const void *Decoder);
62 static DecodeStatus DecodeCtrRegs64RegisterClass(MCInst &Inst, unsigned RegNo,
63 uint64_t Address, void const *Decoder);
65 static const uint16_t IntRegDecoderTable[] = {
66 Hexagon::R0, Hexagon::R1, Hexagon::R2, Hexagon::R3, Hexagon::R4,
67 Hexagon::R5, Hexagon::R6, Hexagon::R7, Hexagon::R8, Hexagon::R9,
68 Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14,
69 Hexagon::R15, Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19,
70 Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24,
71 Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,
72 Hexagon::R30, Hexagon::R31 };
74 static const uint16_t PredRegDecoderTable[] = { Hexagon::P0, Hexagon::P1,
75 Hexagon::P2, Hexagon::P3 };
77 static DecodeStatus DecodeRegisterClass(MCInst &Inst, unsigned RegNo,
78 const uint16_t Table[], size_t Size) {
80 Inst.addOperand(MCOperand::createReg(Table[RegNo]));
81 return MCDisassembler::Success;
84 return MCDisassembler::Fail;
87 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,
89 void const *Decoder) {
91 return MCDisassembler::Fail;
93 unsigned Register = IntRegDecoderTable[RegNo];
94 Inst.addOperand(MCOperand::createReg(Register));
95 return MCDisassembler::Success;
98 static DecodeStatus DecodeCtrRegsRegisterClass(MCInst &Inst, unsigned RegNo,
99 uint64_t /*Address*/, const void *Decoder) {
100 static const uint16_t CtrlRegDecoderTable[] = {
101 Hexagon::SA0, Hexagon::LC0, Hexagon::SA1, Hexagon::LC1,
102 Hexagon::P3_0, Hexagon::NoRegister, Hexagon::C6, Hexagon::C7,
103 Hexagon::USR, Hexagon::PC, Hexagon::UGP, Hexagon::GP,
104 Hexagon::CS0, Hexagon::CS1, Hexagon::UPCL, Hexagon::UPCH
107 if (RegNo >= sizeof(CtrlRegDecoderTable) / sizeof(CtrlRegDecoderTable[0]))
108 return MCDisassembler::Fail;
110 if (CtrlRegDecoderTable[RegNo] == Hexagon::NoRegister)
111 return MCDisassembler::Fail;
113 unsigned Register = CtrlRegDecoderTable[RegNo];
114 Inst.addOperand(MCOperand::createReg(Register));
115 return MCDisassembler::Success;
118 static DecodeStatus DecodeCtrRegs64RegisterClass(MCInst &Inst, unsigned RegNo,
119 uint64_t /*Address*/, void const *Decoder) {
120 static const uint16_t CtrlReg64DecoderTable[] = {
121 Hexagon::C1_0, Hexagon::NoRegister,
122 Hexagon::C3_2, Hexagon::NoRegister,
123 Hexagon::NoRegister, Hexagon::NoRegister,
124 Hexagon::C7_6, Hexagon::NoRegister,
125 Hexagon::C9_8, Hexagon::NoRegister,
126 Hexagon::C11_10, Hexagon::NoRegister,
127 Hexagon::CS, Hexagon::NoRegister,
128 Hexagon::UPC, Hexagon::NoRegister
131 if (RegNo >= sizeof(CtrlReg64DecoderTable) / sizeof(CtrlReg64DecoderTable[0]))
132 return MCDisassembler::Fail;
134 if (CtrlReg64DecoderTable[RegNo] == Hexagon::NoRegister)
135 return MCDisassembler::Fail;
137 unsigned Register = CtrlReg64DecoderTable[RegNo];
138 Inst.addOperand(MCOperand::createReg(Register));
139 return MCDisassembler::Success;
142 static DecodeStatus DecodeModRegsRegisterClass(MCInst &Inst, unsigned RegNo,
143 uint64_t /*Address*/, const void *Decoder) {
144 unsigned Register = 0;
147 Register = Hexagon::M0;
150 Register = Hexagon::M1;
153 return MCDisassembler::Fail;
155 Inst.addOperand(MCOperand::createReg(Register));
156 return MCDisassembler::Success;
159 static DecodeStatus DecodeDoubleRegsRegisterClass(MCInst &Inst, unsigned RegNo,
160 uint64_t /*Address*/, const void *Decoder) {
161 static const uint16_t DoubleRegDecoderTable[] = {
162 Hexagon::D0, Hexagon::D1, Hexagon::D2, Hexagon::D3,
163 Hexagon::D4, Hexagon::D5, Hexagon::D6, Hexagon::D7,
164 Hexagon::D8, Hexagon::D9, Hexagon::D10, Hexagon::D11,
165 Hexagon::D12, Hexagon::D13, Hexagon::D14, Hexagon::D15
168 return (DecodeRegisterClass(Inst, RegNo >> 1,
169 DoubleRegDecoderTable,
170 sizeof (DoubleRegDecoderTable)));
173 static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,
174 uint64_t /*Address*/,
175 void const *Decoder) {
177 return MCDisassembler::Fail;
179 unsigned Register = PredRegDecoderTable[RegNo];
180 Inst.addOperand(MCOperand::createReg(Register));
181 return MCDisassembler::Success;
184 #include "HexagonGenDisassemblerTables.inc"
186 static MCDisassembler *createHexagonDisassembler(Target const &T,
187 MCSubtargetInfo const &STI,
189 return new HexagonDisassembler(STI, Ctx);
192 extern "C" void LLVMInitializeHexagonDisassembler() {
193 TargetRegistry::RegisterMCDisassembler(TheHexagonTarget,
194 createHexagonDisassembler);
197 DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,
198 ArrayRef<uint8_t> Bytes,
201 raw_ostream &cs) const {
202 DecodeStatus Result = DecodeStatus::Success;
203 bool Complete = false;
206 *CurrentBundle = &MI;
207 MI.setOpcode(Hexagon::BUNDLE);
208 MI.addOperand(MCOperand::createImm(0));
209 while (Result == Success && Complete == false)
211 if (Bytes.size() < HEXAGON_INSTR_SIZE)
212 return MCDisassembler::Fail;
213 MCInst * Inst = new (getContext()) MCInst;
214 Result = getSingleInstruction(*Inst, MI, Bytes, Address, os, cs, Complete);
215 MI.addOperand(MCOperand::createInst(Inst));
216 Size += HEXAGON_INSTR_SIZE;
217 Bytes = Bytes.slice(HEXAGON_INSTR_SIZE);
222 DecodeStatus HexagonDisassembler::getSingleInstruction(
223 MCInst &MI, MCInst &MCB, ArrayRef<uint8_t> Bytes, uint64_t Address,
224 raw_ostream &os, raw_ostream &cs, bool &Complete) const {
225 assert(Bytes.size() >= HEXAGON_INSTR_SIZE);
227 uint32_t Instruction =
228 llvm::support::endian::read<uint32_t, llvm::support::little,
229 llvm::support::unaligned>(Bytes.data());
231 auto BundleSize = HexagonMCInstrInfo::bundleSize(MCB);
232 if ((Instruction & HexagonII::INST_PARSE_MASK) ==
233 HexagonII::INST_PARSE_LOOP_END) {
235 HexagonMCInstrInfo::setInnerLoop(MCB);
236 else if (BundleSize == 1)
237 HexagonMCInstrInfo::setOuterLoop(MCB);
239 return DecodeStatus::Fail;
242 DecodeStatus Result = DecodeStatus::Success;
243 if ((Instruction & HexagonII::INST_PARSE_MASK) ==
244 HexagonII::INST_PARSE_PACKET_END)
246 // Calling the auto-generated decoder function.
248 decodeInstruction(DecoderTable32, MI, Instruction, Address, this, STI);