[AArch64, ARM] Add v8.1a architecture and generic cpu
[oota-llvm.git] / lib / Target / Hexagon / CMakeLists.txt
1 set(LLVM_TARGET_DEFINITIONS Hexagon.td)
2
3 tablegen(LLVM HexagonGenAsmWriter.inc -gen-asm-writer)
4 tablegen(LLVM HexagonGenCallingConv.inc -gen-callingconv)
5 tablegen(LLVM HexagonGenDAGISel.inc -gen-dag-isel)
6 tablegen(LLVM HexagonGenDFAPacketizer.inc -gen-dfa-packetizer)
7 tablegen(LLVM HexagonGenDisassemblerTables.inc -gen-disassembler)
8 tablegen(LLVM HexagonGenInstrInfo.inc -gen-instr-info)
9 tablegen(LLVM HexagonGenMCCodeEmitter.inc -gen-emitter)
10 tablegen(LLVM HexagonGenRegisterInfo.inc -gen-register-info)
11 tablegen(LLVM HexagonGenSubtargetInfo.inc -gen-subtarget)
12 add_public_tablegen_target(HexagonCommonTableGen)
13
14 add_llvm_target(HexagonCodeGen
15   HexagonAsmPrinter.cpp
16   HexagonCFGOptimizer.cpp
17   HexagonCopyToCombine.cpp
18   HexagonExpandPredSpillCode.cpp
19   HexagonFixupHwLoops.cpp
20   HexagonFrameLowering.cpp
21   HexagonHardwareLoops.cpp
22   HexagonInstrInfo.cpp
23   HexagonISelDAGToDAG.cpp
24   HexagonISelLowering.cpp
25   HexagonMachineFunctionInfo.cpp
26   HexagonMachineScheduler.cpp
27   HexagonMCInstLower.cpp
28   HexagonNewValueJump.cpp
29   HexagonPeephole.cpp
30   HexagonRegisterInfo.cpp
31   HexagonRemoveSZExtArgs.cpp
32   HexagonSelectionDAGInfo.cpp
33   HexagonSplitConst32AndConst64.cpp
34   HexagonSubtarget.cpp
35   HexagonTargetMachine.cpp
36   HexagonTargetObjectFile.cpp
37   HexagonVLIWPacketizer.cpp
38 )
39
40 add_subdirectory(TargetInfo)
41 add_subdirectory(MCTargetDesc)
42 add_subdirectory(Disassembler)