lib/Target/Blackfin/BlackfinRegisterInfo.h

   1 //===- BlackfinRegisterInfo.h - Blackfin Register Information ..-*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the Blackfin implementation of the TargetRegisterInfo
  11 // class.
  12 //
  13 //===----------------------------------------------------------------------===//
  14
  15 #ifndef BLACKFINREGISTERINFO_H
  16 #define BLACKFINREGISTERINFO_H
  17
  18 #include "llvm/Target/TargetRegisterInfo.h"
  19 #include "BlackfinGenRegisterInfo.h.inc"
  20
  21 namespace llvm {
  22
  23   class BlackfinSubtarget;
  24   class TargetInstrInfo;
  25   class Type;
  26
  27   // Subregister indices, keep in sync with BlackfinRegisterInfo.td
  28   enum BfinSubregIdx {
  29     bfin_subreg_lo16 = 1,
  30     bfin_subreg_hi16 = 2,
  31     bfin_subreg_lo32 = 3
  32   };
  33
  34   struct BlackfinRegisterInfo : public BlackfinGenRegisterInfo {
  35     BlackfinSubtarget &Subtarget;
  36     const TargetInstrInfo &TII;
  37
  38     BlackfinRegisterInfo(BlackfinSubtarget &st, const TargetInstrInfo &tii);
  39
  40     /// Code Generation virtual methods...
  41     const unsigned *getCalleeSavedRegs(const MachineFunction *MF = 0) const;
  42
  43     const TargetRegisterClass* const*
  44     getCalleeSavedRegClasses(const MachineFunction *MF = 0) const;
  45
  46     BitVector getReservedRegs(const MachineFunction &MF) const;
  47
  48     // getSubReg implemented by tablegen
  49
  50     const TargetRegisterClass *getPointerRegClass(unsigned Kind = 0) const {
  51       return &BF::PRegClass;
  52     }
  53
  54     const TargetRegisterClass *getPhysicalRegisterRegClass(unsigned reg,
  55                                                            EVT VT) const;
  56
  57     bool hasFP(const MachineFunction &MF) const;
  58
  59     // bool hasReservedCallFrame(MachineFunction &MF) const;
  60
  61     bool requiresRegisterScavenging(const MachineFunction &MF) const;
  62
  63     void eliminateCallFramePseudoInstr(MachineFunction &MF,
  64                                        MachineBasicBlock &MBB,
  65                                        MachineBasicBlock::iterator I) const;
  66
  67     void eliminateFrameIndex(MachineBasicBlock::iterator II,
  68                              int SPAdj, RegScavenger *RS = NULL) const;
  69
  70     void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
  71                                               RegScavenger *RS) const;
  72
  73     void processFunctionBeforeFrameFinalized(MachineFunction &MF) const;
  74
  75     void emitPrologue(MachineFunction &MF) const;
  76     void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
  77
  78     unsigned getFrameRegister(MachineFunction &MF) const;
  79     int getFrameIndexOffset(MachineFunction &MF, int FI) const;
  80     unsigned getRARegister() const;
  81
  82     // Exception handling queries.
  83     unsigned getEHExceptionRegister() const;
  84     unsigned getEHHandlerRegister() const;
  85
  86     int getDwarfRegNum(unsigned RegNum, bool isEH) const;
  87
  88     // Utility functions
  89     void adjustRegister(MachineBasicBlock &MBB,
  90                         MachineBasicBlock::iterator I,
  91                         DebugLoc DL,
  92                         unsigned Reg,
  93                         unsigned ScratchReg,
  94                         int delta) const;
  95     void loadConstant(MachineBasicBlock &MBB,
  96                       MachineBasicBlock::iterator I,
  97                       DebugLoc DL,
  98                       unsigned Reg,
  99                       int value) const;
 100   };
 101
 102 } // end namespace llvm
 103
 104 #endif