1 //===- AlphaInstrInfo.cpp - Alpha Instruction Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Alpha implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
15 #include "AlphaInstrInfo.h"
16 #include "AlphaGenInstrInfo.inc"
17 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 AlphaInstrInfo::AlphaInstrInfo()
22 : TargetInstrInfo(AlphaInsts, sizeof(AlphaInsts)/sizeof(AlphaInsts[0])) { }
25 bool AlphaInstrInfo::isMoveInstr(const MachineInstr& MI,
27 unsigned& destReg) const {
28 MachineOpCode oc = MI.getOpcode();
29 if (oc == Alpha::BIS || oc == Alpha::CPYSS || oc == Alpha::CPYST) {
32 assert(MI.getNumOperands() == 3 &&
33 MI.getOperand(0).isRegister() &&
34 MI.getOperand(1).isRegister() &&
35 MI.getOperand(2).isRegister() &&
36 "invalid Alpha BIS instruction!");
37 if (MI.getOperand(1).getReg() == MI.getOperand(2).getReg()) {
38 sourceReg = MI.getOperand(1).getReg();
39 destReg = MI.getOperand(0).getReg();
47 AlphaInstrInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const {
48 switch (MI->getOpcode()) {
55 if (MI->getOperand(1).isFrameIndex()) {
56 FrameIndex = MI->getOperand(1).getFrameIndex();
57 return MI->getOperand(0).getReg();