1 //===- AlphaInstrFormats.td - Alpha Instruction Formats ----*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
20 def u8imm : Operand<i64>;
21 def s14imm : Operand<i64>;
22 def s16imm : Operand<i64>;
23 def s21imm : Operand<i64>;
24 def s64imm : Operand<i64>;
25 def u64imm : Operand<i64>;
27 //===----------------------------------------------------------------------===//
28 // Instruction format superclass
29 //===----------------------------------------------------------------------===//
30 // Alpha instruction baseline
31 class InstAlpha<bits<6> op, string asmstr, InstrItinClass itin> : Instruction {
33 let Namespace = "Alpha";
34 let AsmString = asmstr;
41 class MForm<bits<6> opcode, bit store, bit load, string asmstr, list<dag> pattern, InstrItinClass itin>
42 : InstAlpha<opcode, asmstr, itin> {
43 let Pattern = pattern;
46 let Defs = [R28]; //We may use this for frame index calculations, so reserve it here
54 let Inst{15-0} = disp;
56 class MfcForm<bits<6> opcode, bits<16> fc, string asmstr, InstrItinClass itin>
57 : InstAlpha<opcode, asmstr, itin> {
60 let OutOperandList = (ops GPRC:$RA);
61 let InOperandList = (ops);
67 class MbrForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr, InstrItinClass itin>
68 : InstAlpha<opcode, asmstr, itin> {
73 let OutOperandList = (ops);
74 let InOperandList = OL;
79 let Inst{13-0} = disp;
81 class MbrpForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr, list<dag> pattern, InstrItinClass itin>
82 : InstAlpha<opcode, asmstr, itin> {
88 let OutOperandList = (ops);
89 let InOperandList = OL;
94 let Inst{13-0} = disp;
98 def target : Operand<OtherVT> {}
100 let isBranch = 1, isTerminator = 1, hasCtrlDep = 1, noResults = 1 in {
101 class BFormN<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
102 : InstAlpha<opcode, asmstr, itin> {
103 let OutOperandList = (ops);
104 let InOperandList = OL;
105 bits<64> Opc; //dummy
109 let Inst{25-21} = Ra;
110 let Inst{20-0} = disp;
114 let isBranch = 1, isTerminator = 1 in
115 class BFormD<bits<6> opcode, string asmstr, list<dag> pattern, InstrItinClass itin>
116 : InstAlpha<opcode, asmstr, itin> {
117 let Pattern = pattern;
118 let OutOperandList = (ops);
119 let InOperandList = (ops target:$DISP);
123 let Inst{25-21} = Ra;
124 let Inst{20-0} = disp;
128 class OForm<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
129 : InstAlpha<opcode, asmstr, itin> {
130 let Pattern = pattern;
131 let OutOperandList = (outs GPRC:$RC);
132 let InOperandList = (ins GPRC:$RA, GPRC:$RB);
137 bits<7> Function = fun;
139 let Inst{25-21} = Ra;
140 let Inst{20-16} = Rb;
143 let Inst{11-5} = Function;
147 class OForm2<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
148 : InstAlpha<opcode, asmstr, itin> {
149 let Pattern = pattern;
150 let OutOperandList = (outs GPRC:$RC);
151 let InOperandList = (ins GPRC:$RB);
155 bits<7> Function = fun;
157 let Inst{25-21} = 31;
158 let Inst{20-16} = Rb;
161 let Inst{11-5} = Function;
165 class OForm4<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
166 : InstAlpha<opcode, asmstr, itin> {
167 let Pattern = pattern;
168 let OutOperandList = (outs GPRC:$RDEST);
169 let InOperandList = (ins GPRC:$RCOND, GPRC:$RTRUE, GPRC:$RFALSE);
170 let Constraints = "$RFALSE = $RDEST";
171 let DisableEncoding = "$RFALSE";
176 bits<7> Function = fun;
178 // let isTwoAddress = 1;
179 let Inst{25-21} = Ra;
180 let Inst{20-16} = Rb;
183 let Inst{11-5} = Function;
188 class OFormL<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
189 : InstAlpha<opcode, asmstr, itin> {
190 let Pattern = pattern;
191 let OutOperandList = (outs GPRC:$RC);
192 let InOperandList = (ins GPRC:$RA, u8imm:$L);
197 bits<7> Function = fun;
199 let Inst{25-21} = Ra;
200 let Inst{20-13} = LIT;
202 let Inst{11-5} = Function;
206 class OForm4L<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
207 : InstAlpha<opcode, asmstr, itin> {
208 let Pattern = pattern;
209 let OutOperandList = (outs GPRC:$RDEST);
210 let InOperandList = (ins GPRC:$RCOND, s64imm:$RTRUE, GPRC:$RFALSE);
211 let Constraints = "$RFALSE = $RDEST";
212 let DisableEncoding = "$RFALSE";
217 bits<7> Function = fun;
219 // let isTwoAddress = 1;
220 let Inst{25-21} = Ra;
221 let Inst{20-13} = LIT;
223 let Inst{11-5} = Function;
228 class FPForm<bits<6> opcode, bits<11> fun, string asmstr, list<dag> pattern, InstrItinClass itin>
229 : InstAlpha<opcode, asmstr, itin> {
230 let Pattern = pattern;
235 bits<11> Function = fun;
237 let Inst{25-21} = Fa;
238 let Inst{20-16} = Fb;
239 let Inst{15-5} = Function;
244 class PALForm<bits<6> opcode, dag OL, string asmstr, InstrItinClass itin>
245 : InstAlpha<opcode, asmstr, itin> {
246 let OutOperandList = (ops);
247 let InOperandList = OL;
250 let Inst{25-0} = Function;
254 // Pseudo instructions.
255 class PseudoInstAlpha<dag OOL, dag IOL, string nm, list<dag> pattern, InstrItinClass itin>
256 : InstAlpha<0, nm, itin> {
257 let OutOperandList = OOL;
258 let InOperandList = IOL;
259 let Pattern = pattern;