1 //===-- ARM64InstPrinter.h - Convert ARM64 MCInst to assembly syntax ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class prints an ARM64 MCInst to a .s file.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARM64INSTPRINTER_H
15 #define ARM64INSTPRINTER_H
17 #include "MCTargetDesc/ARM64MCTargetDesc.h"
18 #include "llvm/ADT/StringRef.h"
19 #include "llvm/MC/MCInstPrinter.h"
20 #include "llvm/MC/MCSubtargetInfo.h"
26 class ARM64InstPrinter : public MCInstPrinter {
28 ARM64InstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
29 const MCRegisterInfo &MRI, const MCSubtargetInfo &STI);
31 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override;
32 void printRegName(raw_ostream &OS, unsigned RegNo) const override;
34 // Autogenerated by tblgen.
35 virtual void printInstruction(const MCInst *MI, raw_ostream &O);
36 virtual bool printAliasInstr(const MCInst *MI, raw_ostream &O);
37 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
38 unsigned PrintMethodIdx, raw_ostream &O);
39 virtual StringRef getRegName(unsigned RegNo) const {
40 return getRegisterName(RegNo);
42 static const char *getRegisterName(unsigned RegNo,
43 unsigned AltIdx = ARM64::NoRegAltName);
46 bool printSysAlias(const MCInst *MI, raw_ostream &O);
48 void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
49 void printHexImm(const MCInst *MI, unsigned OpNo, raw_ostream &O);
50 void printPostIncOperand(const MCInst *MI, unsigned OpNo, unsigned Imm,
53 void printPostIncOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O) {
54 printPostIncOperand(MI, OpNo, Amount, O);
57 void printVRegOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
58 void printSysCROperand(const MCInst *MI, unsigned OpNo, raw_ostream &O);
59 void printAddSubImm(const MCInst *MI, unsigned OpNum, raw_ostream &O);
60 void printLogicalImm32(const MCInst *MI, unsigned OpNum, raw_ostream &O);
61 void printLogicalImm64(const MCInst *MI, unsigned OpNum, raw_ostream &O);
62 void printShifter(const MCInst *MI, unsigned OpNum, raw_ostream &O);
63 void printShiftedRegister(const MCInst *MI, unsigned OpNum, raw_ostream &O);
64 void printExtendedRegister(const MCInst *MI, unsigned OpNum, raw_ostream &O);
65 void printExtend(const MCInst *MI, unsigned OpNum, raw_ostream &O);
66 void printCondCode(const MCInst *MI, unsigned OpNum, raw_ostream &O);
67 void printInverseCondCode(const MCInst *MI, unsigned OpNum, raw_ostream &O);
68 void printDotCondCode(const MCInst *MI, unsigned OpNum, raw_ostream &O);
69 void printAlignedLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O);
70 void printAMIndexed(const MCInst *MI, unsigned OpNum, unsigned Scale,
72 void printAMIndexedWB(const MCInst *MI, unsigned OpNum, unsigned Scale,
75 template<int BitWidth>
76 void printAMIndexed(const MCInst *MI, unsigned OpNum, raw_ostream &O) {
77 printAMIndexed(MI, OpNum, BitWidth / 8, O);
80 template<int BitWidth>
81 void printAMIndexedWB(const MCInst *MI, unsigned OpNum, raw_ostream &O) {
82 printAMIndexedWB(MI, OpNum, BitWidth / 8, O);
85 void printAMNoIndex(const MCInst *MI, unsigned OpNum, raw_ostream &O);
88 void printImmScale(const MCInst *MI, unsigned OpNum, raw_ostream &O);
90 void printPrefetchOp(const MCInst *MI, unsigned OpNum, raw_ostream &O);
92 void printMemoryPostIndexed(const MCInst *MI, unsigned OpNum, raw_ostream &O,
94 template<int BitWidth>
95 void printMemoryPostIndexed(const MCInst *MI, unsigned OpNum,
97 printMemoryPostIndexed(MI, OpNum, O, BitWidth / 8);
100 void printMemoryRegOffset(const MCInst *MI, unsigned OpNum, raw_ostream &O,
102 template<int BitWidth>
103 void printMemoryRegOffset(const MCInst *MI, unsigned OpNum, raw_ostream &O) {
104 printMemoryRegOffset(MI, OpNum, O, BitWidth / 8);
107 void printFPImmOperand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
109 void printVectorList(const MCInst *MI, unsigned OpNum, raw_ostream &O,
110 StringRef LayoutSuffix);
112 /// Print a list of vector registers where the type suffix is implicit
113 /// (i.e. attached to the instruction rather than the registers).
114 void printImplicitlyTypedVectorList(const MCInst *MI, unsigned OpNum,
117 template <unsigned NumLanes, char LaneKind>
118 void printTypedVectorList(const MCInst *MI, unsigned OpNum, raw_ostream &O);
120 void printVectorIndex(const MCInst *MI, unsigned OpNum, raw_ostream &O);
121 void printAdrpLabel(const MCInst *MI, unsigned OpNum, raw_ostream &O);
122 void printBarrierOption(const MCInst *MI, unsigned OpNum, raw_ostream &O);
123 void printMSRSystemRegister(const MCInst *MI, unsigned OpNum, raw_ostream &O);
124 void printMRSSystemRegister(const MCInst *MI, unsigned OpNum, raw_ostream &O);
125 void printSystemPStateField(const MCInst *MI, unsigned OpNum, raw_ostream &O);
126 void printSIMDType10Operand(const MCInst *MI, unsigned OpNum, raw_ostream &O);
129 class ARM64AppleInstPrinter : public ARM64InstPrinter {
131 ARM64AppleInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII,
132 const MCRegisterInfo &MRI, const MCSubtargetInfo &STI);
134 void printInst(const MCInst *MI, raw_ostream &O, StringRef Annot) override;
136 void printInstruction(const MCInst *MI, raw_ostream &O) override;
137 bool printAliasInstr(const MCInst *MI, raw_ostream &O) override;
138 virtual void printCustomAliasOperand(const MCInst *MI, unsigned OpIdx,
139 unsigned PrintMethodIdx, raw_ostream &O);
140 StringRef getRegName(unsigned RegNo) const override {
141 return getRegisterName(RegNo);
143 static const char *getRegisterName(unsigned RegNo,
144 unsigned AltIdx = ARM64::NoRegAltName);