1 //===-- ARM64TargetMachine.h - Define TargetMachine for ARM64 ---*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the ARM64 specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARM64TARGETMACHINE_H
15 #define ARM64TARGETMACHINE_H
17 #include "ARM64InstrInfo.h"
18 #include "ARM64ISelLowering.h"
19 #include "ARM64Subtarget.h"
20 #include "ARM64FrameLowering.h"
21 #include "ARM64SelectionDAGInfo.h"
22 #include "llvm/IR/DataLayout.h"
23 #include "llvm/Target/TargetMachine.h"
24 #include "llvm/MC/MCStreamer.h"
28 class ARM64TargetMachine : public LLVMTargetMachine {
30 ARM64Subtarget Subtarget;
34 ARM64InstrInfo InstrInfo;
35 ARM64TargetLowering TLInfo;
36 ARM64FrameLowering FrameLowering;
37 ARM64SelectionDAGInfo TSInfo;
40 ARM64TargetMachine(const Target &T, StringRef TT, StringRef CPU, StringRef FS,
41 const TargetOptions &Options, Reloc::Model RM,
42 CodeModel::Model CM, CodeGenOpt::Level OL);
44 virtual const ARM64Subtarget *getSubtargetImpl() const { return &Subtarget; }
45 virtual const ARM64TargetLowering *getTargetLowering() const {
48 virtual const DataLayout *getDataLayout() const { return &DL; }
49 virtual const ARM64FrameLowering *getFrameLowering() const {
50 return &FrameLowering;
52 virtual const ARM64InstrInfo *getInstrInfo() const { return &InstrInfo; }
53 virtual const ARM64RegisterInfo *getRegisterInfo() const {
54 return &InstrInfo.getRegisterInfo();
56 virtual const ARM64SelectionDAGInfo *getSelectionDAGInfo() const {
60 // Pass Pipeline Configuration
61 virtual TargetPassConfig *createPassConfig(PassManagerBase &PM);
63 /// \brief Register ARM64 analysis passes with a pass manager.
64 virtual void addAnalysisPasses(PassManagerBase &PM);
67 } // end namespace llvm