1 //===- ARM64RegisterInfo.h - ARM64 Register Information Impl ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the ARM64 implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_TARGET_ARM64REGISTERINFO_H
15 #define LLVM_TARGET_ARM64REGISTERINFO_H
17 #define GET_REGINFO_HEADER
18 #include "ARM64GenRegisterInfo.inc"
24 class MachineFunction;
26 class TargetRegisterClass;
28 struct ARM64RegisterInfo : public ARM64GenRegisterInfo {
30 const ARM64InstrInfo *TII;
31 const ARM64Subtarget *STI;
34 ARM64RegisterInfo(const ARM64InstrInfo *tii, const ARM64Subtarget *sti);
36 bool isReservedReg(const MachineFunction &MF, unsigned Reg) const;
38 /// Code Generation virtual methods...
40 getCalleeSavedRegs(const MachineFunction *MF = 0) const override;
41 const uint32_t *getCallPreservedMask(CallingConv::ID) const override;
43 // Calls involved in thread-local variable lookup save more registers than
44 // normal calls, so they need a different mask to represent this.
45 const uint32_t *getTLSCallPreservedMask() const;
47 /// getThisReturnPreservedMask - Returns a call preserved mask specific to the
48 /// case that 'returned' is on an i64 first argument if the calling convention
49 /// is one that can (partially) model this attribute with a preserved mask
50 /// (i.e. it is a calling convention that uses the same register for the first
51 /// i64 argument and an i64 return value)
53 /// Should return NULL in the case that the calling convention does not have
55 const uint32_t *getThisReturnPreservedMask(CallingConv::ID) const;
57 BitVector getReservedRegs(const MachineFunction &MF) const override;
58 const TargetRegisterClass *
59 getPointerRegClass(const MachineFunction &MF,
60 unsigned Kind = 0) const override;
61 const TargetRegisterClass *
62 getCrossCopyRegClass(const TargetRegisterClass *RC) const override;
64 bool requiresRegisterScavenging(const MachineFunction &MF) const override;
65 bool useFPForScavengingIndex(const MachineFunction &MF) const override;
66 bool requiresFrameIndexScavenging(const MachineFunction &MF) const override;
68 bool needsFrameBaseReg(MachineInstr *MI, int64_t Offset) const override;
69 bool isFrameOffsetLegal(const MachineInstr *MI,
70 int64_t Offset) const override;
71 void materializeFrameBaseRegister(MachineBasicBlock *MBB, unsigned BaseReg,
73 int64_t Offset) const override;
74 void resolveFrameIndex(MachineBasicBlock::iterator I, unsigned BaseReg,
75 int64_t Offset) const override;
76 void eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj,
77 unsigned FIOperandNum,
78 RegScavenger *RS = NULL) const override;
79 bool cannotEliminateFrame(const MachineFunction &MF) const;
81 bool requiresVirtualBaseRegisters(const MachineFunction &MF) const override;
82 bool hasBasePointer(const MachineFunction &MF) const;
83 unsigned getBaseRegister() const;
85 // Debug information queries.
86 unsigned getFrameRegister(const MachineFunction &MF) const override;
88 unsigned getRegPressureLimit(const TargetRegisterClass *RC,
89 MachineFunction &MF) const override;
92 } // end namespace llvm
94 #endif // LLVM_TARGET_ARM64REGISTERINFO_H