1 //===- Thumb2InstrInfo.h - Thumb-2 Instruction Information ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Thumb-2 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef THUMB2INSTRUCTIONINFO_H
15 #define THUMB2INSTRUCTIONINFO_H
17 #include "llvm/Target/TargetInstrInfo.h"
19 #include "ARMInstrInfo.h"
20 #include "Thumb2RegisterInfo.h"
25 class Thumb2InstrInfo : public ARMBaseInstrInfo {
26 Thumb2RegisterInfo RI;
28 explicit Thumb2InstrInfo(const ARMSubtarget &STI);
30 // Return the non-pre/post incrementing version of 'Opc'. Return 0
31 // if there is not such an opcode.
32 unsigned getUnindexedOpcode(unsigned Opc) const;
34 // Return the opcode that implements 'Op', or 0 if no opcode
35 unsigned getOpcode(ARMII::Op Op) const;
37 // Return true if the block does not fall through.
38 bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
40 /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
41 /// such, whenever a client has an instance of instruction info, it should
42 /// always be able to get register info as well (through this method).
44 const Thumb2RegisterInfo &getRegisterInfo() const { return RI; }
48 #endif // THUMB2INSTRUCTIONINFO_H