1 //===- Thumb1RegisterInfo.h - Thumb-1 Register Information Impl ----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Thumb-1 implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef THUMB1REGISTERINFO_H
15 #define THUMB1REGISTERINFO_H
18 #include "ARMRegisterInfo.h"
19 #include "llvm/Target/TargetRegisterInfo.h"
23 class ARMBaseInstrInfo;
26 struct Thumb1RegisterInfo : public ARMBaseRegisterInfo {
28 Thumb1RegisterInfo(const ARMBaseInstrInfo &tii, const ARMSubtarget &STI);
30 /// emitLoadConstPool - Emits a load from constpool to materialize the
31 /// specified immediate.
32 void emitLoadConstPool(MachineBasicBlock &MBB,
33 MachineBasicBlock::iterator &MBBI,
35 unsigned DestReg, int Val,
36 ARMCC::CondCodes Pred = ARMCC::AL,
37 unsigned PredReg = 0) const;
39 /// Code Generation virtual methods...
40 const TargetRegisterClass *
41 getPhysicalRegisterRegClass(unsigned Reg, MVT VT = MVT::Other) const;
43 bool requiresRegisterScavenging(const MachineFunction &MF) const;
45 bool hasReservedCallFrame(MachineFunction &MF) const;
47 void eliminateCallFramePseudoInstr(MachineFunction &MF,
48 MachineBasicBlock &MBB,
49 MachineBasicBlock::iterator I) const;
51 void eliminateFrameIndex(MachineBasicBlock::iterator II,
52 int SPAdj, RegScavenger *RS = NULL) const;
54 void emitPrologue(MachineFunction &MF) const;
55 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
59 #endif // THUMB1REGISTERINFO_H