lib/Target/ARM/Thumb1InstrInfo.h

   1 //===- Thumb1InstrInfo.h - Thumb-1 Instruction Information ----------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file contains the Thumb-1 implementation of the TargetInstrInfo class.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef THUMB1INSTRUCTIONINFO_H
  15 #define THUMB1INSTRUCTIONINFO_H
  16
  17 #include "llvm/Target/TargetInstrInfo.h"
  18 #include "ARM.h"
  19 #include "ARMInstrInfo.h"
  20 #include "Thumb1RegisterInfo.h"
  21
  22 namespace llvm {
  23   class ARMSubtarget;
  24
  25 class Thumb1InstrInfo : public ARMBaseInstrInfo {
  26   Thumb1RegisterInfo RI;
  27 public:
  28   explicit Thumb1InstrInfo(const ARMSubtarget &STI);
  29
  30   // Return the non-pre/post incrementing version of 'Opc'. Return 0
  31   // if there is not such an opcode.
  32   unsigned getUnindexedOpcode(unsigned Opc) const;
  33
  34   // Return the opcode that implements 'Op', or 0 if no opcode
  35   unsigned getOpcode(ARMII::Op Op) const;
  36
  37   // If 'opcode' is an instruction with an unsigned offset that also
  38   // has a version with a signed offset, return the opcode for the
  39   // version with the signed offset. In 'NumBits' return the number of
  40   // bits for the signed offset.
  41   unsigned unsignedOffsetOpcodeToSigned(unsigned opcode,
  42                                         unsigned *NumBits) const;
  43
  44   // Return true if the block does not fall through.
  45   bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
  46
  47   /// getRegisterInfo - TargetInstrInfo is a superset of MRegister info.  As
  48   /// such, whenever a client has an instance of instruction info, it should
  49   /// always be able to get register info as well (through this method).
  50   ///
  51   const Thumb1RegisterInfo &getRegisterInfo() const { return RI; }
  52
  53   bool spillCalleeSavedRegisters(MachineBasicBlock &MBB,
  54                                  MachineBasicBlock::iterator MI,
  55                                  const std::vector<CalleeSavedInfo> &CSI) const;
  56   bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
  57                                    MachineBasicBlock::iterator MI,
  58                                    const std::vector<CalleeSavedInfo> &CSI) const;
  59
  60   bool isMoveInstr(const MachineInstr &MI,
  61                            unsigned &SrcReg, unsigned &DstReg,
  62                            unsigned &SrcSubIdx, unsigned &DstSubIdx) const;
  63   unsigned isLoadFromStackSlot(const MachineInstr *MI,
  64                                        int &FrameIndex) const;
  65   unsigned isStoreToStackSlot(const MachineInstr *MI,
  66                                       int &FrameIndex) const;
  67
  68   bool copyRegToReg(MachineBasicBlock &MBB,
  69                             MachineBasicBlock::iterator I,
  70                             unsigned DestReg, unsigned SrcReg,
  71                             const TargetRegisterClass *DestRC,
  72                             const TargetRegisterClass *SrcRC) const;
  73   void storeRegToStackSlot(MachineBasicBlock &MBB,
  74                                    MachineBasicBlock::iterator MBBI,
  75                                    unsigned SrcReg, bool isKill, int FrameIndex,
  76                                    const TargetRegisterClass *RC) const;
  77
  78   void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
  79                               SmallVectorImpl<MachineOperand> &Addr,
  80                               const TargetRegisterClass *RC,
  81                               SmallVectorImpl<MachineInstr*> &NewMIs) const;
  82
  83   void loadRegFromStackSlot(MachineBasicBlock &MBB,
  84                                     MachineBasicBlock::iterator MBBI,
  85                                     unsigned DestReg, int FrameIndex,
  86                                     const TargetRegisterClass *RC) const;
  87
  88   void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
  89                                SmallVectorImpl<MachineOperand> &Addr,
  90                                const TargetRegisterClass *RC,
  91                                SmallVectorImpl<MachineInstr*> &NewMIs) const;
  92
  93   bool canFoldMemoryOperand(const MachineInstr *MI,
  94                                     const SmallVectorImpl<unsigned> &Ops) const;
  95
  96   MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
  97                                       MachineInstr* MI,
  98                                       const SmallVectorImpl<unsigned> &Ops,
  99                                       int FrameIndex) const;
 100
 101   MachineInstr* foldMemoryOperandImpl(MachineFunction &MF,
 102                                       MachineInstr* MI,
 103                                       const SmallVectorImpl<unsigned> &Ops,
 104                                       MachineInstr* LoadMI) const {
 105     return 0;
 106   }
 107 };
 108 }
 109
 110 #endif // THUMB1INSTRUCTIONINFO_H