1 //===-- Thumb1FrameLowering.cpp - Thumb1 Frame Information ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Thumb1 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "Thumb1FrameLowering.h"
15 #include "ARMMachineFunctionInfo.h"
16 #include "llvm/CodeGen/MachineFrameInfo.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineInstrBuilder.h"
19 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 bool Thumb1FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const{
24 const MachineFrameInfo *FFI = MF.getFrameInfo();
25 unsigned CFSize = FFI->getMaxCallFrameSize();
26 // It's not always a good idea to include the call frame as part of the
27 // stack frame. ARM (especially Thumb) has small immediate offset to
28 // address the stack frame. So a large call frame can cause poor codegen
29 // and may even makes it impossible to scavenge a register.
30 if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4
33 return !MF.getFrameInfo()->hasVarSizedObjects();
37 emitSPUpdate(MachineBasicBlock &MBB,
38 MachineBasicBlock::iterator &MBBI,
39 const TargetInstrInfo &TII, DebugLoc dl,
40 const Thumb1RegisterInfo &MRI,
41 int NumBytes, unsigned MIFlags = MachineInstr::NoFlags) {
42 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
46 void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
47 MachineBasicBlock &MBB = MF.front();
48 MachineBasicBlock::iterator MBBI = MBB.begin();
49 MachineFrameInfo *MFI = MF.getFrameInfo();
50 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
51 const Thumb1RegisterInfo *RegInfo =
52 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
53 const Thumb1InstrInfo &TII =
54 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
56 unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
57 unsigned NumBytes = MFI->getStackSize();
58 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
59 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
60 unsigned FramePtr = RegInfo->getFrameRegister(MF);
61 unsigned BasePtr = RegInfo->getBaseRegister();
63 // Thumb add/sub sp, imm8 instructions implicitly multiply the offset by 4.
64 NumBytes = (NumBytes + 3) & ~3;
65 MFI->setStackSize(NumBytes);
67 // Determine the sizes of each callee-save spill areas and record which frame
68 // belongs to which callee-save spill areas.
69 unsigned GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0;
70 int FramePtrSpillFI = 0;
73 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize,
74 MachineInstr::FrameSetup);
76 if (!AFI->hasStackFrame()) {
78 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
79 MachineInstr::FrameSetup);
83 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
84 unsigned Reg = CSI[i].getReg();
85 int FI = CSI[i].getFrameIdx();
94 AFI->addGPRCalleeSavedArea1Frame(FI);
102 FramePtrSpillFI = FI;
103 if (STI.isTargetIOS()) {
104 AFI->addGPRCalleeSavedArea2Frame(FI);
107 AFI->addGPRCalleeSavedArea1Frame(FI);
112 AFI->addDPRCalleeSavedAreaFrame(FI);
117 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
119 if (MBBI != MBB.end())
120 dl = MBBI->getDebugLoc();
123 // Determine starting offsets of spill areas.
124 unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
125 unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
126 unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
127 bool HasFP = hasFP(MF);
129 AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) +
131 AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset);
132 AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
133 AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
134 NumBytes = DPRCSOffset;
136 // Adjust FP so it point to the stack slot that contains the previous FP.
138 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
139 .addFrameIndex(FramePtrSpillFI).addImm(0)
140 .setMIFlags(MachineInstr::FrameSetup));
142 // If offset is > 508 then sp cannot be adjusted in a single instruction,
143 // try restoring from fp instead.
144 AFI->setShouldRestoreSPFromFP(true);
148 // Insert it after all the callee-save spills.
149 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
150 MachineInstr::FrameSetup);
152 if (STI.isTargetELF() && HasFP)
153 MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() -
154 AFI->getFramePtrSpillOffset());
156 AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
157 AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
158 AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
160 // Thumb1 does not currently support dynamic stack realignment. Report a
161 // fatal error rather then silently generate bad code.
162 if (RegInfo->needsStackRealignment(MF))
163 report_fatal_error("Dynamic stack realignment not supported for thumb1.");
165 // If we need a base pointer, set it up here. It's whatever the value
166 // of the stack pointer is at this point. Any variable size objects
167 // will be allocated after this, so we can still use the base pointer
168 // to reference locals.
169 if (RegInfo->hasBasePointer(MF))
170 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
173 // If the frame has variable sized objects then the epilogue must restore
174 // the sp from fp. We can assume there's an FP here since hasFP already
175 // checks for hasVarSizedObjects.
176 if (MFI->hasVarSizedObjects())
177 AFI->setShouldRestoreSPFromFP(true);
180 static bool isCalleeSavedRegister(unsigned Reg, const uint16_t *CSRegs) {
181 for (unsigned i = 0; CSRegs[i]; ++i)
182 if (Reg == CSRegs[i])
187 static bool isCSRestore(MachineInstr *MI, const uint16_t *CSRegs) {
188 if (MI->getOpcode() == ARM::tLDRspi &&
189 MI->getOperand(1).isFI() &&
190 isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs))
192 else if (MI->getOpcode() == ARM::tPOP) {
193 // The first two operands are predicates. The last two are
194 // imp-def and imp-use of SP. Check everything in between.
195 for (int i = 2, e = MI->getNumOperands() - 2; i != e; ++i)
196 if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs))
203 void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF,
204 MachineBasicBlock &MBB) const {
205 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
206 assert((MBBI->getOpcode() == ARM::tBX_RET ||
207 MBBI->getOpcode() == ARM::tPOP_RET) &&
208 "Can only insert epilog into returning blocks");
209 DebugLoc dl = MBBI->getDebugLoc();
210 MachineFrameInfo *MFI = MF.getFrameInfo();
211 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
212 const Thumb1RegisterInfo *RegInfo =
213 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
214 const Thumb1InstrInfo &TII =
215 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
217 unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
218 int NumBytes = (int)MFI->getStackSize();
219 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs();
220 unsigned FramePtr = RegInfo->getFrameRegister(MF);
222 if (!AFI->hasStackFrame()) {
224 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
226 // Unwind MBBI to point to first LDR / VLDRD.
227 if (MBBI != MBB.begin()) {
230 while (MBBI != MBB.begin() && isCSRestore(MBBI, CSRegs));
231 if (!isCSRestore(MBBI, CSRegs))
235 // Move SP to start of FP callee save spill area.
236 NumBytes -= (AFI->getGPRCalleeSavedArea1Size() +
237 AFI->getGPRCalleeSavedArea2Size() +
238 AFI->getDPRCalleeSavedAreaSize());
240 if (AFI->shouldRestoreSPFromFP()) {
241 NumBytes = AFI->getFramePtrSpillOffset() - NumBytes;
242 // Reset SP based on frame pointer only if the stack frame extends beyond
243 // frame pointer stack slot, the target is ELF and the function has FP, or
244 // the target uses var sized objects.
246 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
247 "No scratch register to restore SP from FP!");
248 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
250 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
254 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
258 if (MBBI->getOpcode() == ARM::tBX_RET &&
259 &MBB.front() != MBBI &&
260 prior(MBBI)->getOpcode() == ARM::tPOP) {
261 MachineBasicBlock::iterator PMBBI = prior(MBBI);
262 emitSPUpdate(MBB, PMBBI, TII, dl, *RegInfo, NumBytes);
264 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
269 // Unlike T2 and ARM mode, the T1 pop instruction cannot restore
270 // to LR, and we can't pop the value directly to the PC since
271 // we need to update the SP after popping the value. Therefore, we
272 // pop the old LR into R3 as a temporary.
274 // Move back past the callee-saved register restoration
275 while (MBBI != MBB.end() && isCSRestore(MBBI, CSRegs))
277 // Epilogue for vararg functions: pop LR to R3 and branch off it.
278 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tPOP)))
279 .addReg(ARM::R3, RegState::Define);
281 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, VARegSaveSize);
283 MachineInstrBuilder MIB =
284 BuildMI(MBB, MBBI, dl, TII.get(ARM::tBX_RET_vararg))
285 .addReg(ARM::R3, RegState::Kill);
287 MIB.copyImplicitOps(&*MBBI);
288 // erase the old tBX_RET instruction
293 bool Thumb1FrameLowering::
294 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
295 MachineBasicBlock::iterator MI,
296 const std::vector<CalleeSavedInfo> &CSI,
297 const TargetRegisterInfo *TRI) const {
302 MachineFunction &MF = *MBB.getParent();
303 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
305 if (MI != MBB.end()) DL = MI->getDebugLoc();
307 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));
309 for (unsigned i = CSI.size(); i != 0; --i) {
310 unsigned Reg = CSI[i-1].getReg();
313 // Add the callee-saved register as live-in unless it's LR and
314 // @llvm.returnaddress is called. If LR is returned for @llvm.returnaddress
315 // then it's already added to the function and entry block live-in sets.
316 if (Reg == ARM::LR) {
317 MachineFunction &MF = *MBB.getParent();
318 if (MF.getFrameInfo()->isReturnAddressTaken() &&
319 MF.getRegInfo().isLiveIn(Reg))
326 MIB.addReg(Reg, getKillRegState(isKill));
328 MIB.setMIFlags(MachineInstr::FrameSetup);
332 bool Thumb1FrameLowering::
333 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
334 MachineBasicBlock::iterator MI,
335 const std::vector<CalleeSavedInfo> &CSI,
336 const TargetRegisterInfo *TRI) const {
340 MachineFunction &MF = *MBB.getParent();
341 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
342 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
344 bool isVarArg = AFI->getVarArgsRegSaveSize() > 0;
345 DebugLoc DL = MI->getDebugLoc();
346 MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP));
349 bool NumRegs = false;
350 for (unsigned i = CSI.size(); i != 0; --i) {
351 unsigned Reg = CSI[i-1].getReg();
352 if (Reg == ARM::LR) {
353 // Special epilogue for vararg functions. See emitEpilogue
357 (*MIB).setDesc(TII.get(ARM::tPOP_RET));
358 MIB.copyImplicitOps(&*MI);
361 MIB.addReg(Reg, getDefRegState(true));
365 // It's illegal to emit pop instruction without operands.
367 MBB.insert(MI, &*MIB);
369 MF.DeleteMachineInstr(MIB);