1 //===-- Thumb1FrameLowering.cpp - Thumb1 Frame Information ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Thumb1 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "Thumb1FrameLowering.h"
15 #include "ARMMachineFunctionInfo.h"
16 #include "llvm/CodeGen/MachineFrameInfo.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineInstrBuilder.h"
19 #include "llvm/CodeGen/MachineModuleInfo.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 bool Thumb1FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const{
25 const MachineFrameInfo *FFI = MF.getFrameInfo();
26 unsigned CFSize = FFI->getMaxCallFrameSize();
27 // It's not always a good idea to include the call frame as part of the
28 // stack frame. ARM (especially Thumb) has small immediate offset to
29 // address the stack frame. So a large call frame can cause poor codegen
30 // and may even makes it impossible to scavenge a register.
31 if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4
34 return !MF.getFrameInfo()->hasVarSizedObjects();
38 emitSPUpdate(MachineBasicBlock &MBB,
39 MachineBasicBlock::iterator &MBBI,
40 const TargetInstrInfo &TII, DebugLoc dl,
41 const Thumb1RegisterInfo &MRI,
42 int NumBytes, unsigned MIFlags = MachineInstr::NoFlags) {
43 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
48 void Thumb1FrameLowering::
49 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
50 MachineBasicBlock::iterator I) const {
51 const Thumb1InstrInfo &TII =
52 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
53 const Thumb1RegisterInfo *RegInfo =
54 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
55 if (!hasReservedCallFrame(MF)) {
56 // If we have alloca, convert as follows:
57 // ADJCALLSTACKDOWN -> sub, sp, sp, amount
58 // ADJCALLSTACKUP -> add, sp, sp, amount
59 MachineInstr *Old = I;
60 DebugLoc dl = Old->getDebugLoc();
61 unsigned Amount = Old->getOperand(0).getImm();
63 // We need to keep the stack aligned properly. To do this, we round the
64 // amount of space needed for the outgoing arguments up to the next
65 // alignment boundary.
66 unsigned Align = getStackAlignment();
67 Amount = (Amount+Align-1)/Align*Align;
69 // Replace the pseudo instruction with a new instruction...
70 unsigned Opc = Old->getOpcode();
71 if (Opc == ARM::ADJCALLSTACKDOWN || Opc == ARM::tADJCALLSTACKDOWN) {
72 emitSPUpdate(MBB, I, TII, dl, *RegInfo, -Amount);
74 assert(Opc == ARM::ADJCALLSTACKUP || Opc == ARM::tADJCALLSTACKUP);
75 emitSPUpdate(MBB, I, TII, dl, *RegInfo, Amount);
82 void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
83 MachineBasicBlock &MBB = MF.front();
84 MachineBasicBlock::iterator MBBI = MBB.begin();
85 MachineFrameInfo *MFI = MF.getFrameInfo();
86 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
87 MachineModuleInfo &MMI = MF.getMMI();
88 const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
89 const Thumb1RegisterInfo *RegInfo =
90 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
91 const Thumb1InstrInfo &TII =
92 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
94 unsigned Align = MF.getTarget().getFrameLowering()->getStackAlignment();
95 unsigned ArgRegsSaveSize = AFI->getArgRegsSaveSize(Align);
96 unsigned NumBytes = MFI->getStackSize();
97 assert(NumBytes >= ArgRegsSaveSize &&
98 "ArgRegsSaveSize is included in NumBytes");
99 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
100 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
101 unsigned FramePtr = RegInfo->getFrameRegister(MF);
102 unsigned BasePtr = RegInfo->getBaseRegister();
105 // Thumb add/sub sp, imm8 instructions implicitly multiply the offset by 4.
106 NumBytes = (NumBytes + 3) & ~3;
107 MFI->setStackSize(NumBytes);
109 // Determine the sizes of each callee-save spill areas and record which frame
110 // belongs to which callee-save spill areas.
111 unsigned GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0;
112 int FramePtrSpillFI = 0;
114 if (ArgRegsSaveSize) {
115 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -ArgRegsSaveSize,
116 MachineInstr::FrameSetup);
117 MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
118 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
120 CFAOffset -= ArgRegsSaveSize;
122 MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
125 if (!AFI->hasStackFrame()) {
126 if (NumBytes - ArgRegsSaveSize != 0) {
127 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -(NumBytes - ArgRegsSaveSize),
128 MachineInstr::FrameSetup);
129 MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
130 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
132 CFAOffset -= NumBytes - ArgRegsSaveSize;
134 MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
139 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
140 unsigned Reg = CSI[i].getReg();
141 int FI = CSI[i].getFrameIdx();
147 if (STI.isTargetMachO()) {
158 FramePtrSpillFI = FI;
166 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
168 if (MBBI != MBB.end())
169 dl = MBBI->getDebugLoc();
172 // Determine starting offsets of spill areas.
173 unsigned DPRCSOffset = NumBytes - ArgRegsSaveSize - (GPRCS1Size + GPRCS2Size + DPRCSSize);
174 unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
175 unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
176 bool HasFP = hasFP(MF);
178 AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) +
180 AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset);
181 AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
182 AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
183 NumBytes = DPRCSOffset;
185 int FramePtrOffsetInBlock = 0;
186 unsigned adjustedGPRCS1Size = GPRCS1Size;
187 if (tryFoldSPUpdateIntoPushPop(STI, MF, std::prev(MBBI), NumBytes)) {
188 FramePtrOffsetInBlock = NumBytes;
189 adjustedGPRCS1Size += NumBytes;
193 MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
194 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL)).addSym(SPLabel);
195 if (adjustedGPRCS1Size) {
196 CFAOffset -= adjustedGPRCS1Size;
198 MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
200 for (std::vector<CalleeSavedInfo>::const_iterator I = CSI.begin(),
201 E = CSI.end(); I != E; ++I) {
202 unsigned Reg = I->getReg();
203 int FI = I->getFrameIdx();
210 if (STI.isTargetMachO())
222 MMI.addFrameInst(MCCFIInstruction::createOffset(SPLabel,
223 MRI->getDwarfRegNum(Reg, true),
224 MFI->getObjectOffset(FI)));
230 // Adjust FP so it point to the stack slot that contains the previous FP.
232 FramePtrOffsetInBlock += MFI->getObjectOffset(FramePtrSpillFI)
233 + GPRCS1Size + ArgRegsSaveSize;
234 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
235 .addReg(ARM::SP).addImm(FramePtrOffsetInBlock / 4)
236 .setMIFlags(MachineInstr::FrameSetup));
237 MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
238 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
240 if(FramePtrOffsetInBlock) {
241 CFAOffset += FramePtrOffsetInBlock;
243 MCCFIInstruction::createDefCfa(SPLabel,
244 MRI->getDwarfRegNum(FramePtr, true), CFAOffset));
247 MCCFIInstruction::createDefCfaRegister(SPLabel,
248 MRI->getDwarfRegNum(FramePtr, true)));
250 // If offset is > 508 then sp cannot be adjusted in a single instruction,
251 // try restoring from fp instead.
252 AFI->setShouldRestoreSPFromFP(true);
256 // Insert it after all the callee-save spills.
257 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
258 MachineInstr::FrameSetup);
260 MCSymbol *SPLabel = MMI.getContext().CreateTempSymbol();
261 BuildMI(MBB, MBBI, dl, TII.get(TargetOpcode::PROLOG_LABEL))
263 CFAOffset -= NumBytes;
265 MCCFIInstruction::createDefCfaOffset(SPLabel, CFAOffset));
269 if (STI.isTargetELF() && HasFP)
270 MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() -
271 AFI->getFramePtrSpillOffset());
273 AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
274 AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
275 AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
277 // Thumb1 does not currently support dynamic stack realignment. Report a
278 // fatal error rather then silently generate bad code.
279 if (RegInfo->needsStackRealignment(MF))
280 report_fatal_error("Dynamic stack realignment not supported for thumb1.");
282 // If we need a base pointer, set it up here. It's whatever the value
283 // of the stack pointer is at this point. Any variable size objects
284 // will be allocated after this, so we can still use the base pointer
285 // to reference locals.
286 if (RegInfo->hasBasePointer(MF))
287 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
290 // If the frame has variable sized objects then the epilogue must restore
291 // the sp from fp. We can assume there's an FP here since hasFP already
292 // checks for hasVarSizedObjects.
293 if (MFI->hasVarSizedObjects())
294 AFI->setShouldRestoreSPFromFP(true);
297 static bool isCSRestore(MachineInstr *MI, const uint16_t *CSRegs) {
298 if (MI->getOpcode() == ARM::tLDRspi &&
299 MI->getOperand(1).isFI() &&
300 isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs))
302 else if (MI->getOpcode() == ARM::tPOP) {
303 // The first two operands are predicates. The last two are
304 // imp-def and imp-use of SP. Check everything in between.
305 for (int i = 2, e = MI->getNumOperands() - 2; i != e; ++i)
306 if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs))
313 void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF,
314 MachineBasicBlock &MBB) const {
315 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
316 assert((MBBI->getOpcode() == ARM::tBX_RET ||
317 MBBI->getOpcode() == ARM::tPOP_RET) &&
318 "Can only insert epilog into returning blocks");
319 DebugLoc dl = MBBI->getDebugLoc();
320 MachineFrameInfo *MFI = MF.getFrameInfo();
321 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
322 const Thumb1RegisterInfo *RegInfo =
323 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
324 const Thumb1InstrInfo &TII =
325 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
327 unsigned Align = MF.getTarget().getFrameLowering()->getStackAlignment();
328 unsigned ArgRegsSaveSize = AFI->getArgRegsSaveSize(Align);
329 int NumBytes = (int)MFI->getStackSize();
330 assert((unsigned)NumBytes >= ArgRegsSaveSize &&
331 "ArgRegsSaveSize is included in NumBytes");
332 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs();
333 unsigned FramePtr = RegInfo->getFrameRegister(MF);
335 if (!AFI->hasStackFrame()) {
336 if (NumBytes - ArgRegsSaveSize != 0)
337 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes - ArgRegsSaveSize);
339 // Unwind MBBI to point to first LDR / VLDRD.
340 if (MBBI != MBB.begin()) {
343 while (MBBI != MBB.begin() && isCSRestore(MBBI, CSRegs));
344 if (!isCSRestore(MBBI, CSRegs))
348 // Move SP to start of FP callee save spill area.
349 NumBytes -= (AFI->getGPRCalleeSavedArea1Size() +
350 AFI->getGPRCalleeSavedArea2Size() +
351 AFI->getDPRCalleeSavedAreaSize() +
354 if (AFI->shouldRestoreSPFromFP()) {
355 NumBytes = AFI->getFramePtrSpillOffset() - NumBytes;
356 // Reset SP based on frame pointer only if the stack frame extends beyond
357 // frame pointer stack slot, the target is ELF and the function has FP, or
358 // the target uses var sized objects.
360 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
361 "No scratch register to restore SP from FP!");
362 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
364 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
368 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
372 if (MBBI->getOpcode() == ARM::tBX_RET &&
373 &MBB.front() != MBBI &&
374 std::prev(MBBI)->getOpcode() == ARM::tPOP) {
375 MachineBasicBlock::iterator PMBBI = std::prev(MBBI);
376 if (!tryFoldSPUpdateIntoPushPop(STI, MF, PMBBI, NumBytes))
377 emitSPUpdate(MBB, PMBBI, TII, dl, *RegInfo, NumBytes);
378 } else if (!tryFoldSPUpdateIntoPushPop(STI, MF, MBBI, NumBytes))
379 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
383 if (ArgRegsSaveSize) {
384 // Unlike T2 and ARM mode, the T1 pop instruction cannot restore
385 // to LR, and we can't pop the value directly to the PC since
386 // we need to update the SP after popping the value. Therefore, we
387 // pop the old LR into R3 as a temporary.
389 // Get the last instruction, tBX_RET
390 MBBI = MBB.getLastNonDebugInstr();
391 assert (MBBI->getOpcode() == ARM::tBX_RET);
392 // Epilogue for vararg functions: pop LR to R3 and branch off it.
393 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tPOP)))
394 .addReg(ARM::R3, RegState::Define);
396 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, ArgRegsSaveSize);
398 MachineInstrBuilder MIB =
399 BuildMI(MBB, MBBI, dl, TII.get(ARM::tBX_RET_vararg))
400 .addReg(ARM::R3, RegState::Kill);
402 MIB.copyImplicitOps(&*MBBI);
403 // erase the old tBX_RET instruction
408 bool Thumb1FrameLowering::
409 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
410 MachineBasicBlock::iterator MI,
411 const std::vector<CalleeSavedInfo> &CSI,
412 const TargetRegisterInfo *TRI) const {
417 MachineFunction &MF = *MBB.getParent();
418 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
420 if (MI != MBB.end()) DL = MI->getDebugLoc();
422 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));
424 for (unsigned i = CSI.size(); i != 0; --i) {
425 unsigned Reg = CSI[i-1].getReg();
428 // Add the callee-saved register as live-in unless it's LR and
429 // @llvm.returnaddress is called. If LR is returned for @llvm.returnaddress
430 // then it's already added to the function and entry block live-in sets.
431 if (Reg == ARM::LR) {
432 MachineFunction &MF = *MBB.getParent();
433 if (MF.getFrameInfo()->isReturnAddressTaken() &&
434 MF.getRegInfo().isLiveIn(Reg))
441 MIB.addReg(Reg, getKillRegState(isKill));
443 MIB.setMIFlags(MachineInstr::FrameSetup);
447 bool Thumb1FrameLowering::
448 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
449 MachineBasicBlock::iterator MI,
450 const std::vector<CalleeSavedInfo> &CSI,
451 const TargetRegisterInfo *TRI) const {
455 MachineFunction &MF = *MBB.getParent();
456 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
457 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
459 bool isVarArg = AFI->getArgRegsSaveSize() > 0;
460 DebugLoc DL = MI->getDebugLoc();
461 MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP));
464 bool NumRegs = false;
465 for (unsigned i = CSI.size(); i != 0; --i) {
466 unsigned Reg = CSI[i-1].getReg();
467 if (Reg == ARM::LR) {
468 // Special epilogue for vararg functions. See emitEpilogue
472 (*MIB).setDesc(TII.get(ARM::tPOP_RET));
473 MIB.copyImplicitOps(&*MI);
476 MIB.addReg(Reg, getDefRegState(true));
480 // It's illegal to emit pop instruction without operands.
482 MBB.insert(MI, &*MIB);
484 MF.DeleteMachineInstr(MIB);