1 //===-- NEONPreAllocPass.cpp - Allocate adjacent NEON registers--*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #define DEBUG_TYPE "neon-prealloc"
12 #include "ARMInstrInfo.h"
13 #include "llvm/CodeGen/MachineInstr.h"
14 #include "llvm/CodeGen/MachineInstrBuilder.h"
15 #include "llvm/CodeGen/MachineFunctionPass.h"
19 class VISIBILITY_HIDDEN NEONPreAllocPass : public MachineFunctionPass {
20 const TargetInstrInfo *TII;
24 NEONPreAllocPass() : MachineFunctionPass(&ID) {}
26 virtual bool runOnMachineFunction(MachineFunction &MF);
28 virtual const char *getPassName() const {
29 return "NEON register pre-allocation pass";
33 bool PreAllocNEONRegisters(MachineBasicBlock &MBB);
36 char NEONPreAllocPass::ID = 0;
39 static bool isNEONMultiRegOp(int Opcode, unsigned &FirstOpnd,
121 bool NEONPreAllocPass::PreAllocNEONRegisters(MachineBasicBlock &MBB) {
122 bool Modified = false;
124 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
125 for (; MBBI != E; ++MBBI) {
126 MachineInstr *MI = &*MBBI;
127 unsigned FirstOpnd, NumRegs;
128 if (!isNEONMultiRegOp(MI->getOpcode(), FirstOpnd, NumRegs))
131 MachineBasicBlock::iterator NextI = next(MBBI);
132 for (unsigned R = 0; R < NumRegs; ++R) {
133 MachineOperand &MO = MI->getOperand(FirstOpnd + R);
134 assert(MO.isReg() && MO.getSubReg() == 0 && "unexpected operand");
135 unsigned VirtReg = MO.getReg();
136 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
137 "expected a virtual register");
139 // For now, just assign a fixed set of adjacent registers.
140 // This leaves plenty of room for future improvements.
141 static const unsigned NEONDRegs[] = {
142 ARM::D0, ARM::D1, ARM::D2, ARM::D3
144 MO.setReg(NEONDRegs[R]);
147 // Insert a copy from VirtReg.
148 AddDefaultPred(BuildMI(MBB, MBBI, MI->getDebugLoc(),
149 TII->get(ARM::FCPYD), MO.getReg())
152 MachineInstr *CopyMI = prior(MBBI);
153 CopyMI->findRegisterUseOperand(VirtReg)->setIsKill();
156 } else if (MO.isDef() && !MO.isDead()) {
157 // Add a copy to VirtReg.
158 AddDefaultPred(BuildMI(MBB, NextI, MI->getDebugLoc(),
159 TII->get(ARM::FCPYD), VirtReg)
160 .addReg(MO.getReg()));
168 bool NEONPreAllocPass::runOnMachineFunction(MachineFunction &MF) {
169 TII = MF.getTarget().getInstrInfo();
171 bool Modified = false;
172 for (MachineFunction::iterator MFI = MF.begin(), E = MF.end(); MFI != E;
174 MachineBasicBlock &MBB = *MFI;
175 Modified |= PreAllocNEONRegisters(MBB);
181 /// createNEONPreAllocPass - returns an instance of the NEON register
182 /// pre-allocation pass.
183 FunctionPass *llvm::createNEONPreAllocPass() {
184 return new NEONPreAllocPass();