1 //===-- NEONPreAllocPass.cpp - Allocate adjacent NEON registers--*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #define DEBUG_TYPE "neon-prealloc"
12 #include "ARMInstrInfo.h"
13 #include "llvm/CodeGen/MachineInstr.h"
14 #include "llvm/CodeGen/MachineInstrBuilder.h"
15 #include "llvm/CodeGen/MachineFunctionPass.h"
19 class VISIBILITY_HIDDEN NEONPreAllocPass : public MachineFunctionPass {
20 const TargetInstrInfo *TII;
24 NEONPreAllocPass() : MachineFunctionPass(&ID) {}
26 virtual bool runOnMachineFunction(MachineFunction &MF);
28 virtual const char *getPassName() const {
29 return "NEON register pre-allocation pass";
33 bool PreAllocNEONRegisters(MachineBasicBlock &MBB);
36 char NEONPreAllocPass::ID = 0;
39 static bool isNEONMultiRegOp(int Opcode, unsigned &FirstOpnd,
73 bool NEONPreAllocPass::PreAllocNEONRegisters(MachineBasicBlock &MBB) {
74 bool Modified = false;
76 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
77 for (; MBBI != E; ++MBBI) {
78 MachineInstr *MI = &*MBBI;
79 unsigned FirstOpnd, NumRegs;
80 if (!isNEONMultiRegOp(MI->getOpcode(), FirstOpnd, NumRegs))
83 MachineBasicBlock::iterator NextI = next(MBBI);
84 for (unsigned R = 0; R < NumRegs; ++R) {
85 MachineOperand &MO = MI->getOperand(FirstOpnd + R);
86 assert(MO.isReg() && MO.getSubReg() == 0 && "unexpected operand");
87 unsigned VirtReg = MO.getReg();
88 assert(TargetRegisterInfo::isVirtualRegister(VirtReg) &&
89 "expected a virtual register");
91 // For now, just assign a fixed set of adjacent registers.
92 // This leaves plenty of room for future improvements.
93 static const unsigned NEONDRegs[] = {
94 ARM::D0, ARM::D1, ARM::D2, ARM::D3
96 MO.setReg(NEONDRegs[R]);
99 // Insert a copy from VirtReg.
100 AddDefaultPred(BuildMI(MBB, MBBI, MI->getDebugLoc(),
101 TII->get(ARM::FCPYD), MO.getReg())
104 MachineInstr *CopyMI = prior(MBBI);
105 CopyMI->findRegisterUseOperand(VirtReg)->setIsKill();
108 } else if (MO.isDef() && !MO.isDead()) {
109 // Add a copy to VirtReg.
110 AddDefaultPred(BuildMI(MBB, NextI, MI->getDebugLoc(),
111 TII->get(ARM::FCPYD), VirtReg)
112 .addReg(MO.getReg()));
120 bool NEONPreAllocPass::runOnMachineFunction(MachineFunction &MF) {
121 TII = MF.getTarget().getInstrInfo();
123 bool Modified = false;
124 for (MachineFunction::iterator MFI = MF.begin(), E = MF.end(); MFI != E;
126 MachineBasicBlock &MBB = *MFI;
127 Modified |= PreAllocNEONRegisters(MBB);
133 /// createNEONPreAllocPass - returns an instance of the NEON register
134 /// pre-allocation pass.
135 FunctionPass *llvm::createNEONPreAllocPass() {
136 return new NEONPreAllocPass();