1 //===-- ARMUnwindOpAsm.cpp - ARM Unwind Opcodes Assembler -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the unwind opcode assmebler for ARM exception handling
13 //===----------------------------------------------------------------------===//
15 #include "ARMUnwindOpAsm.h"
17 #include "ARMUnwindOp.h"
18 #include "llvm/Support/ErrorHandling.h"
19 #include "llvm/Support/LEB128.h"
23 void UnwindOpcodeAssembler::EmitRegSave(uint32_t RegSave) {
27 // One byte opcode to save register r14 and r11-r4
28 if (RegSave & (1u << 4)) {
29 // The one byte opcode will always save r4, thus we can't use the one byte
30 // opcode when r4 is not in .save directive.
32 // Compute the consecutive registers from r4 to r11.
34 uint32_t Mask = (1u << 4);
35 for (uint32_t Bit = (1u << 5); Bit < (1u << 12); Bit <<= 1) {
36 if ((RegSave & Bit) == 0u)
42 // Emit this opcode when the mask covers every registers.
43 uint32_t UnmaskedReg = RegSave & 0xfff0u & (~Mask);
44 if (UnmaskedReg == 0u) {
46 Ops.push_back(UNWIND_OPCODE_POP_REG_RANGE_R4 | Range);
48 } else if (UnmaskedReg == (1u << 14)) {
49 // Pop r[14] + r[4 : (4 + n)]
50 Ops.push_back(UNWIND_OPCODE_POP_REG_RANGE_R4_R14 | Range);
55 // Two bytes opcode to save register r15-r4
56 if ((RegSave & 0xfff0u) != 0) {
57 uint32_t Op = UNWIND_OPCODE_POP_REG_MASK_R4 | (RegSave >> 4);
58 Ops.push_back(static_cast<uint8_t>(Op >> 8));
59 Ops.push_back(static_cast<uint8_t>(Op & 0xff));
62 // Opcode to save register r3-r0
63 if ((RegSave & 0x000fu) != 0) {
64 uint32_t Op = UNWIND_OPCODE_POP_REG_MASK | (RegSave & 0x000fu);
65 Ops.push_back(static_cast<uint8_t>(Op >> 8));
66 Ops.push_back(static_cast<uint8_t>(Op & 0xff));
70 /// Emit unwind opcodes for .vsave directives
71 void UnwindOpcodeAssembler::EmitVFPRegSave(uint32_t VFPRegSave) {
75 uint32_t Bit = 1u << (i - 1);
76 if ((VFPRegSave & Bit) == 0u) {
86 while (i > 16 && (VFPRegSave & Bit)) {
93 UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD_D16 | ((i - 16) << 4) | Range;
94 Ops.push_back(static_cast<uint8_t>(Op >> 8));
95 Ops.push_back(static_cast<uint8_t>(Op & 0xff));
99 uint32_t Bit = 1u << (i - 1);
100 if ((VFPRegSave & Bit) == 0u) {
110 while (i > 0 && (VFPRegSave & Bit)) {
116 uint32_t Op = UNWIND_OPCODE_POP_VFP_REG_RANGE_FSTMFDD | (i << 4) | Range;
117 Ops.push_back(static_cast<uint8_t>(Op >> 8));
118 Ops.push_back(static_cast<uint8_t>(Op & 0xff));
122 /// Emit unwind opcodes for .setfp directives
123 void UnwindOpcodeAssembler::EmitSetFP(uint16_t FPReg) {
124 Ops.push_back(UNWIND_OPCODE_SET_VSP | FPReg);
127 /// Emit unwind opcodes to update stack pointer
128 void UnwindOpcodeAssembler::EmitSPOffset(int64_t Offset) {
129 if (Offset > 0x200) {
131 size_t Size = encodeULEB128((Offset - 0x204) >> 2, Buff);
132 Ops.push_back(UNWIND_OPCODE_INC_VSP_ULEB128);
133 Ops.append(Buff, Buff + Size);
134 } else if (Offset > 0) {
135 if (Offset > 0x100) {
136 Ops.push_back(UNWIND_OPCODE_INC_VSP | 0x3fu);
139 Ops.push_back(UNWIND_OPCODE_INC_VSP |
140 static_cast<uint8_t>((Offset - 4) >> 2));
141 } else if (Offset < 0) {
142 while (Offset < -0x100) {
143 Ops.push_back(UNWIND_OPCODE_DEC_VSP | 0x3fu);
146 Ops.push_back(UNWIND_OPCODE_DEC_VSP |
147 static_cast<uint8_t>(((-Offset) - 4) >> 2));
151 void UnwindOpcodeAssembler::AddOpcodeSizePrefix(size_t Pos) {
152 size_t SizeInWords = (size() + 3) / 4;
153 assert(SizeInWords <= 0x100u &&
154 "Only 256 additional words are allowed for unwind opcodes");
155 Ops[Pos] = static_cast<uint8_t>(SizeInWords - 1);
158 void UnwindOpcodeAssembler::AddPersonalityIndexPrefix(size_t Pos, unsigned PI) {
159 assert(PI < NUM_PERSONALITY_INDEX && "Invalid personality prefix");
160 Ops[Pos] = EHT_COMPACT | PI;
163 void UnwindOpcodeAssembler::EmitFinishOpcodes() {
164 for (size_t i = (0x4u - (size() & 0x3u)) & 0x3u; i > 0; --i)
165 Ops.push_back(UNWIND_OPCODE_FINISH);
168 void UnwindOpcodeAssembler::Finalize() {
169 if (HasPersonality) {
170 // Personality specified by .personality directive
172 AddOpcodeSizePrefix(1);
174 if (getOpcodeSize() <= 3) {
175 // __aeabi_unwind_cpp_pr0: [ 0x80 , OP1 , OP2 , OP3 ]
177 PersonalityIndex = AEABI_UNWIND_CPP_PR0;
178 AddPersonalityIndexPrefix(Offset, PersonalityIndex);
180 // __aeabi_unwind_cpp_pr1: [ 0x81 , SIZE , OP1 , OP2 , ... ]
182 PersonalityIndex = AEABI_UNWIND_CPP_PR1;
183 AddPersonalityIndexPrefix(Offset, PersonalityIndex);
184 AddOpcodeSizePrefix(1);
188 // Emit the padding finish opcodes if the size() is not multiple of 4.
191 // Swap the byte order
192 uint8_t *Ptr = Ops.begin() + Offset;
193 assert(size() % 4 == 0 && "Final unwind opcodes should align to 4");
194 for (size_t i = 0, n = size(); i < n; i += 4) {
195 std::swap(Ptr[i], Ptr[i + 3]);
196 std::swap(Ptr[i + 1], Ptr[i + 2]);