1 //===-- ARMMCTargetDesc.h - ARM Target Descriptions -------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides ARM specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARMMCTARGETDESC_H
15 #define ARMMCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
27 class MCSubtargetInfo;
28 class MCRelocationInfo;
33 extern Target TheARMTarget, TheThumbTarget;
36 std::string ParseARMTriple(StringRef TT, StringRef CPU);
38 /// createARMMCSubtargetInfo - Create a ARM MCSubtargetInfo instance.
39 /// This is exposed so Asm parser, etc. do not need to go through
41 MCSubtargetInfo *createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
45 MCCodeEmitter *createARMMCCodeEmitter(const MCInstrInfo &MCII,
46 const MCRegisterInfo &MRI,
47 const MCSubtargetInfo &STI,
50 MCAsmBackend *createARMAsmBackend(const Target &T, StringRef TT, StringRef CPU);
52 /// createARMELFObjectWriter - Construct an ELF Mach-O object writer.
53 MCObjectWriter *createARMELFObjectWriter(raw_ostream &OS,
56 /// createARMMachObjectWriter - Construct an ARM Mach-O object writer.
57 MCObjectWriter *createARMMachObjectWriter(raw_ostream &OS,
63 /// createARMMachORelocationInfo - Construct ARM Mach-O relocation info.
64 MCRelocationInfo *createARMMachORelocationInfo(MCContext &Ctx);
65 } // End llvm namespace
67 // Defines symbolic names for ARM registers. This defines a mapping from
68 // register name to register number.
70 #define GET_REGINFO_ENUM
71 #include "ARMGenRegisterInfo.inc"
73 // Defines symbolic names for the ARM instructions.
75 #define GET_INSTRINFO_ENUM
76 #include "ARMGenInstrInfo.inc"
78 #define GET_SUBTARGETINFO_ENUM
79 #include "ARMGenSubtargetInfo.inc"