1 //===-- ARMMCTargetDesc.cpp - ARM Target Descriptions ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides ARM specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #include "ARMBaseInfo.h"
15 #include "ARMMCAsmInfo.h"
16 #include "ARMMCTargetDesc.h"
17 #include "InstPrinter/ARMInstPrinter.h"
18 #include "llvm/ADT/Triple.h"
19 #include "llvm/MC/MCCodeGenInfo.h"
20 #include "llvm/MC/MCELFStreamer.h"
21 #include "llvm/MC/MCInstrAnalysis.h"
22 #include "llvm/MC/MCInstrInfo.h"
23 #include "llvm/MC/MCRegisterInfo.h"
24 #include "llvm/MC/MCStreamer.h"
25 #include "llvm/MC/MCSubtargetInfo.h"
26 #include "llvm/Support/ErrorHandling.h"
27 #include "llvm/Support/TargetRegistry.h"
31 #define GET_REGINFO_MC_DESC
32 #include "ARMGenRegisterInfo.inc"
34 static bool getMCRDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
36 if (STI.getFeatureBits() & llvm::ARM::HasV7Ops &&
37 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) &&
38 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) &&
39 // Checks for the deprecated CP15ISB encoding:
40 // mcr p15, #0, rX, c7, c5, #4
41 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) {
42 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) {
43 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) {
44 Info = "deprecated since v7, use 'isb'";
48 // Checks for the deprecated CP15DSB encoding:
49 // mcr p15, #0, rX, c7, c10, #4
50 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) {
51 Info = "deprecated since v7, use 'dsb'";
55 // Checks for the deprecated CP15DMB encoding:
56 // mcr p15, #0, rX, c7, c10, #5
57 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 &&
58 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) {
59 Info = "deprecated since v7, use 'dmb'";
66 static bool getITDeprecationInfo(MCInst &MI, MCSubtargetInfo &STI,
68 if (STI.getFeatureBits() & llvm::ARM::HasV8Ops &&
69 MI.getOperand(1).isImm() && MI.getOperand(1).getImm() != 8) {
70 Info = "applying IT instruction to more than one subsequent instruction is deprecated";
77 #define GET_INSTRINFO_MC_DESC
78 #include "ARMGenInstrInfo.inc"
80 #define GET_SUBTARGETINFO_MC_DESC
81 #include "ARMGenSubtargetInfo.inc"
84 std::string ARM_MC::ParseARMTriple(StringRef TT, StringRef CPU) {
87 // Set the boolean corresponding to the current target triple, or the default
88 // if one cannot be determined, to true.
89 unsigned Len = TT.size();
92 // FIXME: Enhance Triple helper class to extract ARM version.
93 bool isThumb = triple.getArch() == Triple::thumb ||
94 triple.getArch() == Triple::thumbeb;
95 if (Len >= 5 && TT.substr(0, 4) == "armv")
97 else if (Len >= 7 && TT.substr(0, 6) == "armebv")
99 else if (Len >= 7 && TT.substr(0, 6) == "thumbv")
101 else if (Len >= 9 && TT.substr(0, 8) == "thumbebv")
104 bool NoCPU = CPU == "generic" || CPU.empty();
105 std::string ARMArchFeature;
107 unsigned SubVer = TT[Idx];
110 // v8a: FeatureDB, FeatureFPARMv8, FeatureNEON, FeatureDSPThumb2,
111 // FeatureMP, FeatureHWDiv, FeatureHWDivARM, FeatureTrustZone,
112 // FeatureT2XtPk, FeatureCrypto, FeatureCRC
113 ARMArchFeature = "+v8,+db,+fp-armv8,+neon,+t2dsp,+mp,+hwdiv,+hwdiv-arm,"
114 "+trustzone,+t2xtpk,+crypto,+crc";
116 // Use CPU to figure out the exact features
117 ARMArchFeature = "+v8";
118 } else if (SubVer == '7') {
119 if (Len >= Idx+2 && TT[Idx+1] == 'm') {
122 // v7m: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureMClass
123 ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+mclass";
125 // Use CPU to figure out the exact features.
126 ARMArchFeature = "+v7";
127 } else if (Len >= Idx+3 && TT[Idx+1] == 'e'&& TT[Idx+2] == 'm') {
129 // v7em: FeatureNoARM, FeatureDB, FeatureHWDiv, FeatureDSPThumb2,
130 // FeatureT2XtPk, FeatureMClass
131 ARMArchFeature = "+v7,+noarm,+db,+hwdiv,+t2dsp,t2xtpk,+mclass";
133 // Use CPU to figure out the exact features.
134 ARMArchFeature = "+v7";
135 } else if (Len >= Idx+2 && TT[Idx+1] == 's') {
137 // v7s: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureHasRAS
139 ARMArchFeature = "+v7,+swift,+neon,+db,+t2dsp,+ras";
141 // Use CPU to figure out the exact features.
142 ARMArchFeature = "+v7";
144 // v7 CPUs have lots of different feature sets. If no CPU is specified,
145 // then assume v7a (e.g. cortex-a8) feature set. Otherwise, return
146 // the "minimum" feature set and use CPU string to figure out the exact
149 // v7a: FeatureNEON, FeatureDB, FeatureDSPThumb2, FeatureT2XtPk
150 ARMArchFeature = "+v7,+neon,+db,+t2dsp,+t2xtpk";
152 // Use CPU to figure out the exact features.
153 ARMArchFeature = "+v7";
155 } else if (SubVer == '6') {
156 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2')
157 ARMArchFeature = "+v6t2";
158 else if (Len >= Idx+2 && TT[Idx+1] == 'm') {
161 // v6m: FeatureNoARM, FeatureMClass
162 ARMArchFeature = "+v6m,+noarm,+mclass";
164 ARMArchFeature = "+v6";
166 ARMArchFeature = "+v6";
167 } else if (SubVer == '5') {
168 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e')
169 ARMArchFeature = "+v5te";
171 ARMArchFeature = "+v5t";
172 } else if (SubVer == '4' && Len >= Idx+2 && TT[Idx+1] == 't')
173 ARMArchFeature = "+v4t";
177 if (ARMArchFeature.empty())
178 ARMArchFeature = "+thumb-mode";
180 ARMArchFeature += ",+thumb-mode";
183 if (triple.isOSNaCl()) {
184 if (ARMArchFeature.empty())
185 ARMArchFeature = "+nacl-trap";
187 ARMArchFeature += ",+nacl-trap";
190 return ARMArchFeature;
193 MCSubtargetInfo *ARM_MC::createARMMCSubtargetInfo(StringRef TT, StringRef CPU,
195 std::string ArchFS = ARM_MC::ParseARMTriple(TT, CPU);
198 ArchFS = ArchFS + "," + FS.str();
203 MCSubtargetInfo *X = new MCSubtargetInfo();
204 InitARMMCSubtargetInfo(X, TT, CPU, ArchFS);
208 static MCInstrInfo *createARMMCInstrInfo() {
209 MCInstrInfo *X = new MCInstrInfo();
210 InitARMMCInstrInfo(X);
214 static MCRegisterInfo *createARMMCRegisterInfo(StringRef Triple) {
215 MCRegisterInfo *X = new MCRegisterInfo();
216 InitARMMCRegisterInfo(X, ARM::LR, 0, 0, ARM::PC);
220 static MCAsmInfo *createARMMCAsmInfo(const MCRegisterInfo &MRI, StringRef TT) {
221 Triple TheTriple(TT);
224 switch (TheTriple.getOS()) {
225 case llvm::Triple::Darwin:
226 case llvm::Triple::IOS:
227 case llvm::Triple::MacOSX:
228 MAI = new ARMMCAsmInfoDarwin(TT);
230 case llvm::Triple::Win32:
231 switch (TheTriple.getEnvironment()) {
232 case llvm::Triple::Itanium:
233 MAI = new ARMCOFFMCAsmInfoGNU();
235 case llvm::Triple::MSVC:
236 MAI = new ARMCOFFMCAsmInfoMicrosoft();
239 llvm_unreachable("invalid environment");
243 if (TheTriple.isOSBinFormatMachO())
244 MAI = new ARMMCAsmInfoDarwin(TT);
246 MAI = new ARMELFMCAsmInfo(TT);
250 unsigned Reg = MRI.getDwarfRegNum(ARM::SP, true);
251 MAI->addInitialFrameState(MCCFIInstruction::createDefCfa(nullptr, Reg, 0));
256 static MCCodeGenInfo *createARMMCCodeGenInfo(StringRef TT, Reloc::Model RM,
258 CodeGenOpt::Level OL) {
259 MCCodeGenInfo *X = new MCCodeGenInfo();
260 if (RM == Reloc::Default) {
261 Triple TheTriple(TT);
262 // Default relocation model on Darwin is PIC, not DynamicNoPIC.
263 RM = TheTriple.isOSDarwin() ? Reloc::PIC_ : Reloc::DynamicNoPIC;
265 X->InitMCCodeGenInfo(RM, CM, OL);
269 // This is duplicated code. Refactor this.
270 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
271 MCContext &Ctx, MCAsmBackend &MAB,
273 MCCodeEmitter *Emitter,
274 const MCSubtargetInfo &STI,
277 Triple TheTriple(TT);
279 switch (TheTriple.getObjectFormat()) {
280 default: llvm_unreachable("unsupported object format");
281 case Triple::MachO: {
282 MCStreamer *S = createMachOStreamer(Ctx, MAB, OS, Emitter, false);
283 new ARMTargetStreamer(*S);
287 assert(TheTriple.isOSWindows() && "non-Windows ARM COFF is not supported");
288 return createARMWinCOFFStreamer(Ctx, MAB, *Emitter, OS);
290 return createARMELFStreamer(Ctx, MAB, OS, Emitter, false, NoExecStack,
291 TheTriple.getArch() == Triple::thumb);
295 static MCInstPrinter *createARMMCInstPrinter(const Target &T,
296 unsigned SyntaxVariant,
297 const MCAsmInfo &MAI,
298 const MCInstrInfo &MII,
299 const MCRegisterInfo &MRI,
300 const MCSubtargetInfo &STI) {
301 if (SyntaxVariant == 0)
302 return new ARMInstPrinter(MAI, MII, MRI, STI);
306 static MCRelocationInfo *createARMMCRelocationInfo(StringRef TT,
308 Triple TheTriple(TT);
309 if (TheTriple.isOSBinFormatMachO())
310 return createARMMachORelocationInfo(Ctx);
311 // Default to the stock relocation info.
312 return llvm::createMCRelocationInfo(TT, Ctx);
317 class ARMMCInstrAnalysis : public MCInstrAnalysis {
319 ARMMCInstrAnalysis(const MCInstrInfo *Info) : MCInstrAnalysis(Info) {}
321 bool isUnconditionalBranch(const MCInst &Inst) const override {
322 // BCCs with the "always" predicate are unconditional branches.
323 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL)
325 return MCInstrAnalysis::isUnconditionalBranch(Inst);
328 bool isConditionalBranch(const MCInst &Inst) const override {
329 // BCCs with the "always" predicate are unconditional branches.
330 if (Inst.getOpcode() == ARM::Bcc && Inst.getOperand(1).getImm()==ARMCC::AL)
332 return MCInstrAnalysis::isConditionalBranch(Inst);
335 bool evaluateBranch(const MCInst &Inst, uint64_t Addr,
336 uint64_t Size, uint64_t &Target) const override {
337 // We only handle PCRel branches for now.
338 if (Info->get(Inst.getOpcode()).OpInfo[0].OperandType!=MCOI::OPERAND_PCREL)
341 int64_t Imm = Inst.getOperand(0).getImm();
342 // FIXME: This is not right for thumb.
343 Target = Addr+Imm+8; // In ARM mode the PC is always off by 8 bytes.
350 static MCInstrAnalysis *createARMMCInstrAnalysis(const MCInstrInfo *Info) {
351 return new ARMMCInstrAnalysis(Info);
354 // Force static initialization.
355 extern "C" void LLVMInitializeARMTargetMC() {
356 // Register the MC asm info.
357 RegisterMCAsmInfoFn X(TheARMLETarget, createARMMCAsmInfo);
358 RegisterMCAsmInfoFn Y(TheARMBETarget, createARMMCAsmInfo);
359 RegisterMCAsmInfoFn A(TheThumbLETarget, createARMMCAsmInfo);
360 RegisterMCAsmInfoFn B(TheThumbBETarget, createARMMCAsmInfo);
362 // Register the MC codegen info.
363 TargetRegistry::RegisterMCCodeGenInfo(TheARMLETarget, createARMMCCodeGenInfo);
364 TargetRegistry::RegisterMCCodeGenInfo(TheARMBETarget, createARMMCCodeGenInfo);
365 TargetRegistry::RegisterMCCodeGenInfo(TheThumbLETarget, createARMMCCodeGenInfo);
366 TargetRegistry::RegisterMCCodeGenInfo(TheThumbBETarget, createARMMCCodeGenInfo);
368 // Register the MC instruction info.
369 TargetRegistry::RegisterMCInstrInfo(TheARMLETarget, createARMMCInstrInfo);
370 TargetRegistry::RegisterMCInstrInfo(TheARMBETarget, createARMMCInstrInfo);
371 TargetRegistry::RegisterMCInstrInfo(TheThumbLETarget, createARMMCInstrInfo);
372 TargetRegistry::RegisterMCInstrInfo(TheThumbBETarget, createARMMCInstrInfo);
374 // Register the MC register info.
375 TargetRegistry::RegisterMCRegInfo(TheARMLETarget, createARMMCRegisterInfo);
376 TargetRegistry::RegisterMCRegInfo(TheARMBETarget, createARMMCRegisterInfo);
377 TargetRegistry::RegisterMCRegInfo(TheThumbLETarget, createARMMCRegisterInfo);
378 TargetRegistry::RegisterMCRegInfo(TheThumbBETarget, createARMMCRegisterInfo);
380 // Register the MC subtarget info.
381 TargetRegistry::RegisterMCSubtargetInfo(TheARMLETarget,
382 ARM_MC::createARMMCSubtargetInfo);
383 TargetRegistry::RegisterMCSubtargetInfo(TheARMBETarget,
384 ARM_MC::createARMMCSubtargetInfo);
385 TargetRegistry::RegisterMCSubtargetInfo(TheThumbLETarget,
386 ARM_MC::createARMMCSubtargetInfo);
387 TargetRegistry::RegisterMCSubtargetInfo(TheThumbBETarget,
388 ARM_MC::createARMMCSubtargetInfo);
390 // Register the MC instruction analyzer.
391 TargetRegistry::RegisterMCInstrAnalysis(TheARMLETarget,
392 createARMMCInstrAnalysis);
393 TargetRegistry::RegisterMCInstrAnalysis(TheARMBETarget,
394 createARMMCInstrAnalysis);
395 TargetRegistry::RegisterMCInstrAnalysis(TheThumbLETarget,
396 createARMMCInstrAnalysis);
397 TargetRegistry::RegisterMCInstrAnalysis(TheThumbBETarget,
398 createARMMCInstrAnalysis);
400 // Register the MC Code Emitter
401 TargetRegistry::RegisterMCCodeEmitter(TheARMLETarget,
402 createARMLEMCCodeEmitter);
403 TargetRegistry::RegisterMCCodeEmitter(TheARMBETarget,
404 createARMBEMCCodeEmitter);
405 TargetRegistry::RegisterMCCodeEmitter(TheThumbLETarget,
406 createARMLEMCCodeEmitter);
407 TargetRegistry::RegisterMCCodeEmitter(TheThumbBETarget,
408 createARMBEMCCodeEmitter);
410 // Register the asm backend.
411 TargetRegistry::RegisterMCAsmBackend(TheARMLETarget, createARMLEAsmBackend);
412 TargetRegistry::RegisterMCAsmBackend(TheARMBETarget, createARMBEAsmBackend);
413 TargetRegistry::RegisterMCAsmBackend(TheThumbLETarget,
414 createThumbLEAsmBackend);
415 TargetRegistry::RegisterMCAsmBackend(TheThumbBETarget,
416 createThumbBEAsmBackend);
418 // Register the object streamer.
419 TargetRegistry::RegisterMCObjectStreamer(TheARMLETarget, createMCStreamer);
420 TargetRegistry::RegisterMCObjectStreamer(TheARMBETarget, createMCStreamer);
421 TargetRegistry::RegisterMCObjectStreamer(TheThumbLETarget, createMCStreamer);
422 TargetRegistry::RegisterMCObjectStreamer(TheThumbBETarget, createMCStreamer);
424 // Register the asm streamer.
425 TargetRegistry::RegisterAsmStreamer(TheARMLETarget, createMCAsmStreamer);
426 TargetRegistry::RegisterAsmStreamer(TheARMBETarget, createMCAsmStreamer);
427 TargetRegistry::RegisterAsmStreamer(TheThumbLETarget, createMCAsmStreamer);
428 TargetRegistry::RegisterAsmStreamer(TheThumbBETarget, createMCAsmStreamer);
430 // Register the null streamer.
431 TargetRegistry::RegisterNullStreamer(TheARMLETarget, createARMNullStreamer);
432 TargetRegistry::RegisterNullStreamer(TheARMBETarget, createARMNullStreamer);
433 TargetRegistry::RegisterNullStreamer(TheThumbLETarget, createARMNullStreamer);
434 TargetRegistry::RegisterNullStreamer(TheThumbBETarget, createARMNullStreamer);
436 // Register the MCInstPrinter.
437 TargetRegistry::RegisterMCInstPrinter(TheARMLETarget, createARMMCInstPrinter);
438 TargetRegistry::RegisterMCInstPrinter(TheARMBETarget, createARMMCInstPrinter);
439 TargetRegistry::RegisterMCInstPrinter(TheThumbLETarget,
440 createARMMCInstPrinter);
441 TargetRegistry::RegisterMCInstPrinter(TheThumbBETarget,
442 createARMMCInstPrinter);
444 // Register the MC relocation info.
445 TargetRegistry::RegisterMCRelocationInfo(TheARMLETarget,
446 createARMMCRelocationInfo);
447 TargetRegistry::RegisterMCRelocationInfo(TheARMBETarget,
448 createARMMCRelocationInfo);
449 TargetRegistry::RegisterMCRelocationInfo(TheThumbLETarget,
450 createARMMCRelocationInfo);
451 TargetRegistry::RegisterMCRelocationInfo(TheThumbBETarget,
452 createARMMCRelocationInfo);