1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMBuildAttrs.h"
18 #include "ARMTargetMachine.h"
19 #include "ARMAddressingModes.h"
20 #include "ARMConstantPoolValue.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "llvm/Constants.h"
23 #include "llvm/Module.h"
24 #include "llvm/CodeGen/AsmPrinter.h"
25 #include "llvm/CodeGen/DwarfWriter.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/CodeGen/MachineFunctionPass.h"
28 #include "llvm/CodeGen/MachineJumpTableInfo.h"
29 #include "llvm/Target/TargetAsmInfo.h"
30 #include "llvm/Target/TargetData.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Target/TargetOptions.h"
33 #include "llvm/ADT/Statistic.h"
34 #include "llvm/ADT/StringExtras.h"
35 #include "llvm/ADT/StringSet.h"
36 #include "llvm/Support/Compiler.h"
37 #include "llvm/Support/Mangler.h"
38 #include "llvm/Support/MathExtras.h"
39 #include "llvm/Support/raw_ostream.h"
43 STATISTIC(EmittedInsts, "Number of machine instrs printed");
46 class VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
49 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
50 /// make the right decision when printing asm code for different targets.
51 const ARMSubtarget *Subtarget;
53 /// AFI - Keep a pointer to ARMFunctionInfo for the current
57 /// MCP - Keep a pointer to constantpool entries of the current
59 const MachineConstantPool *MCP;
61 /// We name each basic block in a Function with a unique number, so
62 /// that we can consistently refer to them later. This is cleared
63 /// at the beginning of each call to runOnMachineFunction().
65 typedef std::map<const Value *, unsigned> ValueMapTy;
66 ValueMapTy NumberForBB;
68 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
69 /// non-lazy-pointers for indirect access.
70 StringSet<> GVNonLazyPtrs;
72 /// HiddenGVNonLazyPtrs - Keeps the set of GlobalValues with hidden
73 /// visibility that require non-lazy-pointers for indirect access.
74 StringSet<> HiddenGVNonLazyPtrs;
76 /// FnStubs - Keeps the set of external function GlobalAddresses that the
77 /// asm printer should generate stubs for.
80 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
83 explicit ARMAsmPrinter(raw_ostream &O, TargetMachine &TM,
84 const TargetAsmInfo *T, CodeGenOpt::Level OL,
86 : AsmPrinter(O, TM, T, OL, V), DW(0), AFI(NULL), MCP(NULL),
88 Subtarget = &TM.getSubtarget<ARMSubtarget>();
91 virtual const char *getPassName() const {
92 return "ARM Assembly Printer";
95 void printOperand(const MachineInstr *MI, int opNum,
96 const char *Modifier = 0);
97 void printSOImmOperand(const MachineInstr *MI, int opNum);
98 void printSOImm2PartOperand(const MachineInstr *MI, int opNum);
99 void printSOOperand(const MachineInstr *MI, int OpNum);
100 void printSORegOperand(const MachineInstr *MI, int opNum);
101 void printT2SOImmOperand(const MachineInstr *MI, int opNum);
102 void printAddrMode2Operand(const MachineInstr *MI, int OpNo);
103 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo);
104 void printAddrMode3Operand(const MachineInstr *MI, int OpNo);
105 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNo);
106 void printAddrMode4Operand(const MachineInstr *MI, int OpNo,
107 const char *Modifier = 0);
108 void printAddrMode5Operand(const MachineInstr *MI, int OpNo,
109 const char *Modifier = 0);
110 void printAddrModePCOperand(const MachineInstr *MI, int OpNo,
111 const char *Modifier = 0);
112 void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNo);
113 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo);
114 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo,
116 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo);
117 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
118 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
119 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
120 void printPredicateOperand(const MachineInstr *MI, int opNum);
121 void printSBitModifierOperand(const MachineInstr *MI, int opNum);
122 void printPCLabel(const MachineInstr *MI, int opNum);
123 void printRegisterList(const MachineInstr *MI, int opNum);
124 void printCPInstOperand(const MachineInstr *MI, int opNum,
125 const char *Modifier);
126 void printJTBlockOperand(const MachineInstr *MI, int opNum);
128 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
129 unsigned AsmVariant, const char *ExtraCode);
130 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
132 const char *ExtraCode);
134 void printModuleLevelGV(const GlobalVariable* GVar);
135 bool printInstruction(const MachineInstr *MI); // autogenerated.
136 void printMachineInstruction(const MachineInstr *MI);
137 bool runOnMachineFunction(MachineFunction &F);
138 bool doInitialization(Module &M);
139 bool doFinalization(Module &M);
141 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
143 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
144 printDataDirective(MCPV->getType());
146 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
147 GlobalValue *GV = ACPV->getGV();
148 std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
150 Name += ACPV->getSymbol();
151 if (ACPV->isNonLazyPointer()) {
152 if (GV->hasHiddenVisibility())
153 HiddenGVNonLazyPtrs.insert(Name);
155 GVNonLazyPtrs.insert(Name);
156 printSuffixedName(Name, "$non_lazy_ptr");
157 } else if (ACPV->isStub()) {
158 FnStubs.insert(Name);
159 printSuffixedName(Name, "$stub");
162 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
163 if (ACPV->getPCAdjustment() != 0) {
164 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
165 << utostr(ACPV->getLabelId())
166 << "+" << (unsigned)ACPV->getPCAdjustment();
167 if (ACPV->mustAddCurrentAddress())
173 // If the constant pool value is a extern weak symbol, remember to emit
174 // the weak reference.
175 if (GV && GV->hasExternalWeakLinkage())
176 ExtWeakSymbols.insert(GV);
179 void getAnalysisUsage(AnalysisUsage &AU) const {
180 AsmPrinter::getAnalysisUsage(AU);
181 AU.setPreservesAll();
182 AU.addRequired<MachineModuleInfo>();
183 AU.addRequired<DwarfWriter>();
186 } // end of anonymous namespace
188 #include "ARMGenAsmWriter.inc"
190 /// runOnMachineFunction - This uses the printInstruction()
191 /// method to print assembly for each instruction.
193 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
196 AFI = MF.getInfo<ARMFunctionInfo>();
197 MCP = MF.getConstantPool();
199 SetupMachineFunction(MF);
202 // NOTE: we don't print out constant pools here, they are handled as
206 // Print out labels for the function.
207 const Function *F = MF.getFunction();
208 switch (F->getLinkage()) {
209 default: assert(0 && "Unknown linkage type!");
210 case Function::PrivateLinkage:
211 case Function::InternalLinkage:
212 SwitchToTextSection("\t.text", F);
214 case Function::ExternalLinkage:
215 SwitchToTextSection("\t.text", F);
216 O << "\t.globl\t" << CurrentFnName << "\n";
218 case Function::WeakAnyLinkage:
219 case Function::WeakODRLinkage:
220 case Function::LinkOnceAnyLinkage:
221 case Function::LinkOnceODRLinkage:
222 if (Subtarget->isTargetDarwin()) {
224 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
225 O << "\t.globl\t" << CurrentFnName << "\n";
226 O << "\t.weak_definition\t" << CurrentFnName << "\n";
228 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
233 printVisibility(CurrentFnName, F->getVisibility());
235 if (AFI->isThumbFunction()) {
236 EmitAlignment(1, F, AFI->getAlign());
237 O << "\t.code\t16\n";
238 O << "\t.thumb_func";
239 if (Subtarget->isTargetDarwin())
240 O << "\t" << CurrentFnName;
246 O << CurrentFnName << ":\n";
247 // Emit pre-function debug information.
248 DW->BeginFunction(&MF);
250 if (Subtarget->isTargetDarwin()) {
251 // If the function is empty, then we need to emit *something*. Otherwise,
252 // the function's label might be associated with something that it wasn't
253 // meant to be associated with. We emit a noop in this situation.
254 MachineFunction::iterator I = MF.begin();
256 if (++I == MF.end() && MF.front().empty())
260 // Print out code for the function.
261 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
263 // Print a label for the basic block.
264 if (I != MF.begin()) {
265 printBasicBlockLabel(I, true, true, VerboseAsm);
268 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
270 // Print the assembly for the instruction.
271 printMachineInstruction(II);
275 if (TAI->hasDotTypeDotSizeDirective())
276 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
278 // Emit post-function debug information.
279 DW->EndFunction(&MF);
286 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
287 const char *Modifier) {
288 const MachineOperand &MO = MI->getOperand(opNum);
289 switch (MO.getType()) {
290 case MachineOperand::MO_Register: {
291 unsigned Reg = MO.getReg();
292 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
293 if (Modifier && strcmp(Modifier, "dregpair") == 0) {
294 unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0
295 unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1
297 << TRI->getAsmName(DRegLo) << "-" << TRI->getAsmName(DRegHi)
300 O << TRI->getAsmName(Reg);
303 assert(0 && "not implemented");
306 case MachineOperand::MO_Immediate: {
307 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
313 case MachineOperand::MO_MachineBasicBlock:
314 printBasicBlockLabel(MO.getMBB());
316 case MachineOperand::MO_GlobalAddress: {
317 bool isCallOp = Modifier && !strcmp(Modifier, "call");
318 GlobalValue *GV = MO.getGlobal();
319 std::string Name = Mang->getValueName(GV);
320 bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
321 GV->hasLinkOnceLinkage());
322 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
323 TM.getRelocationModel() != Reloc::Static) {
324 printSuffixedName(Name, "$stub");
325 FnStubs.insert(Name);
329 printOffset(MO.getOffset());
331 if (isCallOp && Subtarget->isTargetELF() &&
332 TM.getRelocationModel() == Reloc::PIC_)
334 if (GV->hasExternalWeakLinkage())
335 ExtWeakSymbols.insert(GV);
338 case MachineOperand::MO_ExternalSymbol: {
339 bool isCallOp = Modifier && !strcmp(Modifier, "call");
340 std::string Name(TAI->getGlobalPrefix());
341 Name += MO.getSymbolName();
342 if (isCallOp && Subtarget->isTargetDarwin() &&
343 TM.getRelocationModel() != Reloc::Static) {
344 printSuffixedName(Name, "$stub");
345 FnStubs.insert(Name);
348 if (isCallOp && Subtarget->isTargetELF() &&
349 TM.getRelocationModel() == Reloc::PIC_)
353 case MachineOperand::MO_ConstantPoolIndex:
354 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
355 << '_' << MO.getIndex();
357 case MachineOperand::MO_JumpTableIndex:
358 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
359 << '_' << MO.getIndex();
362 O << "<unknown operand type>"; abort (); break;
366 static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
367 const TargetAsmInfo *TAI) {
368 assert(V < (1 << 12) && "Not a valid so_imm value!");
369 unsigned Imm = ARM_AM::getSOImmValImm(V);
370 unsigned Rot = ARM_AM::getSOImmValRot(V);
372 // Print low-level immediate formation info, per
373 // A5.1.3: "Data-processing operands - Immediate".
375 O << "#" << Imm << ", " << Rot;
376 // Pretty printed version.
378 O << ' ' << TAI->getCommentString()
379 << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
385 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
386 /// immediate in bits 0-7.
387 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
388 const MachineOperand &MO = MI->getOperand(OpNum);
389 assert(MO.isImm() && "Not a valid so_imm value!");
390 printSOImm(O, MO.getImm(), VerboseAsm, TAI);
393 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
394 /// followed by an 'orr' to materialize.
395 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
396 const MachineOperand &MO = MI->getOperand(OpNum);
397 assert(MO.isImm() && "Not a valid so_imm value!");
398 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
399 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
400 printSOImm(O, ARM_AM::getSOImmVal(V1), VerboseAsm, TAI);
402 printPredicateOperand(MI, 2);
408 printSOImm(O, ARM_AM::getSOImmVal(V2), VerboseAsm, TAI);
411 // Constant shifts so_reg is a 3-operand unit corresponding to register forms of
412 // the A5.1 "Addressing Mode 1 - Data-processing operands" forms. This
415 // REG IMM, SH_OPC - e.g. R5, LSL #3
416 void ARMAsmPrinter::printSOOperand(const MachineInstr *MI, int OpNum) {
417 const MachineOperand &MO1 = MI->getOperand(OpNum);
418 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
420 unsigned Reg = MO1.getReg();
421 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
422 O << TM.getRegisterInfo()->getAsmName(Reg);
424 // Print the shift opc.
426 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
429 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
430 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
433 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
434 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
436 // REG REG 0,SH_OPC - e.g. R5, ROR R3
437 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
438 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
439 const MachineOperand &MO1 = MI->getOperand(Op);
440 const MachineOperand &MO2 = MI->getOperand(Op+1);
441 const MachineOperand &MO3 = MI->getOperand(Op+2);
443 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
444 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
446 // Print the shift opc.
448 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
452 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
453 O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
454 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
456 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
460 static void printT2SOImm(raw_ostream &O, int64_t V) {
461 unsigned Imm = ARM_AM::getT2SOImmValDecode(V);
463 // Always print the immediate directly, as the "rotate" form
464 // is deprecated in some contexts.
468 /// printT2SOImmOperand - T2SOImm is:
469 /// 1. a 4-bit splat control value and 8 bit immediate value
470 /// 2. a 5-bit rotate amount and a non-zero 8-bit immediate value
471 /// represented by a normalizedin 7-bit value (msb is always 1)
472 void ARMAsmPrinter::printT2SOImmOperand(const MachineInstr *MI, int OpNum) {
473 const MachineOperand &MO = MI->getOperand(OpNum);
474 assert(MO.isImm() && "Not a valid so_imm value!");
475 printT2SOImm(O, MO.getImm());
478 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
479 const MachineOperand &MO1 = MI->getOperand(Op);
480 const MachineOperand &MO2 = MI->getOperand(Op+1);
481 const MachineOperand &MO3 = MI->getOperand(Op+2);
483 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
484 printOperand(MI, Op);
488 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
491 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
493 << (char)ARM_AM::getAM2Op(MO3.getImm())
494 << ARM_AM::getAM2Offset(MO3.getImm());
500 << (char)ARM_AM::getAM2Op(MO3.getImm())
501 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
503 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
505 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
510 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
511 const MachineOperand &MO1 = MI->getOperand(Op);
512 const MachineOperand &MO2 = MI->getOperand(Op+1);
515 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
516 assert(ImmOffs && "Malformed indexed load / store!");
518 << (char)ARM_AM::getAM2Op(MO2.getImm())
523 O << (char)ARM_AM::getAM2Op(MO2.getImm())
524 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
526 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
528 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
532 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
533 const MachineOperand &MO1 = MI->getOperand(Op);
534 const MachineOperand &MO2 = MI->getOperand(Op+1);
535 const MachineOperand &MO3 = MI->getOperand(Op+2);
537 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
538 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
542 << (char)ARM_AM::getAM3Op(MO3.getImm())
543 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName
548 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
550 << (char)ARM_AM::getAM3Op(MO3.getImm())
555 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
556 const MachineOperand &MO1 = MI->getOperand(Op);
557 const MachineOperand &MO2 = MI->getOperand(Op+1);
560 O << (char)ARM_AM::getAM3Op(MO2.getImm())
561 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
565 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
566 assert(ImmOffs && "Malformed indexed load / store!");
568 << (char)ARM_AM::getAM3Op(MO2.getImm())
572 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
573 const char *Modifier) {
574 const MachineOperand &MO1 = MI->getOperand(Op);
575 const MachineOperand &MO2 = MI->getOperand(Op+1);
576 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
577 if (Modifier && strcmp(Modifier, "submode") == 0) {
578 if (MO1.getReg() == ARM::SP) {
579 bool isLDM = (MI->getOpcode() == ARM::LDM ||
580 MI->getOpcode() == ARM::LDM_RET);
581 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
583 O << ARM_AM::getAMSubModeStr(Mode);
585 printOperand(MI, Op);
586 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
591 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
592 const char *Modifier) {
593 const MachineOperand &MO1 = MI->getOperand(Op);
594 const MachineOperand &MO2 = MI->getOperand(Op+1);
596 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
597 printOperand(MI, Op);
601 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
603 if (Modifier && strcmp(Modifier, "submode") == 0) {
604 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
605 if (MO1.getReg() == ARM::SP) {
606 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
607 MI->getOpcode() == ARM::FLDMS);
608 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
610 O << ARM_AM::getAMSubModeStr(Mode);
612 } else if (Modifier && strcmp(Modifier, "base") == 0) {
613 // Used for FSTM{D|S} and LSTM{D|S} operations.
614 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
615 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
620 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
622 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
624 << (char)ARM_AM::getAM5Op(MO2.getImm())
630 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
631 const char *Modifier) {
632 if (Modifier && strcmp(Modifier, "label") == 0) {
633 printPCLabel(MI, Op+1);
637 const MachineOperand &MO1 = MI->getOperand(Op);
638 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
639 O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]";
643 ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) {
644 const MachineOperand &MO = MI->getOperand(Op);
645 uint32_t v = ~MO.getImm();
646 int32_t lsb = ffs (v) - 1;
647 int32_t width = ffs (v) - lsb;
648 assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
649 O << "#" << lsb << ", #" << width;
653 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
654 const MachineOperand &MO1 = MI->getOperand(Op);
655 const MachineOperand &MO2 = MI->getOperand(Op+1);
656 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
657 O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]";
661 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
663 const MachineOperand &MO1 = MI->getOperand(Op);
664 const MachineOperand &MO2 = MI->getOperand(Op+1);
665 const MachineOperand &MO3 = MI->getOperand(Op+2);
667 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
668 printOperand(MI, Op);
672 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
674 O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName;
675 else if (unsigned ImmOffs = MO2.getImm()) {
676 O << ", #" << ImmOffs;
684 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
685 printThumbAddrModeRI5Operand(MI, Op, 1);
688 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
689 printThumbAddrModeRI5Operand(MI, Op, 2);
692 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
693 printThumbAddrModeRI5Operand(MI, Op, 4);
696 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
697 const MachineOperand &MO1 = MI->getOperand(Op);
698 const MachineOperand &MO2 = MI->getOperand(Op+1);
699 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
700 if (unsigned ImmOffs = MO2.getImm())
701 O << ", #" << ImmOffs << " * 4";
705 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) {
706 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(opNum).getImm();
708 O << ARMCondCodeToString(CC);
711 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int opNum){
712 unsigned Reg = MI->getOperand(opNum).getReg();
714 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
719 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) {
720 int Id = (int)MI->getOperand(opNum).getImm();
721 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
724 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int opNum) {
726 for (unsigned i = opNum, e = MI->getNumOperands(); i != e; ++i) {
728 if (i != e-1) O << ", ";
733 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNo,
734 const char *Modifier) {
735 assert(Modifier && "This operand only works with a modifier!");
736 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
738 if (!strcmp(Modifier, "label")) {
739 unsigned ID = MI->getOperand(OpNo).getImm();
740 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
741 << '_' << ID << ":\n";
743 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
744 unsigned CPI = MI->getOperand(OpNo).getIndex();
746 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
748 if (MCPE.isMachineConstantPoolEntry()) {
749 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
751 EmitGlobalConstant(MCPE.Val.ConstVal);
752 // remember to emit the weak reference
753 if (const GlobalValue *GV = dyn_cast<GlobalValue>(MCPE.Val.ConstVal))
754 if (GV->hasExternalWeakLinkage())
755 ExtWeakSymbols.insert(GV);
760 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) {
761 const MachineOperand &MO1 = MI->getOperand(OpNo);
762 const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id
763 unsigned JTI = MO1.getIndex();
764 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
765 << '_' << JTI << '_' << MO2.getImm() << ":\n";
767 const char *JTEntryDirective = TAI->getJumpTableDirective();
768 if (!JTEntryDirective)
769 JTEntryDirective = TAI->getData32bitsDirective();
771 const MachineFunction *MF = MI->getParent()->getParent();
772 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
773 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
774 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
775 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
776 std::set<MachineBasicBlock*> JTSets;
777 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
778 MachineBasicBlock *MBB = JTBBs[i];
779 if (UseSet && JTSets.insert(MBB).second)
780 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
782 O << JTEntryDirective << ' ';
784 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
785 << '_' << JTI << '_' << MO2.getImm()
786 << "_set_" << MBB->getNumber();
787 else if (TM.getRelocationModel() == Reloc::PIC_) {
788 printBasicBlockLabel(MBB, false, false, false);
789 // If the arch uses custom Jump Table directives, don't calc relative to JT
790 if (!TAI->getJumpTableDirective())
791 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
792 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
794 printBasicBlockLabel(MBB, false, false, false);
801 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
802 unsigned AsmVariant, const char *ExtraCode){
803 // Does this asm operand have a single letter operand modifier?
804 if (ExtraCode && ExtraCode[0]) {
805 if (ExtraCode[1] != 0) return true; // Unknown modifier.
807 switch (ExtraCode[0]) {
808 default: return true; // Unknown modifier.
809 case 'a': // Don't print "#" before a global var name or constant.
810 case 'c': // Don't print "$" before a global var name or constant.
811 printOperand(MI, OpNo, "no_hash");
813 case 'P': // Print a VFP double precision register.
814 printOperand(MI, OpNo);
817 if (TM.getTargetData()->isLittleEndian())
821 if (TM.getTargetData()->isBigEndian())
824 case 'H': // Write second word of DI / DF reference.
825 // Verify that this operand has two consecutive registers.
826 if (!MI->getOperand(OpNo).isReg() ||
827 OpNo+1 == MI->getNumOperands() ||
828 !MI->getOperand(OpNo+1).isReg())
830 ++OpNo; // Return the high-part.
834 printOperand(MI, OpNo);
838 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
839 unsigned OpNo, unsigned AsmVariant,
840 const char *ExtraCode) {
841 if (ExtraCode && ExtraCode[0])
842 return true; // Unknown modifier.
843 printAddrMode2Operand(MI, OpNo);
847 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
850 int Opc = MI->getOpcode();
852 case ARM::CONSTPOOL_ENTRY:
853 if (!InCPMode && AFI->isThumbFunction()) {
859 if (InCPMode && AFI->isThumbFunction())
863 // Call the autogenerated instruction printer routines.
864 printInstruction(MI);
867 bool ARMAsmPrinter::doInitialization(Module &M) {
869 bool Result = AsmPrinter::doInitialization(M);
870 DW = getAnalysisIfAvailable<DwarfWriter>();
872 // Thumb-2 instructions are supported only in unified assembler syntax mode.
873 if (Subtarget->hasThumb2())
874 O << "\t.syntax unified\n";
876 // Emit ARM Build Attributes
877 if (Subtarget->isTargetELF()) {
879 std::string CPUString = Subtarget->getCPUString();
880 if (CPUString != "generic")
881 O << "\t.cpu " << CPUString << '\n';
883 // FIXME: Emit FPU type
884 if (Subtarget->hasVFP2())
885 O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ", 2\n";
887 // Signal various FP modes.
889 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal << ", 1\n"
890 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions << ", 1\n";
892 if (FiniteOnlyFPMath())
893 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
895 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
897 // 8-bytes alignment stuff.
898 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n"
899 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
901 // FIXME: Should we signal R9 usage?
907 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
908 /// Don't print things like \\n or \\0.
909 static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
910 for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
916 void ARMAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
917 const TargetData *TD = TM.getTargetData();
919 if (!GVar->hasInitializer()) // External global require no code
922 // Check to see if this is a special global used by LLVM, if so, emit it.
924 if (EmitSpecialLLVMGlobal(GVar)) {
925 if (Subtarget->isTargetDarwin() &&
926 TM.getRelocationModel() == Reloc::Static) {
927 if (GVar->getName() == "llvm.global_ctors")
928 O << ".reference .constructors_used\n";
929 else if (GVar->getName() == "llvm.global_dtors")
930 O << ".reference .destructors_used\n";
935 std::string name = Mang->getValueName(GVar);
936 Constant *C = GVar->getInitializer();
937 const Type *Type = C->getType();
938 unsigned Size = TD->getTypeAllocSize(Type);
939 unsigned Align = TD->getPreferredAlignmentLog(GVar);
940 bool isDarwin = Subtarget->isTargetDarwin();
942 printVisibility(name, GVar->getVisibility());
944 if (Subtarget->isTargetELF())
945 O << "\t.type " << name << ",%object\n";
947 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal() &&
949 TAI->SectionKindForGlobal(GVar) == SectionKind::RODataMergeStr)) {
950 // FIXME: This seems to be pretty darwin-specific
952 if (GVar->hasExternalLinkage()) {
953 SwitchToSection(TAI->SectionForGlobal(GVar));
954 if (const char *Directive = TAI->getZeroFillDirective()) {
955 O << "\t.globl\t" << name << "\n";
956 O << Directive << "__DATA, __common, " << name << ", "
957 << Size << ", " << Align << "\n";
962 if (GVar->hasLocalLinkage() || GVar->isWeakForLinker()) {
963 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
966 if (GVar->hasLocalLinkage()) {
967 O << TAI->getLCOMMDirective() << name << "," << Size
969 } else if (GVar->hasCommonLinkage()) {
970 O << TAI->getCOMMDirective() << name << "," << Size
973 SwitchToSection(TAI->SectionForGlobal(GVar));
974 O << "\t.globl " << name << '\n'
975 << TAI->getWeakDefDirective() << name << '\n';
976 EmitAlignment(Align, GVar);
979 O << "\t\t\t\t" << TAI->getCommentString() << ' ';
980 PrintUnmangledNameSafely(GVar, O);
983 EmitGlobalConstant(C);
986 } else if (TAI->getLCOMMDirective() != NULL) {
987 if (GVar->hasLocalLinkage()) {
988 O << TAI->getLCOMMDirective() << name << "," << Size;
990 O << TAI->getCOMMDirective() << name << "," << Size;
991 if (TAI->getCOMMDirectiveTakesAlignment())
992 O << ',' << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
995 SwitchToSection(TAI->SectionForGlobal(GVar));
996 if (GVar->hasLocalLinkage())
997 O << "\t.local\t" << name << "\n";
998 O << TAI->getCOMMDirective() << name << "," << Size;
999 if (TAI->getCOMMDirectiveTakesAlignment())
1000 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1003 O << "\t\t" << TAI->getCommentString() << " ";
1004 PrintUnmangledNameSafely(GVar, O);
1011 SwitchToSection(TAI->SectionForGlobal(GVar));
1012 switch (GVar->getLinkage()) {
1013 case GlobalValue::CommonLinkage:
1014 case GlobalValue::LinkOnceAnyLinkage:
1015 case GlobalValue::LinkOnceODRLinkage:
1016 case GlobalValue::WeakAnyLinkage:
1017 case GlobalValue::WeakODRLinkage:
1019 O << "\t.globl " << name << "\n"
1020 << "\t.weak_definition " << name << "\n";
1022 O << "\t.weak " << name << "\n";
1025 case GlobalValue::AppendingLinkage:
1026 // FIXME: appending linkage variables should go into a section of
1027 // their name or something. For now, just emit them as external.
1028 case GlobalValue::ExternalLinkage:
1029 O << "\t.globl " << name << "\n";
1031 case GlobalValue::PrivateLinkage:
1032 case GlobalValue::InternalLinkage:
1035 assert(0 && "Unknown linkage type!");
1039 EmitAlignment(Align, GVar);
1042 O << "\t\t\t\t" << TAI->getCommentString() << " ";
1043 PrintUnmangledNameSafely(GVar, O);
1046 if (TAI->hasDotTypeDotSizeDirective())
1047 O << "\t.size " << name << ", " << Size << "\n";
1049 // If the initializer is a extern weak symbol, remember to emit the weak
1051 if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
1052 if (GV->hasExternalWeakLinkage())
1053 ExtWeakSymbols.insert(GV);
1055 EmitGlobalConstant(C);
1060 bool ARMAsmPrinter::doFinalization(Module &M) {
1061 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
1063 printModuleLevelGV(I);
1065 if (Subtarget->isTargetDarwin()) {
1066 SwitchToDataSection("");
1068 // Output stubs for dynamically-linked functions
1069 for (StringSet<>::iterator i = FnStubs.begin(), e = FnStubs.end();
1071 if (TM.getRelocationModel() == Reloc::PIC_)
1072 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
1075 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
1079 O << "\t.code\t32\n";
1081 const char *p = i->getKeyData();
1082 printSuffixedName(p, "$stub");
1084 O << "\t.indirect_symbol " << p << "\n";
1086 printSuffixedName(p, "$slp");
1088 if (TM.getRelocationModel() == Reloc::PIC_) {
1089 printSuffixedName(p, "$scv");
1091 O << "\tadd ip, pc, ip\n";
1093 O << "\tldr pc, [ip, #0]\n";
1094 printSuffixedName(p, "$slp");
1097 printSuffixedName(p, "$lazy_ptr");
1098 if (TM.getRelocationModel() == Reloc::PIC_) {
1100 printSuffixedName(p, "$scv");
1104 SwitchToDataSection(".lazy_symbol_pointer", 0);
1105 printSuffixedName(p, "$lazy_ptr");
1107 O << "\t.indirect_symbol " << p << "\n";
1108 O << "\t.long\tdyld_stub_binding_helper\n";
1112 // Output non-lazy-pointers for external and common global variables.
1113 if (!GVNonLazyPtrs.empty()) {
1114 SwitchToDataSection("\t.non_lazy_symbol_pointer", 0);
1115 for (StringSet<>::iterator i = GVNonLazyPtrs.begin(),
1116 e = GVNonLazyPtrs.end(); i != e; ++i) {
1117 const char *p = i->getKeyData();
1118 printSuffixedName(p, "$non_lazy_ptr");
1120 O << "\t.indirect_symbol " << p << "\n";
1121 O << "\t.long\t0\n";
1125 if (!HiddenGVNonLazyPtrs.empty()) {
1126 SwitchToSection(TAI->getDataSection());
1127 for (StringSet<>::iterator i = HiddenGVNonLazyPtrs.begin(),
1128 e = HiddenGVNonLazyPtrs.end(); i != e; ++i) {
1129 const char *p = i->getKeyData();
1131 printSuffixedName(p, "$non_lazy_ptr");
1133 O << "\t.long " << p << "\n";
1138 // Emit initial debug information.
1141 // Funny Darwin hack: This flag tells the linker that no global symbols
1142 // contain code that falls through to other global symbols (e.g. the obvious
1143 // implementation of multiple entry points). If this doesn't occur, the
1144 // linker can safely perform dead code stripping. Since LLVM never
1145 // generates code that does this, it is always safe to set.
1146 O << "\t.subsections_via_symbols\n";
1148 // Emit final debug information for ELF.
1152 return AsmPrinter::doFinalization(M);
1155 /// createARMCodePrinterPass - Returns a pass that prints the ARM
1156 /// assembly code for a MachineFunction to the given output stream,
1157 /// using the given target machine description. This should work
1158 /// regardless of whether the function is in SSA form.
1160 FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
1161 ARMTargetMachine &tm,
1162 CodeGenOpt::Level OptLevel,
1164 return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
1168 static struct Register {
1170 ARMTargetMachine::registerAsmPrinter(createARMCodePrinterPass);
1175 // Force static initialization.
1176 extern "C" void LLVMInitializeARMAsmPrinter() { }