1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMBuildAttrs.h"
18 #include "ARMTargetMachine.h"
19 #include "ARMAddressingModes.h"
20 #include "ARMConstantPoolValue.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "llvm/Constants.h"
23 #include "llvm/Module.h"
24 #include "llvm/CodeGen/AsmPrinter.h"
25 #include "llvm/CodeGen/DwarfWriter.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/CodeGen/MachineFunctionPass.h"
28 #include "llvm/CodeGen/MachineJumpTableInfo.h"
29 #include "llvm/Target/TargetAsmInfo.h"
30 #include "llvm/Target/TargetData.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Target/TargetOptions.h"
33 #include "llvm/ADT/Statistic.h"
34 #include "llvm/ADT/StringExtras.h"
35 #include "llvm/ADT/StringSet.h"
36 #include "llvm/Support/Compiler.h"
37 #include "llvm/Support/Mangler.h"
38 #include "llvm/Support/MathExtras.h"
39 #include "llvm/Support/raw_ostream.h"
43 STATISTIC(EmittedInsts, "Number of machine instrs printed");
46 class VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
49 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
50 /// make the right decision when printing asm code for different targets.
51 const ARMSubtarget *Subtarget;
53 /// AFI - Keep a pointer to ARMFunctionInfo for the current
57 /// MCP - Keep a pointer to constantpool entries of the current
59 const MachineConstantPool *MCP;
61 /// We name each basic block in a Function with a unique number, so
62 /// that we can consistently refer to them later. This is cleared
63 /// at the beginning of each call to runOnMachineFunction().
65 typedef std::map<const Value *, unsigned> ValueMapTy;
66 ValueMapTy NumberForBB;
68 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
69 /// non-lazy-pointers for indirect access.
70 StringSet<> GVNonLazyPtrs;
72 /// HiddenGVNonLazyPtrs - Keeps the set of GlobalValues with hidden
73 /// visibility that require non-lazy-pointers for indirect access.
74 StringSet<> HiddenGVNonLazyPtrs;
76 /// FnStubs - Keeps the set of external function GlobalAddresses that the
77 /// asm printer should generate stubs for.
80 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
83 explicit ARMAsmPrinter(raw_ostream &O, TargetMachine &TM,
84 const TargetAsmInfo *T, CodeGenOpt::Level OL,
86 : AsmPrinter(O, TM, T, OL, V), DW(0), AFI(NULL), MCP(NULL),
88 Subtarget = &TM.getSubtarget<ARMSubtarget>();
91 virtual const char *getPassName() const {
92 return "ARM Assembly Printer";
95 void printOperand(const MachineInstr *MI, int opNum,
96 const char *Modifier = 0);
97 void printSOImmOperand(const MachineInstr *MI, int opNum);
98 void printSOImm2PartOperand(const MachineInstr *MI, int opNum);
99 void printSOOperand(const MachineInstr *MI, int OpNum);
100 void printSORegOperand(const MachineInstr *MI, int opNum);
101 void printT2SOImmOperand(const MachineInstr *MI, int opNum);
102 void printAddrMode2Operand(const MachineInstr *MI, int OpNo);
103 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo);
104 void printAddrMode3Operand(const MachineInstr *MI, int OpNo);
105 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNo);
106 void printAddrMode4Operand(const MachineInstr *MI, int OpNo,
107 const char *Modifier = 0);
108 void printAddrMode5Operand(const MachineInstr *MI, int OpNo,
109 const char *Modifier = 0);
110 void printAddrModePCOperand(const MachineInstr *MI, int OpNo,
111 const char *Modifier = 0);
112 void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNo);
113 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo);
114 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo,
116 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo);
117 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
118 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
119 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
120 void printPredicateOperand(const MachineInstr *MI, int opNum);
121 void printSBitModifierOperand(const MachineInstr *MI, int opNum);
122 void printPCLabel(const MachineInstr *MI, int opNum);
123 void printRegisterList(const MachineInstr *MI, int opNum);
124 void printCPInstOperand(const MachineInstr *MI, int opNum,
125 const char *Modifier);
126 void printJTBlockOperand(const MachineInstr *MI, int opNum);
128 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
129 unsigned AsmVariant, const char *ExtraCode);
130 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
132 const char *ExtraCode);
134 void printModuleLevelGV(const GlobalVariable* GVar);
135 bool printInstruction(const MachineInstr *MI); // autogenerated.
136 void printMachineInstruction(const MachineInstr *MI);
137 bool runOnMachineFunction(MachineFunction &F);
138 bool doInitialization(Module &M);
139 bool doFinalization(Module &M);
141 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
143 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
144 printDataDirective(MCPV->getType());
146 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
147 GlobalValue *GV = ACPV->getGV();
148 std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
150 Name += ACPV->getSymbol();
151 if (ACPV->isNonLazyPointer()) {
152 if (GV->hasHiddenVisibility())
153 HiddenGVNonLazyPtrs.insert(Name);
155 GVNonLazyPtrs.insert(Name);
156 printSuffixedName(Name, "$non_lazy_ptr");
157 } else if (ACPV->isStub()) {
158 FnStubs.insert(Name);
159 printSuffixedName(Name, "$stub");
162 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
163 if (ACPV->getPCAdjustment() != 0) {
164 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
165 << utostr(ACPV->getLabelId())
166 << "+" << (unsigned)ACPV->getPCAdjustment();
167 if (ACPV->mustAddCurrentAddress())
174 void getAnalysisUsage(AnalysisUsage &AU) const {
175 AsmPrinter::getAnalysisUsage(AU);
176 AU.setPreservesAll();
177 AU.addRequired<MachineModuleInfo>();
178 AU.addRequired<DwarfWriter>();
181 } // end of anonymous namespace
183 #include "ARMGenAsmWriter.inc"
185 /// runOnMachineFunction - This uses the printInstruction()
186 /// method to print assembly for each instruction.
188 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
191 AFI = MF.getInfo<ARMFunctionInfo>();
192 MCP = MF.getConstantPool();
194 SetupMachineFunction(MF);
197 // NOTE: we don't print out constant pools here, they are handled as
201 // Print out labels for the function.
202 const Function *F = MF.getFunction();
203 switch (F->getLinkage()) {
204 default: assert(0 && "Unknown linkage type!");
205 case Function::PrivateLinkage:
206 case Function::InternalLinkage:
207 SwitchToTextSection("\t.text", F);
209 case Function::ExternalLinkage:
210 SwitchToTextSection("\t.text", F);
211 O << "\t.globl\t" << CurrentFnName << "\n";
213 case Function::WeakAnyLinkage:
214 case Function::WeakODRLinkage:
215 case Function::LinkOnceAnyLinkage:
216 case Function::LinkOnceODRLinkage:
217 if (Subtarget->isTargetDarwin()) {
219 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
220 O << "\t.globl\t" << CurrentFnName << "\n";
221 O << "\t.weak_definition\t" << CurrentFnName << "\n";
223 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
228 printVisibility(CurrentFnName, F->getVisibility());
230 if (AFI->isThumbFunction()) {
231 EmitAlignment(1, F, AFI->getAlign());
232 O << "\t.code\t16\n";
233 O << "\t.thumb_func";
234 if (Subtarget->isTargetDarwin())
235 O << "\t" << CurrentFnName;
241 O << CurrentFnName << ":\n";
242 // Emit pre-function debug information.
243 DW->BeginFunction(&MF);
245 if (Subtarget->isTargetDarwin()) {
246 // If the function is empty, then we need to emit *something*. Otherwise,
247 // the function's label might be associated with something that it wasn't
248 // meant to be associated with. We emit a noop in this situation.
249 MachineFunction::iterator I = MF.begin();
251 if (++I == MF.end() && MF.front().empty())
255 // Print out code for the function.
256 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
258 // Print a label for the basic block.
259 if (I != MF.begin()) {
260 printBasicBlockLabel(I, true, true, VerboseAsm);
263 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
265 // Print the assembly for the instruction.
266 printMachineInstruction(II);
270 if (TAI->hasDotTypeDotSizeDirective())
271 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
273 // Emit post-function debug information.
274 DW->EndFunction(&MF);
281 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
282 const char *Modifier) {
283 const MachineOperand &MO = MI->getOperand(opNum);
284 switch (MO.getType()) {
285 case MachineOperand::MO_Register: {
286 unsigned Reg = MO.getReg();
287 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
288 if (Modifier && strcmp(Modifier, "dregpair") == 0) {
289 unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0
290 unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1
292 << TRI->getAsmName(DRegLo) << "-" << TRI->getAsmName(DRegHi)
295 O << TRI->getAsmName(Reg);
298 assert(0 && "not implemented");
301 case MachineOperand::MO_Immediate: {
302 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
308 case MachineOperand::MO_MachineBasicBlock:
309 printBasicBlockLabel(MO.getMBB());
311 case MachineOperand::MO_GlobalAddress: {
312 bool isCallOp = Modifier && !strcmp(Modifier, "call");
313 GlobalValue *GV = MO.getGlobal();
314 std::string Name = Mang->getValueName(GV);
315 bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
316 GV->hasLinkOnceLinkage());
317 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
318 TM.getRelocationModel() != Reloc::Static) {
319 printSuffixedName(Name, "$stub");
320 FnStubs.insert(Name);
324 printOffset(MO.getOffset());
326 if (isCallOp && Subtarget->isTargetELF() &&
327 TM.getRelocationModel() == Reloc::PIC_)
331 case MachineOperand::MO_ExternalSymbol: {
332 bool isCallOp = Modifier && !strcmp(Modifier, "call");
333 std::string Name(TAI->getGlobalPrefix());
334 Name += MO.getSymbolName();
335 if (isCallOp && Subtarget->isTargetDarwin() &&
336 TM.getRelocationModel() != Reloc::Static) {
337 printSuffixedName(Name, "$stub");
338 FnStubs.insert(Name);
341 if (isCallOp && Subtarget->isTargetELF() &&
342 TM.getRelocationModel() == Reloc::PIC_)
346 case MachineOperand::MO_ConstantPoolIndex:
347 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
348 << '_' << MO.getIndex();
350 case MachineOperand::MO_JumpTableIndex:
351 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
352 << '_' << MO.getIndex();
355 O << "<unknown operand type>"; abort (); break;
359 static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
360 const TargetAsmInfo *TAI) {
361 assert(V < (1 << 12) && "Not a valid so_imm value!");
362 unsigned Imm = ARM_AM::getSOImmValImm(V);
363 unsigned Rot = ARM_AM::getSOImmValRot(V);
365 // Print low-level immediate formation info, per
366 // A5.1.3: "Data-processing operands - Immediate".
368 O << "#" << Imm << ", " << Rot;
369 // Pretty printed version.
371 O << ' ' << TAI->getCommentString()
372 << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
378 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
379 /// immediate in bits 0-7.
380 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
381 const MachineOperand &MO = MI->getOperand(OpNum);
382 assert(MO.isImm() && "Not a valid so_imm value!");
383 printSOImm(O, MO.getImm(), VerboseAsm, TAI);
386 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
387 /// followed by an 'orr' to materialize.
388 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
389 const MachineOperand &MO = MI->getOperand(OpNum);
390 assert(MO.isImm() && "Not a valid so_imm value!");
391 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
392 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
393 printSOImm(O, ARM_AM::getSOImmVal(V1), VerboseAsm, TAI);
395 printPredicateOperand(MI, 2);
401 printSOImm(O, ARM_AM::getSOImmVal(V2), VerboseAsm, TAI);
404 // Constant shifts so_reg is a 3-operand unit corresponding to register forms of
405 // the A5.1 "Addressing Mode 1 - Data-processing operands" forms. This
408 // REG IMM, SH_OPC - e.g. R5, LSL #3
409 void ARMAsmPrinter::printSOOperand(const MachineInstr *MI, int OpNum) {
410 const MachineOperand &MO1 = MI->getOperand(OpNum);
411 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
413 unsigned Reg = MO1.getReg();
414 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
415 O << TM.getRegisterInfo()->getAsmName(Reg);
417 // Print the shift opc.
419 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
422 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
423 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
426 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
427 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
429 // REG REG 0,SH_OPC - e.g. R5, ROR R3
430 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
431 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
432 const MachineOperand &MO1 = MI->getOperand(Op);
433 const MachineOperand &MO2 = MI->getOperand(Op+1);
434 const MachineOperand &MO3 = MI->getOperand(Op+2);
436 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
437 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
439 // Print the shift opc.
441 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
445 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
446 O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
447 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
449 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
453 static void printT2SOImm(raw_ostream &O, int64_t V) {
454 unsigned Imm = ARM_AM::getT2SOImmValDecode(V);
456 // Always print the immediate directly, as the "rotate" form
457 // is deprecated in some contexts.
461 /// printT2SOImmOperand - T2SOImm is:
462 /// 1. a 4-bit splat control value and 8 bit immediate value
463 /// 2. a 5-bit rotate amount and a non-zero 8-bit immediate value
464 /// represented by a normalizedin 7-bit value (msb is always 1)
465 void ARMAsmPrinter::printT2SOImmOperand(const MachineInstr *MI, int OpNum) {
466 const MachineOperand &MO = MI->getOperand(OpNum);
467 assert(MO.isImm() && "Not a valid so_imm value!");
468 printT2SOImm(O, MO.getImm());
471 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
472 const MachineOperand &MO1 = MI->getOperand(Op);
473 const MachineOperand &MO2 = MI->getOperand(Op+1);
474 const MachineOperand &MO3 = MI->getOperand(Op+2);
476 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
477 printOperand(MI, Op);
481 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
484 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
486 << (char)ARM_AM::getAM2Op(MO3.getImm())
487 << ARM_AM::getAM2Offset(MO3.getImm());
493 << (char)ARM_AM::getAM2Op(MO3.getImm())
494 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
496 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
498 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
503 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
504 const MachineOperand &MO1 = MI->getOperand(Op);
505 const MachineOperand &MO2 = MI->getOperand(Op+1);
508 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
509 assert(ImmOffs && "Malformed indexed load / store!");
511 << (char)ARM_AM::getAM2Op(MO2.getImm())
516 O << (char)ARM_AM::getAM2Op(MO2.getImm())
517 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
519 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
521 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
525 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
526 const MachineOperand &MO1 = MI->getOperand(Op);
527 const MachineOperand &MO2 = MI->getOperand(Op+1);
528 const MachineOperand &MO3 = MI->getOperand(Op+2);
530 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
531 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
535 << (char)ARM_AM::getAM3Op(MO3.getImm())
536 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName
541 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
543 << (char)ARM_AM::getAM3Op(MO3.getImm())
548 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
549 const MachineOperand &MO1 = MI->getOperand(Op);
550 const MachineOperand &MO2 = MI->getOperand(Op+1);
553 O << (char)ARM_AM::getAM3Op(MO2.getImm())
554 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
558 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
559 assert(ImmOffs && "Malformed indexed load / store!");
561 << (char)ARM_AM::getAM3Op(MO2.getImm())
565 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
566 const char *Modifier) {
567 const MachineOperand &MO1 = MI->getOperand(Op);
568 const MachineOperand &MO2 = MI->getOperand(Op+1);
569 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
570 if (Modifier && strcmp(Modifier, "submode") == 0) {
571 if (MO1.getReg() == ARM::SP) {
572 bool isLDM = (MI->getOpcode() == ARM::LDM ||
573 MI->getOpcode() == ARM::LDM_RET);
574 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
576 O << ARM_AM::getAMSubModeStr(Mode);
578 printOperand(MI, Op);
579 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
584 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
585 const char *Modifier) {
586 const MachineOperand &MO1 = MI->getOperand(Op);
587 const MachineOperand &MO2 = MI->getOperand(Op+1);
589 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
590 printOperand(MI, Op);
594 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
596 if (Modifier && strcmp(Modifier, "submode") == 0) {
597 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
598 if (MO1.getReg() == ARM::SP) {
599 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
600 MI->getOpcode() == ARM::FLDMS);
601 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
603 O << ARM_AM::getAMSubModeStr(Mode);
605 } else if (Modifier && strcmp(Modifier, "base") == 0) {
606 // Used for FSTM{D|S} and LSTM{D|S} operations.
607 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
608 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
613 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
615 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
617 << (char)ARM_AM::getAM5Op(MO2.getImm())
623 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
624 const char *Modifier) {
625 if (Modifier && strcmp(Modifier, "label") == 0) {
626 printPCLabel(MI, Op+1);
630 const MachineOperand &MO1 = MI->getOperand(Op);
631 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
632 O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]";
636 ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) {
637 const MachineOperand &MO = MI->getOperand(Op);
638 uint32_t v = ~MO.getImm();
639 int32_t lsb = ffs (v) - 1;
640 int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
641 assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
642 O << "#" << lsb << ", #" << width;
646 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
647 const MachineOperand &MO1 = MI->getOperand(Op);
648 const MachineOperand &MO2 = MI->getOperand(Op+1);
649 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
650 O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]";
654 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
656 const MachineOperand &MO1 = MI->getOperand(Op);
657 const MachineOperand &MO2 = MI->getOperand(Op+1);
658 const MachineOperand &MO3 = MI->getOperand(Op+2);
660 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
661 printOperand(MI, Op);
665 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
667 O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName;
668 else if (unsigned ImmOffs = MO2.getImm()) {
669 O << ", #" << ImmOffs;
677 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
678 printThumbAddrModeRI5Operand(MI, Op, 1);
681 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
682 printThumbAddrModeRI5Operand(MI, Op, 2);
685 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
686 printThumbAddrModeRI5Operand(MI, Op, 4);
689 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
690 const MachineOperand &MO1 = MI->getOperand(Op);
691 const MachineOperand &MO2 = MI->getOperand(Op+1);
692 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
693 if (unsigned ImmOffs = MO2.getImm())
694 O << ", #" << ImmOffs << " * 4";
698 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) {
699 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(opNum).getImm();
701 O << ARMCondCodeToString(CC);
704 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int opNum){
705 unsigned Reg = MI->getOperand(opNum).getReg();
707 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
712 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) {
713 int Id = (int)MI->getOperand(opNum).getImm();
714 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
717 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int opNum) {
719 for (unsigned i = opNum, e = MI->getNumOperands(); i != e; ++i) {
721 if (i != e-1) O << ", ";
726 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNo,
727 const char *Modifier) {
728 assert(Modifier && "This operand only works with a modifier!");
729 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
731 if (!strcmp(Modifier, "label")) {
732 unsigned ID = MI->getOperand(OpNo).getImm();
733 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
734 << '_' << ID << ":\n";
736 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
737 unsigned CPI = MI->getOperand(OpNo).getIndex();
739 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
741 if (MCPE.isMachineConstantPoolEntry()) {
742 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
744 EmitGlobalConstant(MCPE.Val.ConstVal);
749 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) {
750 const MachineOperand &MO1 = MI->getOperand(OpNo);
751 const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id
752 unsigned JTI = MO1.getIndex();
753 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
754 << '_' << JTI << '_' << MO2.getImm() << ":\n";
756 const char *JTEntryDirective = TAI->getJumpTableDirective();
757 if (!JTEntryDirective)
758 JTEntryDirective = TAI->getData32bitsDirective();
760 const MachineFunction *MF = MI->getParent()->getParent();
761 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
762 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
763 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
764 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
765 std::set<MachineBasicBlock*> JTSets;
766 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
767 MachineBasicBlock *MBB = JTBBs[i];
768 if (UseSet && JTSets.insert(MBB).second)
769 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
771 O << JTEntryDirective << ' ';
773 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
774 << '_' << JTI << '_' << MO2.getImm()
775 << "_set_" << MBB->getNumber();
776 else if (TM.getRelocationModel() == Reloc::PIC_) {
777 printBasicBlockLabel(MBB, false, false, false);
778 // If the arch uses custom Jump Table directives, don't calc relative to JT
779 if (!TAI->getJumpTableDirective())
780 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
781 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
783 printBasicBlockLabel(MBB, false, false, false);
790 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
791 unsigned AsmVariant, const char *ExtraCode){
792 // Does this asm operand have a single letter operand modifier?
793 if (ExtraCode && ExtraCode[0]) {
794 if (ExtraCode[1] != 0) return true; // Unknown modifier.
796 switch (ExtraCode[0]) {
797 default: return true; // Unknown modifier.
798 case 'a': // Don't print "#" before a global var name or constant.
799 case 'c': // Don't print "$" before a global var name or constant.
800 printOperand(MI, OpNo, "no_hash");
802 case 'P': // Print a VFP double precision register.
803 printOperand(MI, OpNo);
806 if (TM.getTargetData()->isLittleEndian())
810 if (TM.getTargetData()->isBigEndian())
813 case 'H': // Write second word of DI / DF reference.
814 // Verify that this operand has two consecutive registers.
815 if (!MI->getOperand(OpNo).isReg() ||
816 OpNo+1 == MI->getNumOperands() ||
817 !MI->getOperand(OpNo+1).isReg())
819 ++OpNo; // Return the high-part.
823 printOperand(MI, OpNo);
827 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
828 unsigned OpNo, unsigned AsmVariant,
829 const char *ExtraCode) {
830 if (ExtraCode && ExtraCode[0])
831 return true; // Unknown modifier.
832 printAddrMode2Operand(MI, OpNo);
836 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
839 int Opc = MI->getOpcode();
841 case ARM::CONSTPOOL_ENTRY:
842 if (!InCPMode && AFI->isThumbFunction()) {
848 if (InCPMode && AFI->isThumbFunction())
852 // Call the autogenerated instruction printer routines.
853 printInstruction(MI);
856 bool ARMAsmPrinter::doInitialization(Module &M) {
858 bool Result = AsmPrinter::doInitialization(M);
859 DW = getAnalysisIfAvailable<DwarfWriter>();
861 // Thumb-2 instructions are supported only in unified assembler syntax mode.
862 if (Subtarget->hasThumb2())
863 O << "\t.syntax unified\n";
865 // Emit ARM Build Attributes
866 if (Subtarget->isTargetELF()) {
868 std::string CPUString = Subtarget->getCPUString();
869 if (CPUString != "generic")
870 O << "\t.cpu " << CPUString << '\n';
872 // FIXME: Emit FPU type
873 if (Subtarget->hasVFP2())
874 O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ", 2\n";
876 // Signal various FP modes.
878 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal << ", 1\n"
879 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions << ", 1\n";
881 if (FiniteOnlyFPMath())
882 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
884 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
886 // 8-bytes alignment stuff.
887 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n"
888 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
890 // FIXME: Should we signal R9 usage?
896 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
897 /// Don't print things like \\n or \\0.
898 static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
899 for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
905 void ARMAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
906 const TargetData *TD = TM.getTargetData();
908 if (!GVar->hasInitializer()) // External global require no code
911 // Check to see if this is a special global used by LLVM, if so, emit it.
913 if (EmitSpecialLLVMGlobal(GVar)) {
914 if (Subtarget->isTargetDarwin() &&
915 TM.getRelocationModel() == Reloc::Static) {
916 if (GVar->getName() == "llvm.global_ctors")
917 O << ".reference .constructors_used\n";
918 else if (GVar->getName() == "llvm.global_dtors")
919 O << ".reference .destructors_used\n";
924 std::string name = Mang->getValueName(GVar);
925 Constant *C = GVar->getInitializer();
926 const Type *Type = C->getType();
927 unsigned Size = TD->getTypeAllocSize(Type);
928 unsigned Align = TD->getPreferredAlignmentLog(GVar);
929 bool isDarwin = Subtarget->isTargetDarwin();
931 printVisibility(name, GVar->getVisibility());
933 if (Subtarget->isTargetELF())
934 O << "\t.type " << name << ",%object\n";
936 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal() &&
938 TAI->SectionKindForGlobal(GVar) == SectionKind::RODataMergeStr)) {
939 // FIXME: This seems to be pretty darwin-specific
941 if (GVar->hasExternalLinkage()) {
942 SwitchToSection(TAI->SectionForGlobal(GVar));
943 if (const char *Directive = TAI->getZeroFillDirective()) {
944 O << "\t.globl\t" << name << "\n";
945 O << Directive << "__DATA, __common, " << name << ", "
946 << Size << ", " << Align << "\n";
951 if (GVar->hasLocalLinkage() || GVar->isWeakForLinker()) {
952 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
955 if (GVar->hasLocalLinkage()) {
956 O << TAI->getLCOMMDirective() << name << "," << Size
958 } else if (GVar->hasCommonLinkage()) {
959 O << TAI->getCOMMDirective() << name << "," << Size
962 SwitchToSection(TAI->SectionForGlobal(GVar));
963 O << "\t.globl " << name << '\n'
964 << TAI->getWeakDefDirective() << name << '\n';
965 EmitAlignment(Align, GVar);
968 O << "\t\t\t\t" << TAI->getCommentString() << ' ';
969 PrintUnmangledNameSafely(GVar, O);
972 EmitGlobalConstant(C);
975 } else if (TAI->getLCOMMDirective() != NULL) {
976 if (GVar->hasLocalLinkage()) {
977 O << TAI->getLCOMMDirective() << name << "," << Size;
979 O << TAI->getCOMMDirective() << name << "," << Size;
980 if (TAI->getCOMMDirectiveTakesAlignment())
981 O << ',' << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
984 SwitchToSection(TAI->SectionForGlobal(GVar));
985 if (GVar->hasLocalLinkage())
986 O << "\t.local\t" << name << "\n";
987 O << TAI->getCOMMDirective() << name << "," << Size;
988 if (TAI->getCOMMDirectiveTakesAlignment())
989 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
992 O << "\t\t" << TAI->getCommentString() << " ";
993 PrintUnmangledNameSafely(GVar, O);
1000 SwitchToSection(TAI->SectionForGlobal(GVar));
1001 switch (GVar->getLinkage()) {
1002 case GlobalValue::CommonLinkage:
1003 case GlobalValue::LinkOnceAnyLinkage:
1004 case GlobalValue::LinkOnceODRLinkage:
1005 case GlobalValue::WeakAnyLinkage:
1006 case GlobalValue::WeakODRLinkage:
1008 O << "\t.globl " << name << "\n"
1009 << "\t.weak_definition " << name << "\n";
1011 O << "\t.weak " << name << "\n";
1014 case GlobalValue::AppendingLinkage:
1015 // FIXME: appending linkage variables should go into a section of
1016 // their name or something. For now, just emit them as external.
1017 case GlobalValue::ExternalLinkage:
1018 O << "\t.globl " << name << "\n";
1020 case GlobalValue::PrivateLinkage:
1021 case GlobalValue::InternalLinkage:
1024 assert(0 && "Unknown linkage type!");
1028 EmitAlignment(Align, GVar);
1031 O << "\t\t\t\t" << TAI->getCommentString() << " ";
1032 PrintUnmangledNameSafely(GVar, O);
1035 if (TAI->hasDotTypeDotSizeDirective())
1036 O << "\t.size " << name << ", " << Size << "\n";
1038 EmitGlobalConstant(C);
1043 bool ARMAsmPrinter::doFinalization(Module &M) {
1044 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
1046 printModuleLevelGV(I);
1048 if (Subtarget->isTargetDarwin()) {
1049 SwitchToDataSection("");
1051 // Output stubs for dynamically-linked functions
1052 for (StringSet<>::iterator i = FnStubs.begin(), e = FnStubs.end();
1054 if (TM.getRelocationModel() == Reloc::PIC_)
1055 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
1058 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
1062 O << "\t.code\t32\n";
1064 const char *p = i->getKeyData();
1065 printSuffixedName(p, "$stub");
1067 O << "\t.indirect_symbol " << p << "\n";
1069 printSuffixedName(p, "$slp");
1071 if (TM.getRelocationModel() == Reloc::PIC_) {
1072 printSuffixedName(p, "$scv");
1074 O << "\tadd ip, pc, ip\n";
1076 O << "\tldr pc, [ip, #0]\n";
1077 printSuffixedName(p, "$slp");
1080 printSuffixedName(p, "$lazy_ptr");
1081 if (TM.getRelocationModel() == Reloc::PIC_) {
1083 printSuffixedName(p, "$scv");
1087 SwitchToDataSection(".lazy_symbol_pointer", 0);
1088 printSuffixedName(p, "$lazy_ptr");
1090 O << "\t.indirect_symbol " << p << "\n";
1091 O << "\t.long\tdyld_stub_binding_helper\n";
1095 // Output non-lazy-pointers for external and common global variables.
1096 if (!GVNonLazyPtrs.empty()) {
1097 SwitchToDataSection("\t.non_lazy_symbol_pointer", 0);
1098 for (StringSet<>::iterator i = GVNonLazyPtrs.begin(),
1099 e = GVNonLazyPtrs.end(); i != e; ++i) {
1100 const char *p = i->getKeyData();
1101 printSuffixedName(p, "$non_lazy_ptr");
1103 O << "\t.indirect_symbol " << p << "\n";
1104 O << "\t.long\t0\n";
1108 if (!HiddenGVNonLazyPtrs.empty()) {
1109 SwitchToSection(TAI->getDataSection());
1110 for (StringSet<>::iterator i = HiddenGVNonLazyPtrs.begin(),
1111 e = HiddenGVNonLazyPtrs.end(); i != e; ++i) {
1112 const char *p = i->getKeyData();
1114 printSuffixedName(p, "$non_lazy_ptr");
1116 O << "\t.long " << p << "\n";
1121 // Emit initial debug information.
1124 // Funny Darwin hack: This flag tells the linker that no global symbols
1125 // contain code that falls through to other global symbols (e.g. the obvious
1126 // implementation of multiple entry points). If this doesn't occur, the
1127 // linker can safely perform dead code stripping. Since LLVM never
1128 // generates code that does this, it is always safe to set.
1129 O << "\t.subsections_via_symbols\n";
1131 // Emit final debug information for ELF.
1135 return AsmPrinter::doFinalization(M);
1138 /// createARMCodePrinterPass - Returns a pass that prints the ARM
1139 /// assembly code for a MachineFunction to the given output stream,
1140 /// using the given target machine description. This should work
1141 /// regardless of whether the function is in SSA form.
1143 FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
1144 ARMTargetMachine &tm,
1145 CodeGenOpt::Level OptLevel,
1147 return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
1151 static struct Register {
1153 ARMTargetMachine::registerAsmPrinter(createARMCodePrinterPass);
1158 // Force static initialization.
1159 extern "C" void LLVMInitializeARMAsmPrinter() { }