1 // The LLVM Compiler Infrastructure
3 // This file is distributed under the University of Illinois Open Source
4 // License. See LICENSE.TXT for details.
6 //===----------------------------------------------------------------------===//
8 // This file contains a printer that converts from our internal representation
9 // of machine-dependent LLVM code to GAS-format ARM assembly language.
11 //===----------------------------------------------------------------------===//
13 #define DEBUG_TYPE "asm-printer"
15 #include "ARMBuildAttrs.h"
16 #include "ARMTargetMachine.h"
17 #include "ARMAddressingModes.h"
18 #include "ARMConstantPoolValue.h"
19 #include "ARMMachineFunctionInfo.h"
20 #include "llvm/Constants.h"
21 #include "llvm/Module.h"
22 #include "llvm/Assembly/Writer.h"
23 #include "llvm/CodeGen/AsmPrinter.h"
24 #include "llvm/CodeGen/DwarfWriter.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/MachineFunctionPass.h"
27 #include "llvm/CodeGen/MachineJumpTableInfo.h"
28 #include "llvm/MC/MCSectionMachO.h"
29 #include "llvm/MC/MCStreamer.h"
30 #include "llvm/MC/MCAsmInfo.h"
31 #include "llvm/MC/MCSymbol.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetLoweringObjectFile.h"
34 #include "llvm/Target/TargetMachine.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetRegistry.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/SmallString.h"
39 #include "llvm/ADT/Statistic.h"
40 #include "llvm/ADT/StringSet.h"
41 #include "llvm/Support/Compiler.h"
42 #include "llvm/Support/ErrorHandling.h"
43 #include "llvm/Support/Mangler.h"
44 #include "llvm/Support/MathExtras.h"
45 #include "llvm/Support/FormattedStream.h"
49 STATISTIC(EmittedInsts, "Number of machine instrs printed");
52 class VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
54 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
55 /// make the right decision when printing asm code for different targets.
56 const ARMSubtarget *Subtarget;
58 /// AFI - Keep a pointer to ARMFunctionInfo for the current
62 /// MCP - Keep a pointer to constantpool entries of the current
64 const MachineConstantPool *MCP;
66 /// We name each basic block in a Function with a unique number, so
67 /// that we can consistently refer to them later. This is cleared
68 /// at the beginning of each call to runOnMachineFunction().
70 typedef std::map<const Value *, unsigned> ValueMapTy;
71 ValueMapTy NumberForBB;
73 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
74 /// non-lazy-pointers for indirect access.
75 StringMap<std::string> GVNonLazyPtrs;
77 /// HiddenGVNonLazyPtrs - Keeps the set of GlobalValues with hidden
78 /// visibility that require non-lazy-pointers for indirect access.
79 StringMap<std::string> HiddenGVNonLazyPtrs;
81 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
84 explicit ARMAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
85 const MCAsmInfo *T, bool V)
86 : AsmPrinter(O, TM, T, V), AFI(NULL), MCP(NULL),
88 Subtarget = &TM.getSubtarget<ARMSubtarget>();
91 virtual const char *getPassName() const {
92 return "ARM Assembly Printer";
95 void printOperand(const MachineInstr *MI, int OpNum,
96 const char *Modifier = 0);
97 void printSOImmOperand(const MachineInstr *MI, int OpNum);
98 void printSOImm2PartOperand(const MachineInstr *MI, int OpNum);
99 void printSORegOperand(const MachineInstr *MI, int OpNum);
100 void printAddrMode2Operand(const MachineInstr *MI, int OpNum);
101 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum);
102 void printAddrMode3Operand(const MachineInstr *MI, int OpNum);
103 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum);
104 void printAddrMode4Operand(const MachineInstr *MI, int OpNum,
105 const char *Modifier = 0);
106 void printAddrMode5Operand(const MachineInstr *MI, int OpNum,
107 const char *Modifier = 0);
108 void printAddrMode6Operand(const MachineInstr *MI, int OpNum);
109 void printAddrModePCOperand(const MachineInstr *MI, int OpNum,
110 const char *Modifier = 0);
111 void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum);
113 void printThumbITMask(const MachineInstr *MI, int OpNum);
114 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum);
115 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
117 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum);
118 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum);
119 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum);
120 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum);
122 void printT2SOOperand(const MachineInstr *MI, int OpNum);
123 void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum);
124 void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum);
125 void printT2AddrModeImm8s4Operand(const MachineInstr *MI, int OpNum);
126 void printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, int OpNum);
127 void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum);
129 void printPredicateOperand(const MachineInstr *MI, int OpNum);
130 void printSBitModifierOperand(const MachineInstr *MI, int OpNum);
131 void printPCLabel(const MachineInstr *MI, int OpNum);
132 void printRegisterList(const MachineInstr *MI, int OpNum);
133 void printCPInstOperand(const MachineInstr *MI, int OpNum,
134 const char *Modifier);
135 void printJTBlockOperand(const MachineInstr *MI, int OpNum);
136 void printJT2BlockOperand(const MachineInstr *MI, int OpNum);
137 void printTBAddrMode(const MachineInstr *MI, int OpNum);
138 void printNoHashImmediate(const MachineInstr *MI, int OpNum);
140 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
141 unsigned AsmVariant, const char *ExtraCode);
142 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
144 const char *ExtraCode);
146 void PrintGlobalVariable(const GlobalVariable* GVar);
147 void printInstruction(const MachineInstr *MI); // autogenerated.
148 static const char *getRegisterName(unsigned RegNo);
150 void printMachineInstruction(const MachineInstr *MI);
151 bool runOnMachineFunction(MachineFunction &F);
152 bool doFinalization(Module &M);
153 void EmitStartOfAsmFile(Module &M);
155 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
157 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
158 printDataDirective(MCPV->getType());
160 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
161 GlobalValue *GV = ACPV->getGV();
164 if (ACPV->isLSDA()) {
165 SmallString<16> LSDAName;
166 raw_svector_ostream(LSDAName) << MAI->getPrivateGlobalPrefix() <<
167 "_LSDA_" << getFunctionNumber();
168 Name = LSDAName.str();
170 bool isIndirect = Subtarget->isTargetDarwin() &&
171 Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel());
173 Name = Mang->getMangledName(GV);
175 // FIXME: Remove this when Darwin transition to @GOT like syntax.
176 std::string SymName = Mang->getMangledName(GV);
177 Name = Mang->getMangledName(GV, "$non_lazy_ptr", true);
178 if (GV->hasHiddenVisibility())
179 HiddenGVNonLazyPtrs[SymName] = Name;
181 GVNonLazyPtrs[SymName] = Name;
184 Name = Mang->makeNameProper(ACPV->getSymbol());
187 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
188 if (ACPV->getPCAdjustment() != 0) {
189 O << "-(" << MAI->getPrivateGlobalPrefix() << "PC"
190 << ACPV->getLabelId()
191 << "+" << (unsigned)ACPV->getPCAdjustment();
192 if (ACPV->mustAddCurrentAddress())
199 void getAnalysisUsage(AnalysisUsage &AU) const {
200 AsmPrinter::getAnalysisUsage(AU);
201 AU.setPreservesAll();
202 AU.addRequired<MachineModuleInfo>();
203 AU.addRequired<DwarfWriter>();
206 } // end of anonymous namespace
208 #include "ARMGenAsmWriter.inc"
210 /// runOnMachineFunction - This uses the printInstruction()
211 /// method to print assembly for each instruction.
213 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
216 AFI = MF.getInfo<ARMFunctionInfo>();
217 MCP = MF.getConstantPool();
219 SetupMachineFunction(MF);
222 // NOTE: we don't print out constant pools here, they are handled as
227 // Print out labels for the function.
228 const Function *F = MF.getFunction();
229 OutStreamer.SwitchSection(getObjFileLowering().SectionForGlobal(F, Mang, TM));
231 switch (F->getLinkage()) {
232 default: llvm_unreachable("Unknown linkage type!");
233 case Function::PrivateLinkage:
234 case Function::InternalLinkage:
236 case Function::ExternalLinkage:
237 O << "\t.globl\t" << CurrentFnName << "\n";
239 case Function::LinkerPrivateLinkage:
240 case Function::WeakAnyLinkage:
241 case Function::WeakODRLinkage:
242 case Function::LinkOnceAnyLinkage:
243 case Function::LinkOnceODRLinkage:
244 if (Subtarget->isTargetDarwin()) {
245 O << "\t.globl\t" << CurrentFnName << "\n";
246 O << "\t.weak_definition\t" << CurrentFnName << "\n";
248 O << MAI->getWeakRefDirective() << CurrentFnName << "\n";
253 printVisibility(CurrentFnName, F->getVisibility());
255 if (AFI->isThumbFunction()) {
256 EmitAlignment(MF.getAlignment(), F, AFI->getAlign());
257 O << "\t.code\t16\n";
258 O << "\t.thumb_func";
259 if (Subtarget->isTargetDarwin())
260 O << "\t" << CurrentFnName;
264 EmitAlignment(MF.getAlignment(), F);
267 O << CurrentFnName << ":\n";
268 // Emit pre-function debug information.
269 DW->BeginFunction(&MF);
271 if (Subtarget->isTargetDarwin()) {
272 // If the function is empty, then we need to emit *something*. Otherwise,
273 // the function's label might be associated with something that it wasn't
274 // meant to be associated with. We emit a noop in this situation.
275 MachineFunction::iterator I = MF.begin();
277 if (++I == MF.end() && MF.front().empty())
281 // Print out code for the function.
282 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
284 // Print a label for the basic block.
285 if (I != MF.begin()) {
286 EmitBasicBlockStart(I);
289 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
291 // Print the assembly for the instruction.
292 printMachineInstruction(II);
296 if (MAI->hasDotTypeDotSizeDirective())
297 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
299 // Emit post-function debug information.
300 DW->EndFunction(&MF);
305 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
306 const char *Modifier) {
307 const MachineOperand &MO = MI->getOperand(OpNum);
308 switch (MO.getType()) {
309 case MachineOperand::MO_Register: {
310 unsigned Reg = MO.getReg();
311 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
312 if (Modifier && strcmp(Modifier, "dregpair") == 0) {
313 unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0
314 unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1
316 << getRegisterName(DRegLo) << ',' << getRegisterName(DRegHi)
318 } else if (Modifier && strcmp(Modifier, "lane") == 0) {
319 unsigned RegNum = ARMRegisterInfo::getRegisterNumbering(Reg);
320 unsigned DReg = TRI->getMatchingSuperReg(Reg, RegNum & 1 ? 2 : 1,
321 &ARM::DPR_VFP2RegClass);
322 O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']';
324 O << getRegisterName(Reg);
327 llvm_unreachable("not implemented");
330 case MachineOperand::MO_Immediate: {
331 int64_t Imm = MO.getImm();
333 if (strcmp(Modifier, "lo16") == 0)
334 Imm = Imm & 0xffffLL;
335 else if (strcmp(Modifier, "hi16") == 0)
336 Imm = (Imm & 0xffff0000LL) >> 16;
341 case MachineOperand::MO_MachineBasicBlock:
342 GetMBBSymbol(MO.getMBB()->getNumber())->print(O, MAI);
344 case MachineOperand::MO_GlobalAddress: {
345 bool isCallOp = Modifier && !strcmp(Modifier, "call");
346 GlobalValue *GV = MO.getGlobal();
347 O << Mang->getMangledName(GV);
349 printOffset(MO.getOffset());
351 if (isCallOp && Subtarget->isTargetELF() &&
352 TM.getRelocationModel() == Reloc::PIC_)
356 case MachineOperand::MO_ExternalSymbol: {
357 bool isCallOp = Modifier && !strcmp(Modifier, "call");
358 std::string Name = Mang->makeNameProper(MO.getSymbolName());
361 if (isCallOp && Subtarget->isTargetELF() &&
362 TM.getRelocationModel() == Reloc::PIC_)
366 case MachineOperand::MO_ConstantPoolIndex:
367 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
368 << '_' << MO.getIndex();
370 case MachineOperand::MO_JumpTableIndex:
371 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
372 << '_' << MO.getIndex();
375 O << "<unknown operand type>"; abort (); break;
379 static void printSOImm(formatted_raw_ostream &O, int64_t V, bool VerboseAsm,
380 const MCAsmInfo *MAI) {
381 // Break it up into two parts that make up a shifter immediate.
382 V = ARM_AM::getSOImmVal(V);
383 assert(V != -1 && "Not a valid so_imm value!");
385 unsigned Imm = ARM_AM::getSOImmValImm(V);
386 unsigned Rot = ARM_AM::getSOImmValRot(V);
388 // Print low-level immediate formation info, per
389 // A5.1.3: "Data-processing operands - Immediate".
391 O << "#" << Imm << ", " << Rot;
392 // Pretty printed version.
394 O << ' ' << MAI->getCommentString()
395 << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
401 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
402 /// immediate in bits 0-7.
403 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
404 const MachineOperand &MO = MI->getOperand(OpNum);
405 assert(MO.isImm() && "Not a valid so_imm value!");
406 printSOImm(O, MO.getImm(), VerboseAsm, MAI);
409 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
410 /// followed by an 'orr' to materialize.
411 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
412 const MachineOperand &MO = MI->getOperand(OpNum);
413 assert(MO.isImm() && "Not a valid so_imm value!");
414 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
415 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
416 printSOImm(O, V1, VerboseAsm, MAI);
418 printPredicateOperand(MI, 2);
424 printSOImm(O, V2, VerboseAsm, MAI);
427 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
428 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
430 // REG REG 0,SH_OPC - e.g. R5, ROR R3
431 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
432 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
433 const MachineOperand &MO1 = MI->getOperand(Op);
434 const MachineOperand &MO2 = MI->getOperand(Op+1);
435 const MachineOperand &MO3 = MI->getOperand(Op+2);
437 O << getRegisterName(MO1.getReg());
439 // Print the shift opc.
441 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
445 O << getRegisterName(MO2.getReg());
446 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
448 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
452 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
453 const MachineOperand &MO1 = MI->getOperand(Op);
454 const MachineOperand &MO2 = MI->getOperand(Op+1);
455 const MachineOperand &MO3 = MI->getOperand(Op+2);
457 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
458 printOperand(MI, Op);
462 O << "[" << getRegisterName(MO1.getReg());
465 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
467 << (char)ARM_AM::getAM2Op(MO3.getImm())
468 << ARM_AM::getAM2Offset(MO3.getImm());
474 << (char)ARM_AM::getAM2Op(MO3.getImm())
475 << getRegisterName(MO2.getReg());
477 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
479 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
484 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
485 const MachineOperand &MO1 = MI->getOperand(Op);
486 const MachineOperand &MO2 = MI->getOperand(Op+1);
489 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
490 assert(ImmOffs && "Malformed indexed load / store!");
492 << (char)ARM_AM::getAM2Op(MO2.getImm())
497 O << (char)ARM_AM::getAM2Op(MO2.getImm())
498 << getRegisterName(MO1.getReg());
500 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
502 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
506 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
507 const MachineOperand &MO1 = MI->getOperand(Op);
508 const MachineOperand &MO2 = MI->getOperand(Op+1);
509 const MachineOperand &MO3 = MI->getOperand(Op+2);
511 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
512 O << "[" << getRegisterName(MO1.getReg());
516 << (char)ARM_AM::getAM3Op(MO3.getImm())
517 << getRegisterName(MO2.getReg())
522 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
524 << (char)ARM_AM::getAM3Op(MO3.getImm())
529 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
530 const MachineOperand &MO1 = MI->getOperand(Op);
531 const MachineOperand &MO2 = MI->getOperand(Op+1);
534 O << (char)ARM_AM::getAM3Op(MO2.getImm())
535 << getRegisterName(MO1.getReg());
539 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
540 assert(ImmOffs && "Malformed indexed load / store!");
542 << (char)ARM_AM::getAM3Op(MO2.getImm())
546 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
547 const char *Modifier) {
548 const MachineOperand &MO1 = MI->getOperand(Op);
549 const MachineOperand &MO2 = MI->getOperand(Op+1);
550 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
551 if (Modifier && strcmp(Modifier, "submode") == 0) {
552 if (MO1.getReg() == ARM::SP) {
554 bool isLDM = (MI->getOpcode() == ARM::LDM ||
555 MI->getOpcode() == ARM::LDM_RET ||
556 MI->getOpcode() == ARM::t2LDM ||
557 MI->getOpcode() == ARM::t2LDM_RET);
558 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
560 O << ARM_AM::getAMSubModeStr(Mode);
561 } else if (Modifier && strcmp(Modifier, "wide") == 0) {
562 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
563 if (Mode == ARM_AM::ia)
566 printOperand(MI, Op);
567 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
572 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
573 const char *Modifier) {
574 const MachineOperand &MO1 = MI->getOperand(Op);
575 const MachineOperand &MO2 = MI->getOperand(Op+1);
577 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
578 printOperand(MI, Op);
582 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
584 if (Modifier && strcmp(Modifier, "submode") == 0) {
585 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
586 if (MO1.getReg() == ARM::SP) {
587 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
588 MI->getOpcode() == ARM::FLDMS);
589 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
591 O << ARM_AM::getAMSubModeStr(Mode);
593 } else if (Modifier && strcmp(Modifier, "base") == 0) {
594 // Used for FSTM{D|S} and LSTM{D|S} operations.
595 O << getRegisterName(MO1.getReg());
596 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
601 O << "[" << getRegisterName(MO1.getReg());
603 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
605 << (char)ARM_AM::getAM5Op(MO2.getImm())
611 void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op) {
612 const MachineOperand &MO1 = MI->getOperand(Op);
613 const MachineOperand &MO2 = MI->getOperand(Op+1);
614 const MachineOperand &MO3 = MI->getOperand(Op+2);
616 // FIXME: No support yet for specifying alignment.
617 O << "[" << getRegisterName(MO1.getReg()) << "]";
619 if (ARM_AM::getAM6WBFlag(MO3.getImm())) {
620 if (MO2.getReg() == 0)
623 O << ", " << getRegisterName(MO2.getReg());
627 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
628 const char *Modifier) {
629 if (Modifier && strcmp(Modifier, "label") == 0) {
630 printPCLabel(MI, Op+1);
634 const MachineOperand &MO1 = MI->getOperand(Op);
635 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
636 O << "[pc, +" << getRegisterName(MO1.getReg()) << "]";
640 ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) {
641 const MachineOperand &MO = MI->getOperand(Op);
642 uint32_t v = ~MO.getImm();
643 int32_t lsb = CountTrailingZeros_32(v);
644 int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
645 assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
646 O << "#" << lsb << ", #" << width;
649 //===--------------------------------------------------------------------===//
652 ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op) {
653 // (3 - the number of trailing zeros) is the number of then / else.
654 unsigned Mask = MI->getOperand(Op).getImm();
655 unsigned NumTZ = CountTrailingZeros_32(Mask);
656 assert(NumTZ <= 3 && "Invalid IT mask!");
657 for (unsigned Pos = 3, e = NumTZ; Pos > e; --Pos) {
658 bool T = (Mask & (1 << Pos)) == 0;
667 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
668 const MachineOperand &MO1 = MI->getOperand(Op);
669 const MachineOperand &MO2 = MI->getOperand(Op+1);
670 O << "[" << getRegisterName(MO1.getReg());
671 O << ", " << getRegisterName(MO2.getReg()) << "]";
675 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
677 const MachineOperand &MO1 = MI->getOperand(Op);
678 const MachineOperand &MO2 = MI->getOperand(Op+1);
679 const MachineOperand &MO3 = MI->getOperand(Op+2);
681 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
682 printOperand(MI, Op);
686 O << "[" << getRegisterName(MO1.getReg());
688 O << ", " << getRegisterName(MO3.getReg());
689 else if (unsigned ImmOffs = MO2.getImm()) {
690 O << ", #" << ImmOffs;
698 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
699 printThumbAddrModeRI5Operand(MI, Op, 1);
702 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
703 printThumbAddrModeRI5Operand(MI, Op, 2);
706 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
707 printThumbAddrModeRI5Operand(MI, Op, 4);
710 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
711 const MachineOperand &MO1 = MI->getOperand(Op);
712 const MachineOperand &MO2 = MI->getOperand(Op+1);
713 O << "[" << getRegisterName(MO1.getReg());
714 if (unsigned ImmOffs = MO2.getImm())
715 O << ", #" << ImmOffs << " * 4";
719 //===--------------------------------------------------------------------===//
721 // Constant shifts t2_so_reg is a 2-operand unit corresponding to the Thumb2
722 // register with shift forms.
724 // REG IMM, SH_OPC - e.g. R5, LSL #3
725 void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum) {
726 const MachineOperand &MO1 = MI->getOperand(OpNum);
727 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
729 unsigned Reg = MO1.getReg();
730 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
731 O << getRegisterName(Reg);
733 // Print the shift opc.
735 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
738 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
739 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
742 void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI,
744 const MachineOperand &MO1 = MI->getOperand(OpNum);
745 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
747 O << "[" << getRegisterName(MO1.getReg());
749 unsigned OffImm = MO2.getImm();
750 if (OffImm) // Don't print +0.
751 O << ", #+" << OffImm;
755 void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI,
757 const MachineOperand &MO1 = MI->getOperand(OpNum);
758 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
760 O << "[" << getRegisterName(MO1.getReg());
762 int32_t OffImm = (int32_t)MO2.getImm();
765 O << ", #-" << -OffImm;
767 O << ", #+" << OffImm;
771 void ARMAsmPrinter::printT2AddrModeImm8s4Operand(const MachineInstr *MI,
773 const MachineOperand &MO1 = MI->getOperand(OpNum);
774 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
776 O << "[" << getRegisterName(MO1.getReg());
778 int32_t OffImm = (int32_t)MO2.getImm() / 4;
781 O << ", #-" << -OffImm << " * 4";
783 O << ", #+" << OffImm << " * 4";
787 void ARMAsmPrinter::printT2AddrModeImm8OffsetOperand(const MachineInstr *MI,
789 const MachineOperand &MO1 = MI->getOperand(OpNum);
790 int32_t OffImm = (int32_t)MO1.getImm();
793 O << "#-" << -OffImm;
798 void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI,
800 const MachineOperand &MO1 = MI->getOperand(OpNum);
801 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
802 const MachineOperand &MO3 = MI->getOperand(OpNum+2);
804 O << "[" << getRegisterName(MO1.getReg());
806 assert(MO2.getReg() && "Invalid so_reg load / store address!");
807 O << ", " << getRegisterName(MO2.getReg());
809 unsigned ShAmt = MO3.getImm();
811 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!");
812 O << ", lsl #" << ShAmt;
818 //===--------------------------------------------------------------------===//
820 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum) {
821 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
823 O << ARMCondCodeToString(CC);
826 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum){
827 unsigned Reg = MI->getOperand(OpNum).getReg();
829 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
834 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum) {
835 int Id = (int)MI->getOperand(OpNum).getImm();
836 O << MAI->getPrivateGlobalPrefix() << "PC" << Id;
839 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum) {
841 for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {
842 if (MI->getOperand(i).isImplicit())
844 if ((int)i != OpNum) O << ", ";
850 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNum,
851 const char *Modifier) {
852 assert(Modifier && "This operand only works with a modifier!");
853 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
855 if (!strcmp(Modifier, "label")) {
856 unsigned ID = MI->getOperand(OpNum).getImm();
857 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
858 << '_' << ID << ":\n";
860 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
861 unsigned CPI = MI->getOperand(OpNum).getIndex();
863 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
865 if (MCPE.isMachineConstantPoolEntry()) {
866 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
868 EmitGlobalConstant(MCPE.Val.ConstVal);
873 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum) {
874 assert(!Subtarget->isThumb2() && "Thumb2 should use double-jump jumptables!");
876 const MachineOperand &MO1 = MI->getOperand(OpNum);
877 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
878 unsigned JTI = MO1.getIndex();
879 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
880 << '_' << JTI << '_' << MO2.getImm() << ":\n";
882 const char *JTEntryDirective = MAI->getData32bitsDirective();
884 const MachineFunction *MF = MI->getParent()->getParent();
885 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
886 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
887 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
888 bool UseSet= MAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
889 SmallPtrSet<MachineBasicBlock*, 8> JTSets;
890 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
891 MachineBasicBlock *MBB = JTBBs[i];
892 bool isNew = JTSets.insert(MBB);
895 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
897 O << JTEntryDirective << ' ';
899 O << MAI->getPrivateGlobalPrefix() << getFunctionNumber()
900 << '_' << JTI << '_' << MO2.getImm()
901 << "_set_" << MBB->getNumber();
902 else if (TM.getRelocationModel() == Reloc::PIC_) {
903 GetMBBSymbol(MBB->getNumber())->print(O, MAI);
904 O << '-' << MAI->getPrivateGlobalPrefix() << "JTI"
905 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
907 GetMBBSymbol(MBB->getNumber())->print(O, MAI);
914 void ARMAsmPrinter::printJT2BlockOperand(const MachineInstr *MI, int OpNum) {
915 const MachineOperand &MO1 = MI->getOperand(OpNum);
916 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
917 unsigned JTI = MO1.getIndex();
918 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
919 << '_' << JTI << '_' << MO2.getImm() << ":\n";
921 const MachineFunction *MF = MI->getParent()->getParent();
922 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
923 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
924 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
925 bool ByteOffset = false, HalfWordOffset = false;
926 if (MI->getOpcode() == ARM::t2TBB)
928 else if (MI->getOpcode() == ARM::t2TBH)
929 HalfWordOffset = true;
931 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
932 MachineBasicBlock *MBB = JTBBs[i];
934 O << MAI->getData8bitsDirective();
935 else if (HalfWordOffset)
936 O << MAI->getData16bitsDirective();
937 if (ByteOffset || HalfWordOffset) {
939 GetMBBSymbol(MBB->getNumber())->print(O, MAI);
940 O << "-" << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
941 << '_' << JTI << '_' << MO2.getImm() << ")/2";
944 GetMBBSymbol(MBB->getNumber())->print(O, MAI);
950 // Make sure the instruction that follows TBB is 2-byte aligned.
951 // FIXME: Constant island pass should insert an "ALIGN" instruction instead.
952 if (ByteOffset && (JTBBs.size() & 1)) {
958 void ARMAsmPrinter::printTBAddrMode(const MachineInstr *MI, int OpNum) {
959 O << "[pc, " << getRegisterName(MI->getOperand(OpNum).getReg());
960 if (MI->getOpcode() == ARM::t2TBH)
965 void ARMAsmPrinter::printNoHashImmediate(const MachineInstr *MI, int OpNum) {
966 O << MI->getOperand(OpNum).getImm();
969 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
970 unsigned AsmVariant, const char *ExtraCode){
971 // Does this asm operand have a single letter operand modifier?
972 if (ExtraCode && ExtraCode[0]) {
973 if (ExtraCode[1] != 0) return true; // Unknown modifier.
975 switch (ExtraCode[0]) {
976 default: return true; // Unknown modifier.
977 case 'a': // Print as a memory address.
978 if (MI->getOperand(OpNum).isReg()) {
979 O << "[" << getRegisterName(MI->getOperand(OpNum).getReg()) << "]";
983 case 'c': // Don't print "#" before an immediate operand.
984 if (!MI->getOperand(OpNum).isImm())
986 printNoHashImmediate(MI, OpNum);
988 case 'P': // Print a VFP double precision register.
989 printOperand(MI, OpNum);
992 if (TM.getTargetData()->isLittleEndian())
996 if (TM.getTargetData()->isBigEndian())
999 case 'H': // Write second word of DI / DF reference.
1000 // Verify that this operand has two consecutive registers.
1001 if (!MI->getOperand(OpNum).isReg() ||
1002 OpNum+1 == MI->getNumOperands() ||
1003 !MI->getOperand(OpNum+1).isReg())
1005 ++OpNum; // Return the high-part.
1009 printOperand(MI, OpNum);
1013 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
1014 unsigned OpNum, unsigned AsmVariant,
1015 const char *ExtraCode) {
1016 if (ExtraCode && ExtraCode[0])
1017 return true; // Unknown modifier.
1018 printAddrMode2Operand(MI, OpNum);
1022 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
1025 int Opc = MI->getOpcode();
1027 case ARM::CONSTPOOL_ENTRY:
1028 if (!InCPMode && AFI->isThumbFunction()) {
1034 if (InCPMode && AFI->isThumbFunction())
1038 // Call the autogenerated instruction printer routines.
1039 processDebugLoc(MI);
1040 printInstruction(MI);
1041 if (VerboseAsm && !MI->getDebugLoc().isUnknown())
1046 void ARMAsmPrinter::EmitStartOfAsmFile(Module &M) {
1047 if (Subtarget->isTargetDarwin()) {
1048 Reloc::Model RelocM = TM.getRelocationModel();
1049 if (RelocM == Reloc::PIC_ || RelocM == Reloc::DynamicNoPIC) {
1050 // Declare all the text sections up front (before the DWARF sections
1051 // emitted by AsmPrinter::doInitialization) so the assembler will keep
1052 // them together at the beginning of the object file. This helps
1053 // avoid out-of-range branches that are due a fundamental limitation of
1054 // the way symbol offsets are encoded with the current Darwin ARM
1056 TargetLoweringObjectFileMachO &TLOFMacho =
1057 static_cast<TargetLoweringObjectFileMachO &>(getObjFileLowering());
1058 OutStreamer.SwitchSection(TLOFMacho.getTextSection());
1059 OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection());
1060 OutStreamer.SwitchSection(TLOFMacho.getConstTextCoalSection());
1061 if (RelocM == Reloc::DynamicNoPIC) {
1062 const MCSection *sect =
1063 TLOFMacho.getMachOSection("__TEXT", "__symbol_stub4",
1064 MCSectionMachO::S_SYMBOL_STUBS,
1065 12, SectionKind::getText());
1066 OutStreamer.SwitchSection(sect);
1068 const MCSection *sect =
1069 TLOFMacho.getMachOSection("__TEXT", "__picsymbolstub4",
1070 MCSectionMachO::S_SYMBOL_STUBS,
1071 16, SectionKind::getText());
1072 OutStreamer.SwitchSection(sect);
1077 // Use unified assembler syntax mode for Thumb.
1078 if (Subtarget->isThumb())
1079 O << "\t.syntax unified\n";
1081 // Emit ARM Build Attributes
1082 if (Subtarget->isTargetELF()) {
1084 std::string CPUString = Subtarget->getCPUString();
1085 if (CPUString != "generic")
1086 O << "\t.cpu " << CPUString << '\n';
1088 // FIXME: Emit FPU type
1089 if (Subtarget->hasVFP2())
1090 O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ", 2\n";
1092 // Signal various FP modes.
1094 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal << ", 1\n"
1095 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions << ", 1\n";
1097 if (FiniteOnlyFPMath())
1098 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
1100 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
1102 // 8-bytes alignment stuff.
1103 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n"
1104 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
1106 // Hard float. Use both S and D registers and conform to AAPCS-VFP.
1107 if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard)
1108 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_HardFP_use << ", 3\n"
1109 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_VFP_args << ", 1\n";
1111 // FIXME: Should we signal R9 usage?
1115 void ARMAsmPrinter::PrintGlobalVariable(const GlobalVariable* GVar) {
1116 const TargetData *TD = TM.getTargetData();
1118 if (!GVar->hasInitializer()) // External global require no code
1121 // Check to see if this is a special global used by LLVM, if so, emit it.
1123 if (EmitSpecialLLVMGlobal(GVar)) {
1124 if (Subtarget->isTargetDarwin() &&
1125 TM.getRelocationModel() == Reloc::Static) {
1126 if (GVar->getName() == "llvm.global_ctors")
1127 O << ".reference .constructors_used\n";
1128 else if (GVar->getName() == "llvm.global_dtors")
1129 O << ".reference .destructors_used\n";
1134 std::string name = Mang->getMangledName(GVar);
1135 Constant *C = GVar->getInitializer();
1136 const Type *Type = C->getType();
1137 unsigned Size = TD->getTypeAllocSize(Type);
1138 unsigned Align = TD->getPreferredAlignmentLog(GVar);
1139 bool isDarwin = Subtarget->isTargetDarwin();
1141 printVisibility(name, GVar->getVisibility());
1143 if (Subtarget->isTargetELF())
1144 O << "\t.type " << name << ",%object\n";
1146 const MCSection *TheSection =
1147 getObjFileLowering().SectionForGlobal(GVar, Mang, TM);
1148 OutStreamer.SwitchSection(TheSection);
1150 // FIXME: get this stuff from section kind flags.
1151 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal() &&
1152 // Don't put things that should go in the cstring section into "comm".
1153 !TheSection->getKind().isMergeableCString()) {
1154 if (GVar->hasExternalLinkage()) {
1155 if (const char *Directive = MAI->getZeroFillDirective()) {
1156 O << "\t.globl\t" << name << "\n";
1157 O << Directive << "__DATA, __common, " << name << ", "
1158 << Size << ", " << Align << "\n";
1163 if (GVar->hasLocalLinkage() || GVar->isWeakForLinker()) {
1164 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
1167 if (GVar->hasLocalLinkage()) {
1168 O << MAI->getLCOMMDirective() << name << "," << Size
1170 } else if (GVar->hasCommonLinkage()) {
1171 O << MAI->getCOMMDirective() << name << "," << Size
1174 OutStreamer.SwitchSection(TheSection);
1175 O << "\t.globl " << name << '\n'
1176 << MAI->getWeakDefDirective() << name << '\n';
1177 EmitAlignment(Align, GVar);
1180 O << "\t\t\t\t" << MAI->getCommentString() << ' ';
1181 WriteAsOperand(O, GVar, /*PrintType=*/false, GVar->getParent());
1184 EmitGlobalConstant(C);
1187 } else if (MAI->getLCOMMDirective() != NULL) {
1188 if (GVar->hasLocalLinkage()) {
1189 O << MAI->getLCOMMDirective() << name << "," << Size;
1191 O << MAI->getCOMMDirective() << name << "," << Size;
1192 if (MAI->getCOMMDirectiveTakesAlignment())
1193 O << ',' << (MAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1196 if (GVar->hasLocalLinkage())
1197 O << "\t.local\t" << name << "\n";
1198 O << MAI->getCOMMDirective() << name << "," << Size;
1199 if (MAI->getCOMMDirectiveTakesAlignment())
1200 O << "," << (MAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1203 O << "\t\t" << MAI->getCommentString() << " ";
1204 WriteAsOperand(O, GVar, /*PrintType=*/false, GVar->getParent());
1211 switch (GVar->getLinkage()) {
1212 case GlobalValue::CommonLinkage:
1213 case GlobalValue::LinkOnceAnyLinkage:
1214 case GlobalValue::LinkOnceODRLinkage:
1215 case GlobalValue::WeakAnyLinkage:
1216 case GlobalValue::WeakODRLinkage:
1217 case GlobalValue::LinkerPrivateLinkage:
1219 O << "\t.globl " << name << "\n"
1220 << "\t.weak_definition " << name << "\n";
1222 O << "\t.weak " << name << "\n";
1225 case GlobalValue::AppendingLinkage:
1226 // FIXME: appending linkage variables should go into a section of
1227 // their name or something. For now, just emit them as external.
1228 case GlobalValue::ExternalLinkage:
1229 O << "\t.globl " << name << "\n";
1231 case GlobalValue::PrivateLinkage:
1232 case GlobalValue::InternalLinkage:
1235 llvm_unreachable("Unknown linkage type!");
1238 EmitAlignment(Align, GVar);
1241 O << "\t\t\t\t" << MAI->getCommentString() << " ";
1242 WriteAsOperand(O, GVar, /*PrintType=*/false, GVar->getParent());
1245 if (MAI->hasDotTypeDotSizeDirective())
1246 O << "\t.size " << name << ", " << Size << "\n";
1248 EmitGlobalConstant(C);
1253 bool ARMAsmPrinter::doFinalization(Module &M) {
1254 if (Subtarget->isTargetDarwin()) {
1255 // All darwin targets use mach-o.
1256 TargetLoweringObjectFileMachO &TLOFMacho =
1257 static_cast<TargetLoweringObjectFileMachO &>(getObjFileLowering());
1261 // Output non-lazy-pointers for external and common global variables.
1262 if (!GVNonLazyPtrs.empty()) {
1263 // Switch with ".non_lazy_symbol_pointer" directive.
1264 OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
1266 for (StringMap<std::string>::iterator I = GVNonLazyPtrs.begin(),
1267 E = GVNonLazyPtrs.end(); I != E; ++I) {
1268 O << I->second << ":\n";
1269 O << "\t.indirect_symbol " << I->getKeyData() << "\n";
1270 O << "\t.long\t0\n";
1274 if (!HiddenGVNonLazyPtrs.empty()) {
1275 OutStreamer.SwitchSection(getObjFileLowering().getDataSection());
1277 for (StringMap<std::string>::iterator I = HiddenGVNonLazyPtrs.begin(),
1278 E = HiddenGVNonLazyPtrs.end(); I != E; ++I) {
1279 O << I->second << ":\n";
1280 O << "\t.long " << I->getKeyData() << "\n";
1284 // Funny Darwin hack: This flag tells the linker that no global symbols
1285 // contain code that falls through to other global symbols (e.g. the obvious
1286 // implementation of multiple entry points). If this doesn't occur, the
1287 // linker can safely perform dead code stripping. Since LLVM never
1288 // generates code that does this, it is always safe to set.
1289 O << "\t.subsections_via_symbols\n";
1292 return AsmPrinter::doFinalization(M);
1295 // Force static initialization.
1296 extern "C" void LLVMInitializeARMAsmPrinter() {
1297 RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget);
1298 RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget);