1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMBuildAttrs.h"
18 #include "ARMTargetMachine.h"
19 #include "ARMAddressingModes.h"
20 #include "ARMConstantPoolValue.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "llvm/Constants.h"
23 #include "llvm/Module.h"
24 #include "llvm/CodeGen/AsmPrinter.h"
25 #include "llvm/CodeGen/DwarfWriter.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/CodeGen/MachineFunctionPass.h"
28 #include "llvm/CodeGen/MachineJumpTableInfo.h"
29 #include "llvm/Target/TargetAsmInfo.h"
30 #include "llvm/Target/TargetData.h"
31 #include "llvm/Target/TargetMachine.h"
32 #include "llvm/Target/TargetOptions.h"
33 #include "llvm/ADT/Statistic.h"
34 #include "llvm/ADT/StringExtras.h"
35 #include "llvm/ADT/StringSet.h"
36 #include "llvm/Support/Compiler.h"
37 #include "llvm/Support/Mangler.h"
38 #include "llvm/Support/MathExtras.h"
39 #include "llvm/Support/raw_ostream.h"
43 STATISTIC(EmittedInsts, "Number of machine instrs printed");
46 class VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
49 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
50 /// make the right decision when printing asm code for different targets.
51 const ARMSubtarget *Subtarget;
53 /// AFI - Keep a pointer to ARMFunctionInfo for the current
57 /// MCP - Keep a pointer to constantpool entries of the current
59 const MachineConstantPool *MCP;
61 /// We name each basic block in a Function with a unique number, so
62 /// that we can consistently refer to them later. This is cleared
63 /// at the beginning of each call to runOnMachineFunction().
65 typedef std::map<const Value *, unsigned> ValueMapTy;
66 ValueMapTy NumberForBB;
68 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
69 /// non-lazy-pointers for indirect access.
70 StringSet<> GVNonLazyPtrs;
72 /// HiddenGVNonLazyPtrs - Keeps the set of GlobalValues with hidden
73 /// visibility that require non-lazy-pointers for indirect access.
74 StringSet<> HiddenGVNonLazyPtrs;
76 /// FnStubs - Keeps the set of external function GlobalAddresses that the
77 /// asm printer should generate stubs for.
80 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
83 explicit ARMAsmPrinter(raw_ostream &O, TargetMachine &TM,
84 const TargetAsmInfo *T, CodeGenOpt::Level OL,
86 : AsmPrinter(O, TM, T, OL, V), DW(0), AFI(NULL), MCP(NULL),
88 Subtarget = &TM.getSubtarget<ARMSubtarget>();
91 virtual const char *getPassName() const {
92 return "ARM Assembly Printer";
95 void printOperand(const MachineInstr *MI, int opNum,
96 const char *Modifier = 0);
97 void printSOImmOperand(const MachineInstr *MI, int opNum);
98 void printSOImm2PartOperand(const MachineInstr *MI, int opNum);
99 void printSOOperand(const MachineInstr *MI, int OpNum);
100 void printSORegOperand(const MachineInstr *MI, int opNum);
101 void printAddrMode2Operand(const MachineInstr *MI, int OpNo);
102 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo);
103 void printAddrMode3Operand(const MachineInstr *MI, int OpNo);
104 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNo);
105 void printAddrMode4Operand(const MachineInstr *MI, int OpNo,
106 const char *Modifier = 0);
107 void printAddrMode5Operand(const MachineInstr *MI, int OpNo,
108 const char *Modifier = 0);
109 void printAddrModePCOperand(const MachineInstr *MI, int OpNo,
110 const char *Modifier = 0);
111 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo);
112 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo,
114 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo);
115 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
116 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
117 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
118 void printPredicateOperand(const MachineInstr *MI, int opNum);
119 void printSBitModifierOperand(const MachineInstr *MI, int opNum);
120 void printPCLabel(const MachineInstr *MI, int opNum);
121 void printRegisterList(const MachineInstr *MI, int opNum);
122 void printCPInstOperand(const MachineInstr *MI, int opNum,
123 const char *Modifier);
124 void printJTBlockOperand(const MachineInstr *MI, int opNum);
126 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
127 unsigned AsmVariant, const char *ExtraCode);
128 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNo,
130 const char *ExtraCode);
132 void printModuleLevelGV(const GlobalVariable* GVar);
133 bool printInstruction(const MachineInstr *MI); // autogenerated.
134 void printMachineInstruction(const MachineInstr *MI);
135 bool runOnMachineFunction(MachineFunction &F);
136 bool doInitialization(Module &M);
137 bool doFinalization(Module &M);
139 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
141 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
142 printDataDirective(MCPV->getType());
144 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
145 GlobalValue *GV = ACPV->getGV();
146 std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
148 Name += ACPV->getSymbol();
149 if (ACPV->isNonLazyPointer()) {
150 if (GV->hasHiddenVisibility())
151 HiddenGVNonLazyPtrs.insert(Name);
153 GVNonLazyPtrs.insert(Name);
154 printSuffixedName(Name, "$non_lazy_ptr");
155 } else if (ACPV->isStub()) {
156 FnStubs.insert(Name);
157 printSuffixedName(Name, "$stub");
160 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
161 if (ACPV->getPCAdjustment() != 0) {
162 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
163 << utostr(ACPV->getLabelId())
164 << "+" << (unsigned)ACPV->getPCAdjustment();
165 if (ACPV->mustAddCurrentAddress())
171 // If the constant pool value is a extern weak symbol, remember to emit
172 // the weak reference.
173 if (GV && GV->hasExternalWeakLinkage())
174 ExtWeakSymbols.insert(GV);
177 void getAnalysisUsage(AnalysisUsage &AU) const {
178 AsmPrinter::getAnalysisUsage(AU);
179 AU.setPreservesAll();
180 AU.addRequired<MachineModuleInfo>();
181 AU.addRequired<DwarfWriter>();
184 } // end of anonymous namespace
186 #include "ARMGenAsmWriter.inc"
188 /// runOnMachineFunction - This uses the printInstruction()
189 /// method to print assembly for each instruction.
191 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
194 AFI = MF.getInfo<ARMFunctionInfo>();
195 MCP = MF.getConstantPool();
197 SetupMachineFunction(MF);
200 // NOTE: we don't print out constant pools here, they are handled as
204 // Print out labels for the function.
205 const Function *F = MF.getFunction();
206 switch (F->getLinkage()) {
207 default: assert(0 && "Unknown linkage type!");
208 case Function::PrivateLinkage:
209 case Function::InternalLinkage:
210 SwitchToTextSection("\t.text", F);
212 case Function::ExternalLinkage:
213 SwitchToTextSection("\t.text", F);
214 O << "\t.globl\t" << CurrentFnName << "\n";
216 case Function::WeakAnyLinkage:
217 case Function::WeakODRLinkage:
218 case Function::LinkOnceAnyLinkage:
219 case Function::LinkOnceODRLinkage:
220 if (Subtarget->isTargetDarwin()) {
222 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
223 O << "\t.globl\t" << CurrentFnName << "\n";
224 O << "\t.weak_definition\t" << CurrentFnName << "\n";
226 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
231 printVisibility(CurrentFnName, F->getVisibility());
233 if (AFI->isThumbFunction()) {
234 EmitAlignment(1, F, AFI->getAlign());
235 O << "\t.code\t16\n";
236 O << "\t.thumb_func";
237 if (Subtarget->isTargetDarwin())
238 O << "\t" << CurrentFnName;
244 O << CurrentFnName << ":\n";
245 // Emit pre-function debug information.
246 DW->BeginFunction(&MF);
248 if (Subtarget->isTargetDarwin()) {
249 // If the function is empty, then we need to emit *something*. Otherwise,
250 // the function's label might be associated with something that it wasn't
251 // meant to be associated with. We emit a noop in this situation.
252 MachineFunction::iterator I = MF.begin();
254 if (++I == MF.end() && MF.front().empty())
258 // Print out code for the function.
259 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
261 // Print a label for the basic block.
262 if (I != MF.begin()) {
263 printBasicBlockLabel(I, true, true, VerboseAsm);
266 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
268 // Print the assembly for the instruction.
269 printMachineInstruction(II);
273 if (TAI->hasDotTypeDotSizeDirective())
274 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
276 // Emit post-function debug information.
277 DW->EndFunction(&MF);
284 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
285 const char *Modifier) {
286 const MachineOperand &MO = MI->getOperand(opNum);
287 switch (MO.getType()) {
288 case MachineOperand::MO_Register: {
289 unsigned Reg = MO.getReg();
290 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
291 if (Modifier && strcmp(Modifier, "dregpair") == 0) {
292 unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0
293 unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1
295 << TRI->getAsmName(DRegLo) << "-" << TRI->getAsmName(DRegHi)
298 O << TRI->getAsmName(Reg);
301 assert(0 && "not implemented");
304 case MachineOperand::MO_Immediate: {
305 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
311 case MachineOperand::MO_MachineBasicBlock:
312 printBasicBlockLabel(MO.getMBB());
314 case MachineOperand::MO_GlobalAddress: {
315 bool isCallOp = Modifier && !strcmp(Modifier, "call");
316 GlobalValue *GV = MO.getGlobal();
317 std::string Name = Mang->getValueName(GV);
318 bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
319 GV->hasLinkOnceLinkage());
320 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
321 TM.getRelocationModel() != Reloc::Static) {
322 printSuffixedName(Name, "$stub");
323 FnStubs.insert(Name);
327 printOffset(MO.getOffset());
329 if (isCallOp && Subtarget->isTargetELF() &&
330 TM.getRelocationModel() == Reloc::PIC_)
332 if (GV->hasExternalWeakLinkage())
333 ExtWeakSymbols.insert(GV);
336 case MachineOperand::MO_ExternalSymbol: {
337 bool isCallOp = Modifier && !strcmp(Modifier, "call");
338 std::string Name(TAI->getGlobalPrefix());
339 Name += MO.getSymbolName();
340 if (isCallOp && Subtarget->isTargetDarwin() &&
341 TM.getRelocationModel() != Reloc::Static) {
342 printSuffixedName(Name, "$stub");
343 FnStubs.insert(Name);
346 if (isCallOp && Subtarget->isTargetELF() &&
347 TM.getRelocationModel() == Reloc::PIC_)
351 case MachineOperand::MO_ConstantPoolIndex:
352 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
353 << '_' << MO.getIndex();
355 case MachineOperand::MO_JumpTableIndex:
356 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
357 << '_' << MO.getIndex();
360 O << "<unknown operand type>"; abort (); break;
364 static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
365 const TargetAsmInfo *TAI) {
366 assert(V < (1 << 12) && "Not a valid so_imm value!");
367 unsigned Imm = ARM_AM::getSOImmValImm(V);
368 unsigned Rot = ARM_AM::getSOImmValRot(V);
370 // Print low-level immediate formation info, per
371 // A5.1.3: "Data-processing operands - Immediate".
373 O << "#" << Imm << ", " << Rot;
374 // Pretty printed version.
376 O << ' ' << TAI->getCommentString()
377 << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
383 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
384 /// immediate in bits 0-7.
385 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
386 const MachineOperand &MO = MI->getOperand(OpNum);
387 assert(MO.isImm() && "Not a valid so_imm value!");
388 printSOImm(O, MO.getImm(), VerboseAsm, TAI);
391 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
392 /// followed by an 'orr' to materialize.
393 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
394 const MachineOperand &MO = MI->getOperand(OpNum);
395 assert(MO.isImm() && "Not a valid so_imm value!");
396 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
397 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
398 printSOImm(O, ARM_AM::getSOImmVal(V1), VerboseAsm, TAI);
400 printPredicateOperand(MI, 2);
406 printSOImm(O, ARM_AM::getSOImmVal(V2), VerboseAsm, TAI);
409 // Constant shifts so_reg is a 3-operand unit corresponding to register forms of
410 // the A5.1 "Addressing Mode 1 - Data-processing operands" forms. This
413 // REG IMM, SH_OPC - e.g. R5, LSL #3
414 void ARMAsmPrinter::printSOOperand(const MachineInstr *MI, int OpNum) {
415 const MachineOperand &MO1 = MI->getOperand(OpNum);
416 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
418 unsigned Reg = MO1.getReg();
419 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
420 O << TM.getRegisterInfo()->getAsmName(Reg);
422 // Print the shift opc.
424 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
427 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
428 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
431 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
432 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
434 // REG REG 0,SH_OPC - e.g. R5, ROR R3
435 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
436 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
437 const MachineOperand &MO1 = MI->getOperand(Op);
438 const MachineOperand &MO2 = MI->getOperand(Op+1);
439 const MachineOperand &MO3 = MI->getOperand(Op+2);
441 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
442 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
444 // Print the shift opc.
446 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
450 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
451 O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
452 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
454 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
458 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
459 const MachineOperand &MO1 = MI->getOperand(Op);
460 const MachineOperand &MO2 = MI->getOperand(Op+1);
461 const MachineOperand &MO3 = MI->getOperand(Op+2);
463 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
464 printOperand(MI, Op);
468 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
471 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
473 << (char)ARM_AM::getAM2Op(MO3.getImm())
474 << ARM_AM::getAM2Offset(MO3.getImm());
480 << (char)ARM_AM::getAM2Op(MO3.getImm())
481 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
483 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
485 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
490 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
491 const MachineOperand &MO1 = MI->getOperand(Op);
492 const MachineOperand &MO2 = MI->getOperand(Op+1);
495 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
496 assert(ImmOffs && "Malformed indexed load / store!");
498 << (char)ARM_AM::getAM2Op(MO2.getImm())
503 O << (char)ARM_AM::getAM2Op(MO2.getImm())
504 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
506 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
508 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
512 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
513 const MachineOperand &MO1 = MI->getOperand(Op);
514 const MachineOperand &MO2 = MI->getOperand(Op+1);
515 const MachineOperand &MO3 = MI->getOperand(Op+2);
517 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
518 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
522 << (char)ARM_AM::getAM3Op(MO3.getImm())
523 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName
528 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
530 << (char)ARM_AM::getAM3Op(MO3.getImm())
535 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
536 const MachineOperand &MO1 = MI->getOperand(Op);
537 const MachineOperand &MO2 = MI->getOperand(Op+1);
540 O << (char)ARM_AM::getAM3Op(MO2.getImm())
541 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
545 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
546 assert(ImmOffs && "Malformed indexed load / store!");
548 << (char)ARM_AM::getAM3Op(MO2.getImm())
552 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
553 const char *Modifier) {
554 const MachineOperand &MO1 = MI->getOperand(Op);
555 const MachineOperand &MO2 = MI->getOperand(Op+1);
556 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
557 if (Modifier && strcmp(Modifier, "submode") == 0) {
558 if (MO1.getReg() == ARM::SP) {
559 bool isLDM = (MI->getOpcode() == ARM::LDM ||
560 MI->getOpcode() == ARM::LDM_RET);
561 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
563 O << ARM_AM::getAMSubModeStr(Mode);
565 printOperand(MI, Op);
566 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
571 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
572 const char *Modifier) {
573 const MachineOperand &MO1 = MI->getOperand(Op);
574 const MachineOperand &MO2 = MI->getOperand(Op+1);
576 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
577 printOperand(MI, Op);
581 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
583 if (Modifier && strcmp(Modifier, "submode") == 0) {
584 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
585 if (MO1.getReg() == ARM::SP) {
586 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
587 MI->getOpcode() == ARM::FLDMS);
588 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
590 O << ARM_AM::getAMSubModeStr(Mode);
592 } else if (Modifier && strcmp(Modifier, "base") == 0) {
593 // Used for FSTM{D|S} and LSTM{D|S} operations.
594 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
595 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
600 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
602 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
604 << (char)ARM_AM::getAM5Op(MO2.getImm())
610 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
611 const char *Modifier) {
612 if (Modifier && strcmp(Modifier, "label") == 0) {
613 printPCLabel(MI, Op+1);
617 const MachineOperand &MO1 = MI->getOperand(Op);
618 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
619 O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]";
623 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
624 const MachineOperand &MO1 = MI->getOperand(Op);
625 const MachineOperand &MO2 = MI->getOperand(Op+1);
626 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
627 O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]";
631 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
633 const MachineOperand &MO1 = MI->getOperand(Op);
634 const MachineOperand &MO2 = MI->getOperand(Op+1);
635 const MachineOperand &MO3 = MI->getOperand(Op+2);
637 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
638 printOperand(MI, Op);
642 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
644 O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName;
645 else if (unsigned ImmOffs = MO2.getImm()) {
646 O << ", #" << ImmOffs;
654 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
655 printThumbAddrModeRI5Operand(MI, Op, 1);
658 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
659 printThumbAddrModeRI5Operand(MI, Op, 2);
662 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
663 printThumbAddrModeRI5Operand(MI, Op, 4);
666 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
667 const MachineOperand &MO1 = MI->getOperand(Op);
668 const MachineOperand &MO2 = MI->getOperand(Op+1);
669 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
670 if (unsigned ImmOffs = MO2.getImm())
671 O << ", #" << ImmOffs << " * 4";
675 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) {
676 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(opNum).getImm();
678 O << ARMCondCodeToString(CC);
681 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int opNum){
682 unsigned Reg = MI->getOperand(opNum).getReg();
684 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
689 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) {
690 int Id = (int)MI->getOperand(opNum).getImm();
691 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
694 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int opNum) {
696 for (unsigned i = opNum, e = MI->getNumOperands(); i != e; ++i) {
698 if (i != e-1) O << ", ";
703 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNo,
704 const char *Modifier) {
705 assert(Modifier && "This operand only works with a modifier!");
706 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
708 if (!strcmp(Modifier, "label")) {
709 unsigned ID = MI->getOperand(OpNo).getImm();
710 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
711 << '_' << ID << ":\n";
713 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
714 unsigned CPI = MI->getOperand(OpNo).getIndex();
716 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
718 if (MCPE.isMachineConstantPoolEntry()) {
719 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
721 EmitGlobalConstant(MCPE.Val.ConstVal);
722 // remember to emit the weak reference
723 if (const GlobalValue *GV = dyn_cast<GlobalValue>(MCPE.Val.ConstVal))
724 if (GV->hasExternalWeakLinkage())
725 ExtWeakSymbols.insert(GV);
730 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) {
731 const MachineOperand &MO1 = MI->getOperand(OpNo);
732 const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id
733 unsigned JTI = MO1.getIndex();
734 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
735 << '_' << JTI << '_' << MO2.getImm() << ":\n";
737 const char *JTEntryDirective = TAI->getJumpTableDirective();
738 if (!JTEntryDirective)
739 JTEntryDirective = TAI->getData32bitsDirective();
741 const MachineFunction *MF = MI->getParent()->getParent();
742 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
743 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
744 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
745 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
746 std::set<MachineBasicBlock*> JTSets;
747 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
748 MachineBasicBlock *MBB = JTBBs[i];
749 if (UseSet && JTSets.insert(MBB).second)
750 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
752 O << JTEntryDirective << ' ';
754 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
755 << '_' << JTI << '_' << MO2.getImm()
756 << "_set_" << MBB->getNumber();
757 else if (TM.getRelocationModel() == Reloc::PIC_) {
758 printBasicBlockLabel(MBB, false, false, false);
759 // If the arch uses custom Jump Table directives, don't calc relative to JT
760 if (!TAI->getJumpTableDirective())
761 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
762 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
764 printBasicBlockLabel(MBB, false, false, false);
771 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
772 unsigned AsmVariant, const char *ExtraCode){
773 // Does this asm operand have a single letter operand modifier?
774 if (ExtraCode && ExtraCode[0]) {
775 if (ExtraCode[1] != 0) return true; // Unknown modifier.
777 switch (ExtraCode[0]) {
778 default: return true; // Unknown modifier.
779 case 'a': // Don't print "#" before a global var name or constant.
780 case 'c': // Don't print "$" before a global var name or constant.
781 printOperand(MI, OpNo, "no_hash");
783 case 'P': // Print a VFP double precision register.
784 printOperand(MI, OpNo);
787 if (TM.getTargetData()->isLittleEndian())
791 if (TM.getTargetData()->isBigEndian())
794 case 'H': // Write second word of DI / DF reference.
795 // Verify that this operand has two consecutive registers.
796 if (!MI->getOperand(OpNo).isReg() ||
797 OpNo+1 == MI->getNumOperands() ||
798 !MI->getOperand(OpNo+1).isReg())
800 ++OpNo; // Return the high-part.
804 printOperand(MI, OpNo);
808 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
809 unsigned OpNo, unsigned AsmVariant,
810 const char *ExtraCode) {
811 if (ExtraCode && ExtraCode[0])
812 return true; // Unknown modifier.
813 printAddrMode2Operand(MI, OpNo);
817 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
820 int Opc = MI->getOpcode();
822 case ARM::CONSTPOOL_ENTRY:
823 if (!InCPMode && AFI->isThumbFunction()) {
829 if (InCPMode && AFI->isThumbFunction())
833 // Call the autogenerated instruction printer routines.
834 printInstruction(MI);
837 bool ARMAsmPrinter::doInitialization(Module &M) {
839 bool Result = AsmPrinter::doInitialization(M);
840 DW = getAnalysisIfAvailable<DwarfWriter>();
842 // Thumb-2 instructions are supported only in unified assembler syntax mode.
843 if (Subtarget->hasThumb2())
844 O << "\t.syntax unified\n";
846 // Emit ARM Build Attributes
847 if (Subtarget->isTargetELF()) {
849 std::string CPUString = Subtarget->getCPUString();
850 if (CPUString != "generic")
851 O << "\t.cpu " << CPUString << '\n';
853 // FIXME: Emit FPU type
854 if (Subtarget->hasVFP2())
855 O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ", 2\n";
857 // Signal various FP modes.
859 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal << ", 1\n"
860 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions << ", 1\n";
862 if (FiniteOnlyFPMath())
863 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
865 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
867 // 8-bytes alignment stuff.
868 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n"
869 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
871 // FIXME: Should we signal R9 usage?
877 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
878 /// Don't print things like \\n or \\0.
879 static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
880 for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
886 void ARMAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
887 const TargetData *TD = TM.getTargetData();
889 if (!GVar->hasInitializer()) // External global require no code
892 // Check to see if this is a special global used by LLVM, if so, emit it.
894 if (EmitSpecialLLVMGlobal(GVar)) {
895 if (Subtarget->isTargetDarwin() &&
896 TM.getRelocationModel() == Reloc::Static) {
897 if (GVar->getName() == "llvm.global_ctors")
898 O << ".reference .constructors_used\n";
899 else if (GVar->getName() == "llvm.global_dtors")
900 O << ".reference .destructors_used\n";
905 std::string name = Mang->getValueName(GVar);
906 Constant *C = GVar->getInitializer();
907 const Type *Type = C->getType();
908 unsigned Size = TD->getTypeAllocSize(Type);
909 unsigned Align = TD->getPreferredAlignmentLog(GVar);
910 bool isDarwin = Subtarget->isTargetDarwin();
912 printVisibility(name, GVar->getVisibility());
914 if (Subtarget->isTargetELF())
915 O << "\t.type " << name << ",%object\n";
917 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal() &&
919 TAI->SectionKindForGlobal(GVar) == SectionKind::RODataMergeStr)) {
920 // FIXME: This seems to be pretty darwin-specific
922 if (GVar->hasExternalLinkage()) {
923 SwitchToSection(TAI->SectionForGlobal(GVar));
924 if (const char *Directive = TAI->getZeroFillDirective()) {
925 O << "\t.globl\t" << name << "\n";
926 O << Directive << "__DATA, __common, " << name << ", "
927 << Size << ", " << Align << "\n";
932 if (GVar->hasLocalLinkage() || GVar->isWeakForLinker()) {
933 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
936 if (GVar->hasLocalLinkage()) {
937 O << TAI->getLCOMMDirective() << name << "," << Size
939 } else if (GVar->hasCommonLinkage()) {
940 O << TAI->getCOMMDirective() << name << "," << Size
943 SwitchToSection(TAI->SectionForGlobal(GVar));
944 O << "\t.globl " << name << '\n'
945 << TAI->getWeakDefDirective() << name << '\n';
946 EmitAlignment(Align, GVar);
949 O << "\t\t\t\t" << TAI->getCommentString() << ' ';
950 PrintUnmangledNameSafely(GVar, O);
953 EmitGlobalConstant(C);
956 } else if (TAI->getLCOMMDirective() != NULL) {
957 if (GVar->hasLocalLinkage()) {
958 O << TAI->getLCOMMDirective() << name << "," << Size;
960 O << TAI->getCOMMDirective() << name << "," << Size;
961 if (TAI->getCOMMDirectiveTakesAlignment())
962 O << ',' << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
965 SwitchToSection(TAI->SectionForGlobal(GVar));
966 if (GVar->hasLocalLinkage())
967 O << "\t.local\t" << name << "\n";
968 O << TAI->getCOMMDirective() << name << "," << Size;
969 if (TAI->getCOMMDirectiveTakesAlignment())
970 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
973 O << "\t\t" << TAI->getCommentString() << " ";
974 PrintUnmangledNameSafely(GVar, O);
981 SwitchToSection(TAI->SectionForGlobal(GVar));
982 switch (GVar->getLinkage()) {
983 case GlobalValue::CommonLinkage:
984 case GlobalValue::LinkOnceAnyLinkage:
985 case GlobalValue::LinkOnceODRLinkage:
986 case GlobalValue::WeakAnyLinkage:
987 case GlobalValue::WeakODRLinkage:
989 O << "\t.globl " << name << "\n"
990 << "\t.weak_definition " << name << "\n";
992 O << "\t.weak " << name << "\n";
995 case GlobalValue::AppendingLinkage:
996 // FIXME: appending linkage variables should go into a section of
997 // their name or something. For now, just emit them as external.
998 case GlobalValue::ExternalLinkage:
999 O << "\t.globl " << name << "\n";
1001 case GlobalValue::PrivateLinkage:
1002 case GlobalValue::InternalLinkage:
1005 assert(0 && "Unknown linkage type!");
1009 EmitAlignment(Align, GVar);
1012 O << "\t\t\t\t" << TAI->getCommentString() << " ";
1013 PrintUnmangledNameSafely(GVar, O);
1016 if (TAI->hasDotTypeDotSizeDirective())
1017 O << "\t.size " << name << ", " << Size << "\n";
1019 // If the initializer is a extern weak symbol, remember to emit the weak
1021 if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
1022 if (GV->hasExternalWeakLinkage())
1023 ExtWeakSymbols.insert(GV);
1025 EmitGlobalConstant(C);
1030 bool ARMAsmPrinter::doFinalization(Module &M) {
1031 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
1033 printModuleLevelGV(I);
1035 if (Subtarget->isTargetDarwin()) {
1036 SwitchToDataSection("");
1038 // Output stubs for dynamically-linked functions
1039 for (StringSet<>::iterator i = FnStubs.begin(), e = FnStubs.end();
1041 if (TM.getRelocationModel() == Reloc::PIC_)
1042 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
1045 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
1049 O << "\t.code\t32\n";
1051 const char *p = i->getKeyData();
1052 printSuffixedName(p, "$stub");
1054 O << "\t.indirect_symbol " << p << "\n";
1056 printSuffixedName(p, "$slp");
1058 if (TM.getRelocationModel() == Reloc::PIC_) {
1059 printSuffixedName(p, "$scv");
1061 O << "\tadd ip, pc, ip\n";
1063 O << "\tldr pc, [ip, #0]\n";
1064 printSuffixedName(p, "$slp");
1067 printSuffixedName(p, "$lazy_ptr");
1068 if (TM.getRelocationModel() == Reloc::PIC_) {
1070 printSuffixedName(p, "$scv");
1074 SwitchToDataSection(".lazy_symbol_pointer", 0);
1075 printSuffixedName(p, "$lazy_ptr");
1077 O << "\t.indirect_symbol " << p << "\n";
1078 O << "\t.long\tdyld_stub_binding_helper\n";
1082 // Output non-lazy-pointers for external and common global variables.
1083 if (!GVNonLazyPtrs.empty()) {
1084 SwitchToDataSection("\t.non_lazy_symbol_pointer", 0);
1085 for (StringSet<>::iterator i = GVNonLazyPtrs.begin(),
1086 e = GVNonLazyPtrs.end(); i != e; ++i) {
1087 const char *p = i->getKeyData();
1088 printSuffixedName(p, "$non_lazy_ptr");
1090 O << "\t.indirect_symbol " << p << "\n";
1091 O << "\t.long\t0\n";
1095 if (!HiddenGVNonLazyPtrs.empty()) {
1096 SwitchToSection(TAI->getDataSection());
1097 for (StringSet<>::iterator i = HiddenGVNonLazyPtrs.begin(),
1098 e = HiddenGVNonLazyPtrs.end(); i != e; ++i) {
1099 const char *p = i->getKeyData();
1101 printSuffixedName(p, "$non_lazy_ptr");
1103 O << "\t.long " << p << "\n";
1108 // Emit initial debug information.
1111 // Funny Darwin hack: This flag tells the linker that no global symbols
1112 // contain code that falls through to other global symbols (e.g. the obvious
1113 // implementation of multiple entry points). If this doesn't occur, the
1114 // linker can safely perform dead code stripping. Since LLVM never
1115 // generates code that does this, it is always safe to set.
1116 O << "\t.subsections_via_symbols\n";
1118 // Emit final debug information for ELF.
1122 return AsmPrinter::doFinalization(M);
1125 /// createARMCodePrinterPass - Returns a pass that prints the ARM
1126 /// assembly code for a MachineFunction to the given output stream,
1127 /// using the given target machine description. This should work
1128 /// regardless of whether the function is in SSA form.
1130 FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
1131 ARMTargetMachine &tm,
1132 CodeGenOpt::Level OptLevel,
1134 return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), OptLevel, verbose);
1138 static struct Register {
1140 ARMTargetMachine::registerAsmPrinter(createARMCodePrinterPass);
1145 // Force static initialization when called from
1146 // llvm/InitializeAllAsmPrinters.h
1148 void InitializeARMAsmPrinter() { }