1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMBuildAttrs.h"
18 #include "ARMTargetMachine.h"
19 #include "ARMAddressingModes.h"
20 #include "ARMConstantPoolValue.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "llvm/Constants.h"
23 #include "llvm/Module.h"
24 #include "llvm/MDNode.h"
25 #include "llvm/CodeGen/AsmPrinter.h"
26 #include "llvm/CodeGen/DwarfWriter.h"
27 #include "llvm/CodeGen/MachineModuleInfo.h"
28 #include "llvm/CodeGen/MachineFunctionPass.h"
29 #include "llvm/CodeGen/MachineJumpTableInfo.h"
30 #include "llvm/Target/TargetAsmInfo.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Target/TargetOptions.h"
34 #include "llvm/Target/TargetRegistry.h"
35 #include "llvm/ADT/SmallPtrSet.h"
36 #include "llvm/ADT/Statistic.h"
37 #include "llvm/ADT/StringExtras.h"
38 #include "llvm/ADT/StringSet.h"
39 #include "llvm/Support/Compiler.h"
40 #include "llvm/Support/ErrorHandling.h"
41 #include "llvm/Support/Mangler.h"
42 #include "llvm/Support/MathExtras.h"
43 #include "llvm/Support/FormattedStream.h"
47 STATISTIC(EmittedInsts, "Number of machine instrs printed");
50 class VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
53 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
54 /// make the right decision when printing asm code for different targets.
55 const ARMSubtarget *Subtarget;
57 /// AFI - Keep a pointer to ARMFunctionInfo for the current
61 /// MCP - Keep a pointer to constantpool entries of the current
63 const MachineConstantPool *MCP;
65 /// We name each basic block in a Function with a unique number, so
66 /// that we can consistently refer to them later. This is cleared
67 /// at the beginning of each call to runOnMachineFunction().
69 typedef std::map<const Value *, unsigned> ValueMapTy;
70 ValueMapTy NumberForBB;
72 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
73 /// non-lazy-pointers for indirect access.
74 StringMap<std::string> GVNonLazyPtrs;
76 /// HiddenGVNonLazyPtrs - Keeps the set of GlobalValues with hidden
77 /// visibility that require non-lazy-pointers for indirect access.
78 StringMap<std::string> HiddenGVNonLazyPtrs;
81 std::string Stub, LazyPtr, SLP, SCV;
85 void Init(const GlobalValue *GV, Mangler *Mang) {
86 // Already initialized.
87 if (!Stub.empty()) return;
88 Stub = Mang->getMangledName(GV, "$stub", true);
89 LazyPtr = Mang->getMangledName(GV, "$lazy_ptr", true);
90 SLP = Mang->getMangledName(GV, "$slp", true);
91 SCV = Mang->getMangledName(GV, "$scv", true);
94 void Init(const std::string &GV, Mangler *Mang) {
95 // Already initialized.
96 if (!Stub.empty()) return;
97 Stub = Mang->makeNameProper(GV + "$stub", Mangler::Private);
98 LazyPtr = Mang->makeNameProper(GV + "$lazy_ptr", Mangler::Private);
99 SLP = Mang->makeNameProper(GV + "$slp", Mangler::Private);
100 SCV = Mang->makeNameProper(GV + "$scv", Mangler::Private);
104 /// FnStubs - Keeps the set of external function GlobalAddresses that the
105 /// asm printer should generate stubs for.
106 StringMap<FnStubInfo> FnStubs;
108 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
111 explicit ARMAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
112 const TargetAsmInfo *T, bool V)
113 : AsmPrinter(O, TM, T, V), DW(0), AFI(NULL), MCP(NULL),
115 Subtarget = &TM.getSubtarget<ARMSubtarget>();
118 virtual const char *getPassName() const {
119 return "ARM Assembly Printer";
122 void printOperand(const MachineInstr *MI, int OpNum,
123 const char *Modifier = 0);
124 void printSOImmOperand(const MachineInstr *MI, int OpNum);
125 void printSOImm2PartOperand(const MachineInstr *MI, int OpNum);
126 void printSORegOperand(const MachineInstr *MI, int OpNum);
127 void printAddrMode2Operand(const MachineInstr *MI, int OpNum);
128 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum);
129 void printAddrMode3Operand(const MachineInstr *MI, int OpNum);
130 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum);
131 void printAddrMode4Operand(const MachineInstr *MI, int OpNum,
132 const char *Modifier = 0);
133 void printAddrMode5Operand(const MachineInstr *MI, int OpNum,
134 const char *Modifier = 0);
135 void printAddrMode6Operand(const MachineInstr *MI, int OpNum);
136 void printAddrModePCOperand(const MachineInstr *MI, int OpNum,
137 const char *Modifier = 0);
138 void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum);
140 void printThumbITMask(const MachineInstr *MI, int OpNum);
141 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum);
142 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
144 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum);
145 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum);
146 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum);
147 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum);
149 void printT2SOOperand(const MachineInstr *MI, int OpNum);
150 void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum);
151 void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum);
152 void printT2AddrModeImm8s4Operand(const MachineInstr *MI, int OpNum);
153 void printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, int OpNum);
154 void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum);
156 void printPredicateOperand(const MachineInstr *MI, int OpNum);
157 void printSBitModifierOperand(const MachineInstr *MI, int OpNum);
158 void printPCLabel(const MachineInstr *MI, int OpNum);
159 void printRegisterList(const MachineInstr *MI, int OpNum);
160 void printCPInstOperand(const MachineInstr *MI, int OpNum,
161 const char *Modifier);
162 void printJTBlockOperand(const MachineInstr *MI, int OpNum);
163 void printJT2BlockOperand(const MachineInstr *MI, int OpNum);
165 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
166 unsigned AsmVariant, const char *ExtraCode);
167 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
169 const char *ExtraCode);
171 void PrintGlobalVariable(const GlobalVariable* GVar);
172 bool printInstruction(const MachineInstr *MI); // autogenerated.
173 void printMachineInstruction(const MachineInstr *MI);
174 bool runOnMachineFunction(MachineFunction &F);
175 bool doInitialization(Module &M);
176 bool doFinalization(Module &M);
178 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
180 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
181 printDataDirective(MCPV->getType());
183 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
184 GlobalValue *GV = ACPV->getGV();
188 if (ACPV->isNonLazyPointer()) {
189 std::string SymName = Mang->getMangledName(GV);
190 Name = Mang->getMangledName(GV, "$non_lazy_ptr", true);
192 if (GV->hasHiddenVisibility())
193 HiddenGVNonLazyPtrs[SymName] = Name;
195 GVNonLazyPtrs[SymName] = Name;
196 } else if (ACPV->isStub()) {
198 FnStubInfo &FnInfo = FnStubs[Mang->getMangledName(GV)];
199 FnInfo.Init(GV, Mang);
202 FnStubInfo &FnInfo = FnStubs[Mang->makeNameProper(ACPV->getSymbol())];
203 FnInfo.Init(ACPV->getSymbol(), Mang);
208 Name = Mang->getMangledName(GV);
210 Name = Mang->makeNameProper(ACPV->getSymbol());
216 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
217 if (ACPV->getPCAdjustment() != 0) {
218 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
219 << utostr(ACPV->getLabelId())
220 << "+" << (unsigned)ACPV->getPCAdjustment();
221 if (ACPV->mustAddCurrentAddress())
228 void getAnalysisUsage(AnalysisUsage &AU) const {
229 AsmPrinter::getAnalysisUsage(AU);
230 AU.setPreservesAll();
231 AU.addRequired<MachineModuleInfo>();
232 AU.addRequired<DwarfWriter>();
235 } // end of anonymous namespace
237 #include "ARMGenAsmWriter.inc"
239 /// runOnMachineFunction - This uses the printInstruction()
240 /// method to print assembly for each instruction.
242 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
245 AFI = MF.getInfo<ARMFunctionInfo>();
246 MCP = MF.getConstantPool();
248 SetupMachineFunction(MF);
251 // NOTE: we don't print out constant pools here, they are handled as
255 // Print out labels for the function.
256 const Function *F = MF.getFunction();
257 switch (F->getLinkage()) {
258 default: llvm_unreachable("Unknown linkage type!");
259 case Function::PrivateLinkage:
260 case Function::LinkerPrivateLinkage:
261 case Function::InternalLinkage:
262 SwitchToTextSection("\t.text", F);
264 case Function::ExternalLinkage:
265 SwitchToTextSection("\t.text", F);
266 O << "\t.globl\t" << CurrentFnName << "\n";
268 case Function::WeakAnyLinkage:
269 case Function::WeakODRLinkage:
270 case Function::LinkOnceAnyLinkage:
271 case Function::LinkOnceODRLinkage:
272 if (Subtarget->isTargetDarwin()) {
274 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
275 O << "\t.globl\t" << CurrentFnName << "\n";
276 O << "\t.weak_definition\t" << CurrentFnName << "\n";
278 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
283 printVisibility(CurrentFnName, F->getVisibility());
285 if (AFI->isThumbFunction()) {
286 EmitAlignment(MF.getAlignment(), F, AFI->getAlign());
287 O << "\t.code\t16\n";
288 O << "\t.thumb_func";
289 if (Subtarget->isTargetDarwin())
290 O << "\t" << CurrentFnName;
294 EmitAlignment(MF.getAlignment(), F);
297 O << CurrentFnName << ":\n";
298 // Emit pre-function debug information.
299 DW->BeginFunction(&MF);
301 if (Subtarget->isTargetDarwin()) {
302 // If the function is empty, then we need to emit *something*. Otherwise,
303 // the function's label might be associated with something that it wasn't
304 // meant to be associated with. We emit a noop in this situation.
305 MachineFunction::iterator I = MF.begin();
307 if (++I == MF.end() && MF.front().empty())
311 // Print out code for the function.
312 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
314 // Print a label for the basic block.
315 if (I != MF.begin()) {
316 printBasicBlockLabel(I, true, true, VerboseAsm);
319 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
321 // Print the assembly for the instruction.
322 printMachineInstruction(II);
326 if (TAI->hasDotTypeDotSizeDirective())
327 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
329 // Emit post-function debug information.
330 DW->EndFunction(&MF);
337 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
338 const char *Modifier) {
339 const MachineOperand &MO = MI->getOperand(OpNum);
340 switch (MO.getType()) {
341 case MachineOperand::MO_Register: {
342 unsigned Reg = MO.getReg();
343 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
344 if (Modifier && strcmp(Modifier, "dregpair") == 0) {
345 unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0
346 unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1
348 << TRI->getAsmName(DRegLo) << ',' << TRI->getAsmName(DRegHi)
350 } else if (Modifier && strcmp(Modifier, "dregsingle") == 0) {
351 O << '{' << TRI->getAsmName(Reg) << '}';
353 O << TRI->getAsmName(Reg);
356 llvm_unreachable("not implemented");
359 case MachineOperand::MO_Immediate: {
360 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
366 case MachineOperand::MO_MachineBasicBlock:
367 printBasicBlockLabel(MO.getMBB());
369 case MachineOperand::MO_GlobalAddress: {
370 bool isCallOp = Modifier && !strcmp(Modifier, "call");
371 GlobalValue *GV = MO.getGlobal();
373 bool isExt = GV->isDeclaration() || GV->isWeakForLinker();
374 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
375 TM.getRelocationModel() != Reloc::Static) {
376 FnStubInfo &FnInfo = FnStubs[Mang->getMangledName(GV)];
377 FnInfo.Init(GV, Mang);
380 Name = Mang->getMangledName(GV);
385 printOffset(MO.getOffset());
387 if (isCallOp && Subtarget->isTargetELF() &&
388 TM.getRelocationModel() == Reloc::PIC_)
392 case MachineOperand::MO_ExternalSymbol: {
393 bool isCallOp = Modifier && !strcmp(Modifier, "call");
395 if (isCallOp && Subtarget->isTargetDarwin() &&
396 TM.getRelocationModel() != Reloc::Static) {
397 FnStubInfo &FnInfo = FnStubs[Mang->makeNameProper(MO.getSymbolName())];
398 FnInfo.Init(MO.getSymbolName(), Mang);
401 Name = Mang->makeNameProper(MO.getSymbolName());
404 if (isCallOp && Subtarget->isTargetELF() &&
405 TM.getRelocationModel() == Reloc::PIC_)
409 case MachineOperand::MO_ConstantPoolIndex:
410 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
411 << '_' << MO.getIndex();
413 case MachineOperand::MO_JumpTableIndex:
414 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
415 << '_' << MO.getIndex();
418 O << "<unknown operand type>"; abort (); break;
422 static void printSOImm(formatted_raw_ostream &O, int64_t V, bool VerboseAsm,
423 const TargetAsmInfo *TAI) {
424 // Break it up into two parts that make up a shifter immediate.
425 V = ARM_AM::getSOImmVal(V);
426 assert(V != -1 && "Not a valid so_imm value!");
428 unsigned Imm = ARM_AM::getSOImmValImm(V);
429 unsigned Rot = ARM_AM::getSOImmValRot(V);
431 // Print low-level immediate formation info, per
432 // A5.1.3: "Data-processing operands - Immediate".
434 O << "#" << Imm << ", " << Rot;
435 // Pretty printed version.
437 O << ' ' << TAI->getCommentString()
438 << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
444 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
445 /// immediate in bits 0-7.
446 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
447 const MachineOperand &MO = MI->getOperand(OpNum);
448 assert(MO.isImm() && "Not a valid so_imm value!");
449 printSOImm(O, MO.getImm(), VerboseAsm, TAI);
452 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
453 /// followed by an 'orr' to materialize.
454 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
455 const MachineOperand &MO = MI->getOperand(OpNum);
456 assert(MO.isImm() && "Not a valid so_imm value!");
457 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
458 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
459 printSOImm(O, V1, VerboseAsm, TAI);
461 printPredicateOperand(MI, 2);
467 printSOImm(O, V2, VerboseAsm, TAI);
470 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
471 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
473 // REG REG 0,SH_OPC - e.g. R5, ROR R3
474 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
475 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
476 const MachineOperand &MO1 = MI->getOperand(Op);
477 const MachineOperand &MO2 = MI->getOperand(Op+1);
478 const MachineOperand &MO3 = MI->getOperand(Op+2);
480 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
481 O << TRI->getAsmName(MO1.getReg());
483 // Print the shift opc.
485 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
489 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
490 O << TRI->getAsmName(MO2.getReg());
491 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
493 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
497 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
498 const MachineOperand &MO1 = MI->getOperand(Op);
499 const MachineOperand &MO2 = MI->getOperand(Op+1);
500 const MachineOperand &MO3 = MI->getOperand(Op+2);
502 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
503 printOperand(MI, Op);
507 O << "[" << TRI->getAsmName(MO1.getReg());
510 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
512 << (char)ARM_AM::getAM2Op(MO3.getImm())
513 << ARM_AM::getAM2Offset(MO3.getImm());
519 << (char)ARM_AM::getAM2Op(MO3.getImm())
520 << TRI->getAsmName(MO2.getReg());
522 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
524 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
529 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
530 const MachineOperand &MO1 = MI->getOperand(Op);
531 const MachineOperand &MO2 = MI->getOperand(Op+1);
534 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
535 assert(ImmOffs && "Malformed indexed load / store!");
537 << (char)ARM_AM::getAM2Op(MO2.getImm())
542 O << (char)ARM_AM::getAM2Op(MO2.getImm())
543 << TRI->getAsmName(MO1.getReg());
545 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
547 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
551 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
552 const MachineOperand &MO1 = MI->getOperand(Op);
553 const MachineOperand &MO2 = MI->getOperand(Op+1);
554 const MachineOperand &MO3 = MI->getOperand(Op+2);
556 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
557 O << "[" << TRI->getAsmName(MO1.getReg());
561 << (char)ARM_AM::getAM3Op(MO3.getImm())
562 << TRI->getAsmName(MO2.getReg())
567 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
569 << (char)ARM_AM::getAM3Op(MO3.getImm())
574 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
575 const MachineOperand &MO1 = MI->getOperand(Op);
576 const MachineOperand &MO2 = MI->getOperand(Op+1);
579 O << (char)ARM_AM::getAM3Op(MO2.getImm())
580 << TRI->getAsmName(MO1.getReg());
584 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
585 assert(ImmOffs && "Malformed indexed load / store!");
587 << (char)ARM_AM::getAM3Op(MO2.getImm())
591 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
592 const char *Modifier) {
593 const MachineOperand &MO1 = MI->getOperand(Op);
594 const MachineOperand &MO2 = MI->getOperand(Op+1);
595 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
596 if (Modifier && strcmp(Modifier, "submode") == 0) {
597 if (MO1.getReg() == ARM::SP) {
598 bool isLDM = (MI->getOpcode() == ARM::LDM ||
599 MI->getOpcode() == ARM::LDM_RET);
600 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
602 O << ARM_AM::getAMSubModeStr(Mode);
604 printOperand(MI, Op);
605 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
610 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
611 const char *Modifier) {
612 const MachineOperand &MO1 = MI->getOperand(Op);
613 const MachineOperand &MO2 = MI->getOperand(Op+1);
615 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
616 printOperand(MI, Op);
620 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
622 if (Modifier && strcmp(Modifier, "submode") == 0) {
623 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
624 if (MO1.getReg() == ARM::SP) {
625 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
626 MI->getOpcode() == ARM::FLDMS);
627 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
629 O << ARM_AM::getAMSubModeStr(Mode);
631 } else if (Modifier && strcmp(Modifier, "base") == 0) {
632 // Used for FSTM{D|S} and LSTM{D|S} operations.
633 O << TRI->getAsmName(MO1.getReg());
634 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
639 O << "[" << TRI->getAsmName(MO1.getReg());
641 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
643 << (char)ARM_AM::getAM5Op(MO2.getImm())
649 void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op) {
650 const MachineOperand &MO1 = MI->getOperand(Op);
651 const MachineOperand &MO2 = MI->getOperand(Op+1);
652 const MachineOperand &MO3 = MI->getOperand(Op+2);
654 // FIXME: No support yet for specifying alignment.
655 O << "[" << TRI->getAsmName(MO1.getReg()) << "]";
657 if (ARM_AM::getAM6WBFlag(MO3.getImm())) {
658 if (MO2.getReg() == 0)
661 O << ", " << TRI->getAsmName(MO2.getReg());
665 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
666 const char *Modifier) {
667 if (Modifier && strcmp(Modifier, "label") == 0) {
668 printPCLabel(MI, Op+1);
672 const MachineOperand &MO1 = MI->getOperand(Op);
673 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
674 O << "[pc, +" << TRI->getAsmName(MO1.getReg()) << "]";
678 ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) {
679 const MachineOperand &MO = MI->getOperand(Op);
680 uint32_t v = ~MO.getImm();
681 int32_t lsb = CountTrailingZeros_32(v);
682 int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
683 assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
684 O << "#" << lsb << ", #" << width;
687 //===--------------------------------------------------------------------===//
690 ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op) {
691 // (3 - the number of trailing zeros) is the number of then / else.
692 unsigned Mask = MI->getOperand(Op).getImm();
693 unsigned NumTZ = CountTrailingZeros_32(Mask);
694 assert(NumTZ <= 3 && "Invalid IT mask!");
695 for (unsigned Pos = 3, e = NumTZ; Pos > e; --Pos) {
696 bool T = (Mask & (1 << Pos)) != 0;
705 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
706 const MachineOperand &MO1 = MI->getOperand(Op);
707 const MachineOperand &MO2 = MI->getOperand(Op+1);
708 O << "[" << TRI->getAsmName(MO1.getReg());
709 O << ", " << TRI->getAsmName(MO2.getReg()) << "]";
713 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
715 const MachineOperand &MO1 = MI->getOperand(Op);
716 const MachineOperand &MO2 = MI->getOperand(Op+1);
717 const MachineOperand &MO3 = MI->getOperand(Op+2);
719 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
720 printOperand(MI, Op);
724 O << "[" << TRI->getAsmName(MO1.getReg());
726 O << ", " << TRI->getAsmName(MO3.getReg());
727 else if (unsigned ImmOffs = MO2.getImm()) {
728 O << ", #" << ImmOffs;
736 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
737 printThumbAddrModeRI5Operand(MI, Op, 1);
740 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
741 printThumbAddrModeRI5Operand(MI, Op, 2);
744 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
745 printThumbAddrModeRI5Operand(MI, Op, 4);
748 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
749 const MachineOperand &MO1 = MI->getOperand(Op);
750 const MachineOperand &MO2 = MI->getOperand(Op+1);
751 O << "[" << TRI->getAsmName(MO1.getReg());
752 if (unsigned ImmOffs = MO2.getImm())
753 O << ", #" << ImmOffs << " * 4";
757 //===--------------------------------------------------------------------===//
759 // Constant shifts t2_so_reg is a 2-operand unit corresponding to the Thumb2
760 // register with shift forms.
762 // REG IMM, SH_OPC - e.g. R5, LSL #3
763 void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum) {
764 const MachineOperand &MO1 = MI->getOperand(OpNum);
765 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
767 unsigned Reg = MO1.getReg();
768 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
769 O << TRI->getAsmName(Reg);
771 // Print the shift opc.
773 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
776 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
777 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
780 void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI,
782 const MachineOperand &MO1 = MI->getOperand(OpNum);
783 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
785 O << "[" << TRI->getAsmName(MO1.getReg());
787 unsigned OffImm = MO2.getImm();
788 if (OffImm) // Don't print +0.
789 O << ", #+" << OffImm;
793 void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI,
795 const MachineOperand &MO1 = MI->getOperand(OpNum);
796 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
798 O << "[" << TRI->getAsmName(MO1.getReg());
800 int32_t OffImm = (int32_t)MO2.getImm();
803 O << ", #-" << -OffImm;
805 O << ", #+" << OffImm;
809 void ARMAsmPrinter::printT2AddrModeImm8s4Operand(const MachineInstr *MI,
811 const MachineOperand &MO1 = MI->getOperand(OpNum);
812 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
814 O << "[" << TRI->getAsmName(MO1.getReg());
816 int32_t OffImm = (int32_t)MO2.getImm() / 4;
819 O << ", #-" << -OffImm << " * 4";
821 O << ", #+" << OffImm << " * 4";
825 void ARMAsmPrinter::printT2AddrModeImm8OffsetOperand(const MachineInstr *MI,
827 const MachineOperand &MO1 = MI->getOperand(OpNum);
828 int32_t OffImm = (int32_t)MO1.getImm();
831 O << "#-" << -OffImm;
836 void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI,
838 const MachineOperand &MO1 = MI->getOperand(OpNum);
839 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
840 const MachineOperand &MO3 = MI->getOperand(OpNum+2);
842 O << "[" << TRI->getAsmName(MO1.getReg());
845 O << ", +" << TRI->getAsmName(MO2.getReg());
847 unsigned ShAmt = MO3.getImm();
849 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!");
850 O << ", lsl #" << ShAmt;
857 //===--------------------------------------------------------------------===//
859 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum) {
860 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
862 O << ARMCondCodeToString(CC);
865 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum){
866 unsigned Reg = MI->getOperand(OpNum).getReg();
868 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
873 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum) {
874 int Id = (int)MI->getOperand(OpNum).getImm();
875 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
878 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum) {
880 for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {
882 if (i != e-1) O << ", ";
887 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNum,
888 const char *Modifier) {
889 assert(Modifier && "This operand only works with a modifier!");
890 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
892 if (!strcmp(Modifier, "label")) {
893 unsigned ID = MI->getOperand(OpNum).getImm();
894 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
895 << '_' << ID << ":\n";
897 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
898 unsigned CPI = MI->getOperand(OpNum).getIndex();
900 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
902 if (MCPE.isMachineConstantPoolEntry()) {
903 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
905 EmitGlobalConstant(MCPE.Val.ConstVal);
910 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum) {
911 assert(!Subtarget->isThumb2() && "Thumb2 should use double-jump jumptables!");
913 const MachineOperand &MO1 = MI->getOperand(OpNum);
914 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
915 unsigned JTI = MO1.getIndex();
916 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
917 << '_' << JTI << '_' << MO2.getImm() << ":\n";
919 const char *JTEntryDirective = TAI->getJumpTableDirective();
920 if (!JTEntryDirective)
921 JTEntryDirective = TAI->getData32bitsDirective();
923 const MachineFunction *MF = MI->getParent()->getParent();
924 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
925 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
926 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
927 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
928 SmallPtrSet<MachineBasicBlock*, 8> JTSets;
929 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
930 MachineBasicBlock *MBB = JTBBs[i];
931 bool isNew = JTSets.insert(MBB);
934 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
936 O << JTEntryDirective << ' ';
938 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
939 << '_' << JTI << '_' << MO2.getImm()
940 << "_set_" << MBB->getNumber();
941 else if (TM.getRelocationModel() == Reloc::PIC_) {
942 printBasicBlockLabel(MBB, false, false, false);
943 // If the arch uses custom Jump Table directives, don't calc relative to JT
944 if (!TAI->getJumpTableDirective())
945 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
946 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
948 printBasicBlockLabel(MBB, false, false, false);
955 void ARMAsmPrinter::printJT2BlockOperand(const MachineInstr *MI, int OpNum) {
956 const MachineOperand &MO1 = MI->getOperand(OpNum);
957 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
958 unsigned JTI = MO1.getIndex();
959 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
960 << '_' << JTI << '_' << MO2.getImm() << ":\n";
962 const MachineFunction *MF = MI->getParent()->getParent();
963 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
964 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
965 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
966 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
967 MachineBasicBlock *MBB = JTBBs[i];
969 printBasicBlockLabel(MBB, false, false, false);
976 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
977 unsigned AsmVariant, const char *ExtraCode){
978 // Does this asm operand have a single letter operand modifier?
979 if (ExtraCode && ExtraCode[0]) {
980 if (ExtraCode[1] != 0) return true; // Unknown modifier.
982 switch (ExtraCode[0]) {
983 default: return true; // Unknown modifier.
984 case 'a': // Print as a memory address.
985 if (MI->getOperand(OpNum).isReg()) {
986 O << "[" << TRI->getAsmName(MI->getOperand(OpNum).getReg()) << "]";
990 case 'c': // Don't print "#" before an immediate operand.
991 printOperand(MI, OpNum, "no_hash");
993 case 'P': // Print a VFP double precision register.
994 printOperand(MI, OpNum);
997 if (TM.getTargetData()->isLittleEndian())
1001 if (TM.getTargetData()->isBigEndian())
1004 case 'H': // Write second word of DI / DF reference.
1005 // Verify that this operand has two consecutive registers.
1006 if (!MI->getOperand(OpNum).isReg() ||
1007 OpNum+1 == MI->getNumOperands() ||
1008 !MI->getOperand(OpNum+1).isReg())
1010 ++OpNum; // Return the high-part.
1014 printOperand(MI, OpNum);
1018 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
1019 unsigned OpNum, unsigned AsmVariant,
1020 const char *ExtraCode) {
1021 if (ExtraCode && ExtraCode[0])
1022 return true; // Unknown modifier.
1023 printAddrMode2Operand(MI, OpNum);
1027 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
1030 int Opc = MI->getOpcode();
1032 case ARM::CONSTPOOL_ENTRY:
1033 if (!InCPMode && AFI->isThumbFunction()) {
1039 if (InCPMode && AFI->isThumbFunction())
1043 // Call the autogenerated instruction printer routines.
1044 printInstruction(MI);
1047 bool ARMAsmPrinter::doInitialization(Module &M) {
1049 bool Result = AsmPrinter::doInitialization(M);
1050 DW = getAnalysisIfAvailable<DwarfWriter>();
1052 // Use unified assembler syntax mode for Thumb.
1053 if (Subtarget->isThumb())
1054 O << "\t.syntax unified\n";
1056 // Emit ARM Build Attributes
1057 if (Subtarget->isTargetELF()) {
1059 std::string CPUString = Subtarget->getCPUString();
1060 if (CPUString != "generic")
1061 O << "\t.cpu " << CPUString << '\n';
1063 // FIXME: Emit FPU type
1064 if (Subtarget->hasVFP2())
1065 O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ", 2\n";
1067 // Signal various FP modes.
1069 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal << ", 1\n"
1070 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions << ", 1\n";
1072 if (FiniteOnlyFPMath())
1073 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
1075 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
1077 // 8-bytes alignment stuff.
1078 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n"
1079 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
1081 // FIXME: Should we signal R9 usage?
1087 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
1088 /// Don't print things like \\n or \\0.
1089 static void PrintUnmangledNameSafely(const Value *V,
1090 formatted_raw_ostream &OS) {
1091 for (StringRef::iterator it = V->getName().begin(),
1092 ie = V->getName().end(); it != ie; ++it)
1097 void ARMAsmPrinter::PrintGlobalVariable(const GlobalVariable* GVar) {
1098 const TargetData *TD = TM.getTargetData();
1100 if (!GVar->hasInitializer()) // External global require no code
1103 // Check to see if this is a special global used by LLVM, if so, emit it.
1105 if (EmitSpecialLLVMGlobal(GVar)) {
1106 if (Subtarget->isTargetDarwin() &&
1107 TM.getRelocationModel() == Reloc::Static) {
1108 if (GVar->getName() == "llvm.global_ctors")
1109 O << ".reference .constructors_used\n";
1110 else if (GVar->getName() == "llvm.global_dtors")
1111 O << ".reference .destructors_used\n";
1116 std::string name = Mang->getMangledName(GVar);
1117 Constant *C = GVar->getInitializer();
1118 if (isa<MDNode>(C) || isa<MDString>(C))
1120 const Type *Type = C->getType();
1121 unsigned Size = TD->getTypeAllocSize(Type);
1122 unsigned Align = TD->getPreferredAlignmentLog(GVar);
1123 bool isDarwin = Subtarget->isTargetDarwin();
1125 printVisibility(name, GVar->getVisibility());
1127 if (Subtarget->isTargetELF())
1128 O << "\t.type " << name << ",%object\n";
1130 const Section *TheSection = TAI->SectionForGlobal(GVar);
1131 SwitchToSection(TheSection);
1133 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal() &&
1134 // Don't put things that should go in the cstring section into "comm".
1135 !TheSection->hasFlag(SectionFlags::Strings)) {
1136 if (GVar->hasExternalLinkage()) {
1137 if (const char *Directive = TAI->getZeroFillDirective()) {
1138 O << "\t.globl\t" << name << "\n";
1139 O << Directive << "__DATA, __common, " << name << ", "
1140 << Size << ", " << Align << "\n";
1145 if (GVar->hasLocalLinkage() || GVar->isWeakForLinker()) {
1146 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
1149 if (GVar->hasLocalLinkage()) {
1150 O << TAI->getLCOMMDirective() << name << "," << Size
1152 } else if (GVar->hasCommonLinkage()) {
1153 O << TAI->getCOMMDirective() << name << "," << Size
1156 SwitchToSection(TAI->SectionForGlobal(GVar));
1157 O << "\t.globl " << name << '\n'
1158 << TAI->getWeakDefDirective() << name << '\n';
1159 EmitAlignment(Align, GVar);
1162 O << "\t\t\t\t" << TAI->getCommentString() << ' ';
1163 PrintUnmangledNameSafely(GVar, O);
1166 EmitGlobalConstant(C);
1169 } else if (TAI->getLCOMMDirective() != NULL) {
1170 if (GVar->hasLocalLinkage()) {
1171 O << TAI->getLCOMMDirective() << name << "," << Size;
1173 O << TAI->getCOMMDirective() << name << "," << Size;
1174 if (TAI->getCOMMDirectiveTakesAlignment())
1175 O << ',' << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1178 if (GVar->hasLocalLinkage())
1179 O << "\t.local\t" << name << "\n";
1180 O << TAI->getCOMMDirective() << name << "," << Size;
1181 if (TAI->getCOMMDirectiveTakesAlignment())
1182 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1185 O << "\t\t" << TAI->getCommentString() << " ";
1186 PrintUnmangledNameSafely(GVar, O);
1193 switch (GVar->getLinkage()) {
1194 case GlobalValue::CommonLinkage:
1195 case GlobalValue::LinkOnceAnyLinkage:
1196 case GlobalValue::LinkOnceODRLinkage:
1197 case GlobalValue::WeakAnyLinkage:
1198 case GlobalValue::WeakODRLinkage:
1200 O << "\t.globl " << name << "\n"
1201 << "\t.weak_definition " << name << "\n";
1203 O << "\t.weak " << name << "\n";
1206 case GlobalValue::AppendingLinkage:
1207 // FIXME: appending linkage variables should go into a section of
1208 // their name or something. For now, just emit them as external.
1209 case GlobalValue::ExternalLinkage:
1210 O << "\t.globl " << name << "\n";
1212 case GlobalValue::PrivateLinkage:
1213 case GlobalValue::LinkerPrivateLinkage:
1214 case GlobalValue::InternalLinkage:
1217 llvm_unreachable("Unknown linkage type!");
1220 EmitAlignment(Align, GVar);
1223 O << "\t\t\t\t" << TAI->getCommentString() << " ";
1224 PrintUnmangledNameSafely(GVar, O);
1227 if (TAI->hasDotTypeDotSizeDirective())
1228 O << "\t.size " << name << ", " << Size << "\n";
1230 EmitGlobalConstant(C);
1235 bool ARMAsmPrinter::doFinalization(Module &M) {
1236 if (Subtarget->isTargetDarwin()) {
1237 SwitchToDataSection("");
1240 // Output stubs for dynamically-linked functions
1241 for (StringMap<FnStubInfo>::iterator I = FnStubs.begin(), E = FnStubs.end();
1243 const FnStubInfo &Info = I->second;
1244 if (TM.getRelocationModel() == Reloc::PIC_)
1245 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
1248 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
1252 O << "\t.code\t32\n";
1254 O << Info.Stub << ":\n";
1255 O << "\t.indirect_symbol " << I->getKeyData() << '\n';
1256 O << "\tldr ip, " << Info.SLP << '\n';
1257 if (TM.getRelocationModel() == Reloc::PIC_) {
1258 O << Info.SCV << ":\n";
1259 O << "\tadd ip, pc, ip\n";
1261 O << "\tldr pc, [ip, #0]\n";
1262 O << Info.SLP << ":\n";
1263 O << "\t.long\t" << Info.LazyPtr;
1264 if (TM.getRelocationModel() == Reloc::PIC_)
1265 O << "-(" << Info.SCV << "+8)";
1268 SwitchToDataSection(".lazy_symbol_pointer", 0);
1269 O << Info.LazyPtr << ":\n";
1270 O << "\t.indirect_symbol " << I->getKeyData() << "\n";
1271 O << "\t.long\tdyld_stub_binding_helper\n";
1275 // Output non-lazy-pointers for external and common global variables.
1276 if (!GVNonLazyPtrs.empty()) {
1277 SwitchToDataSection("\t.non_lazy_symbol_pointer", 0);
1278 for (StringMap<std::string>::iterator I = GVNonLazyPtrs.begin(),
1279 E = GVNonLazyPtrs.end(); I != E; ++I) {
1280 O << I->second << ":\n";
1281 O << "\t.indirect_symbol " << I->getKeyData() << "\n";
1282 O << "\t.long\t0\n";
1286 if (!HiddenGVNonLazyPtrs.empty()) {
1287 SwitchToSection(TAI->getDataSection());
1288 for (StringMap<std::string>::iterator I = HiddenGVNonLazyPtrs.begin(),
1289 E = HiddenGVNonLazyPtrs.end(); I != E; ++I) {
1291 O << I->second << ":\n";
1292 O << "\t.long " << I->getKeyData() << "\n";
1297 // Funny Darwin hack: This flag tells the linker that no global symbols
1298 // contain code that falls through to other global symbols (e.g. the obvious
1299 // implementation of multiple entry points). If this doesn't occur, the
1300 // linker can safely perform dead code stripping. Since LLVM never
1301 // generates code that does this, it is always safe to set.
1302 O << "\t.subsections_via_symbols\n";
1305 return AsmPrinter::doFinalization(M);
1308 // Force static initialization.
1309 extern "C" void LLVMInitializeARMAsmPrinter() {
1310 RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget);
1311 RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget);