1 //===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMBuildAttrs.h"
18 #include "ARMAddressingModes.h"
19 #include "ARMConstantPoolValue.h"
20 #include "ARMInstPrinter.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "ARMMCInstLower.h"
23 #include "ARMTargetMachine.h"
24 #include "llvm/Constants.h"
25 #include "llvm/Module.h"
26 #include "llvm/Type.h"
27 #include "llvm/Assembly/Writer.h"
28 #include "llvm/CodeGen/AsmPrinter.h"
29 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
30 #include "llvm/CodeGen/MachineFunctionPass.h"
31 #include "llvm/CodeGen/MachineJumpTableInfo.h"
32 #include "llvm/CodeGen/TargetLoweringObjectFileImpl.h"
33 #include "llvm/MC/MCAsmInfo.h"
34 #include "llvm/MC/MCContext.h"
35 #include "llvm/MC/MCExpr.h"
36 #include "llvm/MC/MCInst.h"
37 #include "llvm/MC/MCSectionMachO.h"
38 #include "llvm/MC/MCStreamer.h"
39 #include "llvm/MC/MCSymbol.h"
40 #include "llvm/Target/Mangler.h"
41 #include "llvm/Target/TargetData.h"
42 #include "llvm/Target/TargetMachine.h"
43 #include "llvm/Target/TargetOptions.h"
44 #include "llvm/Target/TargetRegistry.h"
45 #include "llvm/ADT/SmallPtrSet.h"
46 #include "llvm/ADT/SmallString.h"
47 #include "llvm/ADT/StringExtras.h"
48 #include "llvm/Support/CommandLine.h"
49 #include "llvm/Support/ErrorHandling.h"
50 #include "llvm/Support/raw_ostream.h"
55 EnableMCInst("enable-arm-mcinst-printer", cl::Hidden,
56 cl::desc("enable experimental asmprinter gunk in the arm backend"));
59 class ARMAsmPrinter : public AsmPrinter {
61 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
62 /// make the right decision when printing asm code for different targets.
63 const ARMSubtarget *Subtarget;
65 /// AFI - Keep a pointer to ARMFunctionInfo for the current
69 /// MCP - Keep a pointer to constantpool entries of the current
71 const MachineConstantPool *MCP;
74 explicit ARMAsmPrinter(TargetMachine &TM, MCStreamer &Streamer)
75 : AsmPrinter(TM, Streamer), AFI(NULL), MCP(NULL) {
76 Subtarget = &TM.getSubtarget<ARMSubtarget>();
79 virtual const char *getPassName() const {
80 return "ARM Assembly Printer";
83 void printInstructionThroughMCStreamer(const MachineInstr *MI);
86 void printOperand(const MachineInstr *MI, int OpNum, raw_ostream &O,
87 const char *Modifier = 0);
88 void printSOImmOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
89 void printSOImm2PartOperand(const MachineInstr *MI, int OpNum,
91 void printSORegOperand(const MachineInstr *MI, int OpNum,
93 void printAddrMode2Operand(const MachineInstr *MI, int OpNum,
95 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum,
97 void printAddrMode3Operand(const MachineInstr *MI, int OpNum,
99 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum,
101 void printAddrMode4Operand(const MachineInstr *MI, int OpNum,raw_ostream &O,
102 const char *Modifier = 0);
103 void printAddrMode5Operand(const MachineInstr *MI, int OpNum,raw_ostream &O,
104 const char *Modifier = 0);
105 void printAddrMode6Operand(const MachineInstr *MI, int OpNum,
107 void printAddrMode6OffsetOperand(const MachineInstr *MI, int OpNum,
109 void printAddrModePCOperand(const MachineInstr *MI, int OpNum,
111 const char *Modifier = 0);
112 void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum,
115 void printThumbS4ImmOperand(const MachineInstr *MI, int OpNum,
117 void printThumbITMask(const MachineInstr *MI, int OpNum, raw_ostream &O);
118 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum,
120 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
123 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum,
125 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum,
127 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum,
129 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum,
132 void printT2SOOperand(const MachineInstr *MI, int OpNum, raw_ostream &O);
133 void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum,
135 void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum,
137 void printT2AddrModeImm8s4Operand(const MachineInstr *MI, int OpNum,
139 void printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, int OpNum,
141 void printT2AddrModeImm8s4OffsetOperand(const MachineInstr *MI, int OpNum,
143 void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum,
146 void printCPSOptionOperand(const MachineInstr *MI, int OpNum,
148 void printMSRMaskOperand(const MachineInstr *MI, int OpNum,
150 void printNegZeroOperand(const MachineInstr *MI, int OpNum,
152 void printPredicateOperand(const MachineInstr *MI, int OpNum,
154 void printMandatoryPredicateOperand(const MachineInstr *MI, int OpNum,
156 void printSBitModifierOperand(const MachineInstr *MI, int OpNum,
158 void printPCLabel(const MachineInstr *MI, int OpNum,
160 void printRegisterList(const MachineInstr *MI, int OpNum,
162 void printCPInstOperand(const MachineInstr *MI, int OpNum,
164 const char *Modifier);
165 void printJTBlockOperand(const MachineInstr *MI, int OpNum,
167 void printJT2BlockOperand(const MachineInstr *MI, int OpNum,
169 void printTBAddrMode(const MachineInstr *MI, int OpNum,
171 void printNoHashImmediate(const MachineInstr *MI, int OpNum,
173 void printVFPf32ImmOperand(const MachineInstr *MI, int OpNum,
175 void printVFPf64ImmOperand(const MachineInstr *MI, int OpNum,
178 void printHex8ImmOperand(const MachineInstr *MI, int OpNum,
180 O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm() & 0xff);
182 void printHex16ImmOperand(const MachineInstr *MI, int OpNum,
184 O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm() & 0xffff);
186 void printHex32ImmOperand(const MachineInstr *MI, int OpNum,
188 O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm() & 0xffffffff);
190 void printHex64ImmOperand(const MachineInstr *MI, int OpNum,
192 O << "#0x" << utohexstr(MI->getOperand(OpNum).getImm());
195 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
196 unsigned AsmVariant, const char *ExtraCode,
198 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
200 const char *ExtraCode, raw_ostream &O);
202 void printInstruction(const MachineInstr *MI, raw_ostream &O); // autogen
203 static const char *getRegisterName(unsigned RegNo);
205 virtual void EmitInstruction(const MachineInstr *MI);
206 bool runOnMachineFunction(MachineFunction &F);
208 virtual void EmitConstantPool() {} // we emit constant pools customly!
209 virtual void EmitFunctionEntryLabel();
210 void EmitStartOfAsmFile(Module &M);
211 void EmitEndOfAsmFile(Module &M);
213 MCSymbol *GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2,
214 const MachineBasicBlock *MBB) const;
215 MCSymbol *GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const;
217 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
219 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
220 SmallString<128> Str;
221 raw_svector_ostream OS(Str);
222 EmitMachineConstantPoolValue(MCPV, OS);
223 OutStreamer.EmitRawText(OS.str());
226 void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV,
228 switch (TM.getTargetData()->getTypeAllocSize(MCPV->getType())) {
229 case 1: O << MAI->getData8bitsDirective(0); break;
230 case 2: O << MAI->getData16bitsDirective(0); break;
231 case 4: O << MAI->getData32bitsDirective(0); break;
232 default: assert(0 && "Unknown CPV size");
235 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
237 if (ACPV->isLSDA()) {
238 O << MAI->getPrivateGlobalPrefix() << "_LSDA_" << getFunctionNumber();
239 } else if (ACPV->isBlockAddress()) {
240 O << *GetBlockAddressSymbol(ACPV->getBlockAddress());
241 } else if (ACPV->isGlobalValue()) {
242 const GlobalValue *GV = ACPV->getGV();
243 bool isIndirect = Subtarget->isTargetDarwin() &&
244 Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel());
246 O << *Mang->getSymbol(GV);
248 // FIXME: Remove this when Darwin transition to @GOT like syntax.
249 MCSymbol *Sym = GetSymbolWithGlobalValueBase(GV, "$non_lazy_ptr");
252 MachineModuleInfoMachO &MMIMachO =
253 MMI->getObjFileInfo<MachineModuleInfoMachO>();
254 MachineModuleInfoImpl::StubValueTy &StubSym =
255 GV->hasHiddenVisibility() ? MMIMachO.getHiddenGVStubEntry(Sym) :
256 MMIMachO.getGVStubEntry(Sym);
257 if (StubSym.getPointer() == 0)
258 StubSym = MachineModuleInfoImpl::
259 StubValueTy(Mang->getSymbol(GV), !GV->hasInternalLinkage());
262 assert(ACPV->isExtSymbol() && "unrecognized constant pool value");
263 O << *GetExternalSymbolSymbol(ACPV->getSymbol());
266 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
267 if (ACPV->getPCAdjustment() != 0) {
268 O << "-(" << MAI->getPrivateGlobalPrefix() << "PC"
269 << getFunctionNumber() << "_" << ACPV->getLabelId()
270 << "+" << (unsigned)ACPV->getPCAdjustment();
271 if (ACPV->mustAddCurrentAddress())
277 } // end of anonymous namespace
279 #include "ARMGenAsmWriter.inc"
281 void ARMAsmPrinter::EmitFunctionEntryLabel() {
282 if (AFI->isThumbFunction()) {
283 OutStreamer.EmitRawText(StringRef("\t.code\t16"));
284 if (!Subtarget->isTargetDarwin())
285 OutStreamer.EmitRawText(StringRef("\t.thumb_func"));
287 // This needs to emit to a temporary string to get properly quoted
288 // MCSymbols when they have spaces in them.
289 SmallString<128> Tmp;
290 raw_svector_ostream OS(Tmp);
291 OS << "\t.thumb_func\t" << *CurrentFnSym;
292 OutStreamer.EmitRawText(OS.str());
296 OutStreamer.EmitLabel(CurrentFnSym);
299 /// runOnMachineFunction - This uses the printInstruction()
300 /// method to print assembly for each instruction.
302 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
303 AFI = MF.getInfo<ARMFunctionInfo>();
304 MCP = MF.getConstantPool();
306 return AsmPrinter::runOnMachineFunction(MF);
309 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
310 raw_ostream &O, const char *Modifier) {
311 const MachineOperand &MO = MI->getOperand(OpNum);
312 unsigned TF = MO.getTargetFlags();
314 switch (MO.getType()) {
316 assert(0 && "<unknown operand type>");
317 case MachineOperand::MO_Register: {
318 unsigned Reg = MO.getReg();
319 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
320 if (Modifier && strcmp(Modifier, "dregpair") == 0) {
321 unsigned DRegLo = TM.getRegisterInfo()->getSubReg(Reg, 5);// arm_dsubreg_0
322 unsigned DRegHi = TM.getRegisterInfo()->getSubReg(Reg, 6);// arm_dsubreg_1
324 << getRegisterName(DRegLo) << ',' << getRegisterName(DRegHi)
326 } else if (Modifier && strcmp(Modifier, "lane") == 0) {
327 unsigned RegNum = ARMRegisterInfo::getRegisterNumbering(Reg);
329 TM.getRegisterInfo()->getMatchingSuperReg(Reg, RegNum & 1 ? 2 : 1,
330 &ARM::DPR_VFP2RegClass);
331 O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']';
333 assert(!MO.getSubReg() && "Subregs should be eliminated!");
334 O << getRegisterName(Reg);
338 case MachineOperand::MO_Immediate: {
339 int64_t Imm = MO.getImm();
341 if ((Modifier && strcmp(Modifier, "lo16") == 0) ||
342 (TF & ARMII::MO_LO16))
344 else if ((Modifier && strcmp(Modifier, "hi16") == 0) ||
345 (TF & ARMII::MO_HI16))
350 case MachineOperand::MO_MachineBasicBlock:
351 O << *MO.getMBB()->getSymbol();
353 case MachineOperand::MO_GlobalAddress: {
354 bool isCallOp = Modifier && !strcmp(Modifier, "call");
355 const GlobalValue *GV = MO.getGlobal();
357 if ((Modifier && strcmp(Modifier, "lo16") == 0) ||
358 (TF & ARMII::MO_LO16))
360 else if ((Modifier && strcmp(Modifier, "hi16") == 0) ||
361 (TF & ARMII::MO_HI16))
363 O << *Mang->getSymbol(GV);
365 printOffset(MO.getOffset(), O);
367 if (isCallOp && Subtarget->isTargetELF() &&
368 TM.getRelocationModel() == Reloc::PIC_)
372 case MachineOperand::MO_ExternalSymbol: {
373 bool isCallOp = Modifier && !strcmp(Modifier, "call");
374 O << *GetExternalSymbolSymbol(MO.getSymbolName());
376 if (isCallOp && Subtarget->isTargetELF() &&
377 TM.getRelocationModel() == Reloc::PIC_)
381 case MachineOperand::MO_ConstantPoolIndex:
382 O << *GetCPISymbol(MO.getIndex());
384 case MachineOperand::MO_JumpTableIndex:
385 O << *GetJTISymbol(MO.getIndex());
390 static void printSOImm(raw_ostream &O, int64_t V, bool VerboseAsm,
391 const MCAsmInfo *MAI) {
392 // Break it up into two parts that make up a shifter immediate.
393 V = ARM_AM::getSOImmVal(V);
394 assert(V != -1 && "Not a valid so_imm value!");
396 unsigned Imm = ARM_AM::getSOImmValImm(V);
397 unsigned Rot = ARM_AM::getSOImmValRot(V);
399 // Print low-level immediate formation info, per
400 // A5.1.3: "Data-processing operands - Immediate".
402 O << "#" << Imm << ", " << Rot;
403 // Pretty printed version.
405 O << "\t" << MAI->getCommentString() << ' ';
406 O << (int)ARM_AM::rotr32(Imm, Rot);
413 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
414 /// immediate in bits 0-7.
415 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum,
417 const MachineOperand &MO = MI->getOperand(OpNum);
418 assert(MO.isImm() && "Not a valid so_imm value!");
419 printSOImm(O, MO.getImm(), isVerbose(), MAI);
422 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
423 /// followed by an 'orr' to materialize.
424 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum,
426 const MachineOperand &MO = MI->getOperand(OpNum);
427 assert(MO.isImm() && "Not a valid so_imm value!");
428 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
429 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
430 printSOImm(O, V1, isVerbose(), MAI);
432 printPredicateOperand(MI, 2, O);
434 printOperand(MI, 0, O);
436 printOperand(MI, 0, O);
438 printSOImm(O, V2, isVerbose(), MAI);
441 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
442 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
444 // REG REG 0,SH_OPC - e.g. R5, ROR R3
445 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
446 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op,
448 const MachineOperand &MO1 = MI->getOperand(Op);
449 const MachineOperand &MO2 = MI->getOperand(Op+1);
450 const MachineOperand &MO3 = MI->getOperand(Op+2);
452 O << getRegisterName(MO1.getReg());
454 // Print the shift opc.
456 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
460 O << getRegisterName(MO2.getReg());
461 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
463 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
467 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op,
469 const MachineOperand &MO1 = MI->getOperand(Op);
470 const MachineOperand &MO2 = MI->getOperand(Op+1);
471 const MachineOperand &MO3 = MI->getOperand(Op+2);
473 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
474 printOperand(MI, Op, O);
478 O << "[" << getRegisterName(MO1.getReg());
481 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
483 << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO3.getImm()))
484 << ARM_AM::getAM2Offset(MO3.getImm());
490 << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO3.getImm()))
491 << getRegisterName(MO2.getReg());
493 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
495 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
500 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op,
502 const MachineOperand &MO1 = MI->getOperand(Op);
503 const MachineOperand &MO2 = MI->getOperand(Op+1);
506 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
508 << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO2.getImm()))
513 O << ARM_AM::getAddrOpcStr(ARM_AM::getAM2Op(MO2.getImm()))
514 << getRegisterName(MO1.getReg());
516 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
518 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
522 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op,
524 const MachineOperand &MO1 = MI->getOperand(Op);
525 const MachineOperand &MO2 = MI->getOperand(Op+1);
526 const MachineOperand &MO3 = MI->getOperand(Op+2);
528 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
529 O << "[" << getRegisterName(MO1.getReg());
533 << (char)ARM_AM::getAM3Op(MO3.getImm())
534 << getRegisterName(MO2.getReg())
539 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
541 << ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO3.getImm()))
546 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op,
548 const MachineOperand &MO1 = MI->getOperand(Op);
549 const MachineOperand &MO2 = MI->getOperand(Op+1);
552 O << (char)ARM_AM::getAM3Op(MO2.getImm())
553 << getRegisterName(MO1.getReg());
557 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
559 << ARM_AM::getAddrOpcStr(ARM_AM::getAM3Op(MO2.getImm()))
563 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
565 const char *Modifier) {
566 const MachineOperand &MO2 = MI->getOperand(Op+1);
567 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
568 if (Modifier && strcmp(Modifier, "submode") == 0) {
569 O << ARM_AM::getAMSubModeStr(Mode);
570 } else if (Modifier && strcmp(Modifier, "wide") == 0) {
571 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
572 if (Mode == ARM_AM::ia)
575 printOperand(MI, Op, O);
579 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
581 const char *Modifier) {
582 const MachineOperand &MO1 = MI->getOperand(Op);
583 const MachineOperand &MO2 = MI->getOperand(Op+1);
585 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
586 printOperand(MI, Op, O);
590 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
592 if (Modifier && strcmp(Modifier, "submode") == 0) {
593 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
594 O << ARM_AM::getAMSubModeStr(Mode);
596 } else if (Modifier && strcmp(Modifier, "base") == 0) {
597 // Used for FSTM{D|S} and LSTM{D|S} operations.
598 O << getRegisterName(MO1.getReg());
602 O << "[" << getRegisterName(MO1.getReg());
604 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
606 << ARM_AM::getAddrOpcStr(ARM_AM::getAM5Op(MO2.getImm()))
612 void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op,
614 const MachineOperand &MO1 = MI->getOperand(Op);
615 const MachineOperand &MO2 = MI->getOperand(Op+1);
617 O << "[" << getRegisterName(MO1.getReg());
619 // FIXME: Both darwin as and GNU as violate ARM docs here.
620 O << ", :" << MO2.getImm();
625 void ARMAsmPrinter::printAddrMode6OffsetOperand(const MachineInstr *MI, int Op,
627 const MachineOperand &MO = MI->getOperand(Op);
628 if (MO.getReg() == 0)
631 O << ", " << getRegisterName(MO.getReg());
634 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
636 const char *Modifier) {
637 if (Modifier && strcmp(Modifier, "label") == 0) {
638 printPCLabel(MI, Op+1, O);
642 const MachineOperand &MO1 = MI->getOperand(Op);
643 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
644 O << "[pc, " << getRegisterName(MO1.getReg()) << "]";
648 ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op,
650 const MachineOperand &MO = MI->getOperand(Op);
651 uint32_t v = ~MO.getImm();
652 int32_t lsb = CountTrailingZeros_32(v);
653 int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
654 assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
655 O << "#" << lsb << ", #" << width;
658 //===--------------------------------------------------------------------===//
660 void ARMAsmPrinter::printThumbS4ImmOperand(const MachineInstr *MI, int Op,
662 O << "#" << MI->getOperand(Op).getImm() * 4;
666 ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op,
668 // (3 - the number of trailing zeros) is the number of then / else.
669 unsigned Mask = MI->getOperand(Op).getImm();
670 unsigned CondBit0 = Mask >> 4 & 1;
671 unsigned NumTZ = CountTrailingZeros_32(Mask);
672 assert(NumTZ <= 3 && "Invalid IT mask!");
673 for (unsigned Pos = 3, e = NumTZ; Pos > e; --Pos) {
674 bool T = ((Mask >> Pos) & 1) == CondBit0;
683 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op,
685 const MachineOperand &MO1 = MI->getOperand(Op);
686 const MachineOperand &MO2 = MI->getOperand(Op+1);
687 O << "[" << getRegisterName(MO1.getReg());
688 O << ", " << getRegisterName(MO2.getReg()) << "]";
692 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
695 const MachineOperand &MO1 = MI->getOperand(Op);
696 const MachineOperand &MO2 = MI->getOperand(Op+1);
697 const MachineOperand &MO3 = MI->getOperand(Op+2);
699 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
700 printOperand(MI, Op, O);
704 O << "[" << getRegisterName(MO1.getReg());
706 O << ", " << getRegisterName(MO3.getReg());
707 else if (unsigned ImmOffs = MO2.getImm())
708 O << ", #" << ImmOffs * Scale;
713 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op,
715 printThumbAddrModeRI5Operand(MI, Op, O, 1);
718 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op,
720 printThumbAddrModeRI5Operand(MI, Op, O, 2);
723 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op,
725 printThumbAddrModeRI5Operand(MI, Op, O, 4);
728 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op,
730 const MachineOperand &MO1 = MI->getOperand(Op);
731 const MachineOperand &MO2 = MI->getOperand(Op+1);
732 O << "[" << getRegisterName(MO1.getReg());
733 if (unsigned ImmOffs = MO2.getImm())
734 O << ", #" << ImmOffs*4;
738 //===--------------------------------------------------------------------===//
740 // Constant shifts t2_so_reg is a 2-operand unit corresponding to the Thumb2
741 // register with shift forms.
743 // REG IMM, SH_OPC - e.g. R5, LSL #3
744 void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum,
746 const MachineOperand &MO1 = MI->getOperand(OpNum);
747 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
749 unsigned Reg = MO1.getReg();
750 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
751 O << getRegisterName(Reg);
753 // Print the shift opc.
755 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
758 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
759 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
762 void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI,
765 const MachineOperand &MO1 = MI->getOperand(OpNum);
766 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
768 O << "[" << getRegisterName(MO1.getReg());
770 unsigned OffImm = MO2.getImm();
771 if (OffImm) // Don't print +0.
772 O << ", #" << OffImm;
776 void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI,
779 const MachineOperand &MO1 = MI->getOperand(OpNum);
780 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
782 O << "[" << getRegisterName(MO1.getReg());
784 int32_t OffImm = (int32_t)MO2.getImm();
787 O << ", #-" << -OffImm;
789 O << ", #" << OffImm;
793 void ARMAsmPrinter::printT2AddrModeImm8s4Operand(const MachineInstr *MI,
796 const MachineOperand &MO1 = MI->getOperand(OpNum);
797 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
799 O << "[" << getRegisterName(MO1.getReg());
801 int32_t OffImm = (int32_t)MO2.getImm() / 4;
804 O << ", #-" << -OffImm * 4;
806 O << ", #" << OffImm * 4;
810 void ARMAsmPrinter::printT2AddrModeImm8OffsetOperand(const MachineInstr *MI,
813 const MachineOperand &MO1 = MI->getOperand(OpNum);
814 int32_t OffImm = (int32_t)MO1.getImm();
817 O << "#-" << -OffImm;
822 void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI,
825 const MachineOperand &MO1 = MI->getOperand(OpNum);
826 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
827 const MachineOperand &MO3 = MI->getOperand(OpNum+2);
829 O << "[" << getRegisterName(MO1.getReg());
831 assert(MO2.getReg() && "Invalid so_reg load / store address!");
832 O << ", " << getRegisterName(MO2.getReg());
834 unsigned ShAmt = MO3.getImm();
836 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!");
837 O << ", lsl #" << ShAmt;
843 //===--------------------------------------------------------------------===//
845 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum,
847 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
849 O << ARMCondCodeToString(CC);
852 void ARMAsmPrinter::printMandatoryPredicateOperand(const MachineInstr *MI,
855 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
856 O << ARMCondCodeToString(CC);
859 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum,
861 unsigned Reg = MI->getOperand(OpNum).getReg();
863 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
868 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum,
870 int Id = (int)MI->getOperand(OpNum).getImm();
871 O << MAI->getPrivateGlobalPrefix()
872 << "PC" << getFunctionNumber() << "_" << Id;
875 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum,
878 for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {
879 if (MI->getOperand(i).isImplicit())
881 if ((int)i != OpNum) O << ", ";
882 printOperand(MI, i, O);
887 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNum,
888 raw_ostream &O, const char *Modifier) {
889 assert(Modifier && "This operand only works with a modifier!");
890 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
892 if (!strcmp(Modifier, "label")) {
893 unsigned ID = MI->getOperand(OpNum).getImm();
894 OutStreamer.EmitLabel(GetCPISymbol(ID));
896 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
897 unsigned CPI = MI->getOperand(OpNum).getIndex();
899 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
901 if (MCPE.isMachineConstantPoolEntry()) {
902 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
904 EmitGlobalConstant(MCPE.Val.ConstVal);
909 MCSymbol *ARMAsmPrinter::
910 GetARMSetPICJumpTableLabel2(unsigned uid, unsigned uid2,
911 const MachineBasicBlock *MBB) const {
912 SmallString<60> Name;
913 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix()
914 << getFunctionNumber() << '_' << uid << '_' << uid2
915 << "_set_" << MBB->getNumber();
916 return OutContext.GetOrCreateSymbol(Name.str());
919 MCSymbol *ARMAsmPrinter::
920 GetARMJTIPICJumpTableLabel2(unsigned uid, unsigned uid2) const {
921 SmallString<60> Name;
922 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "JTI"
923 << getFunctionNumber() << '_' << uid << '_' << uid2;
924 return OutContext.GetOrCreateSymbol(Name.str());
927 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum,
929 assert(!Subtarget->isThumb2() && "Thumb2 should use double-jump jumptables!");
931 const MachineOperand &MO1 = MI->getOperand(OpNum);
932 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
934 unsigned JTI = MO1.getIndex();
935 MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm());
936 // Can't use EmitLabel until instprinter happens, label comes out in the wrong
938 O << *JTISymbol << ":\n";
940 const char *JTEntryDirective = MAI->getData32bitsDirective();
942 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
943 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
944 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
945 bool UseSet= MAI->hasSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
946 SmallPtrSet<MachineBasicBlock*, 8> JTSets;
947 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
948 MachineBasicBlock *MBB = JTBBs[i];
949 bool isNew = JTSets.insert(MBB);
951 if (UseSet && isNew) {
953 << *GetARMSetPICJumpTableLabel2(JTI, MO2.getImm(), MBB) << ','
954 << *MBB->getSymbol() << '-' << *JTISymbol << '\n';
957 O << JTEntryDirective << ' ';
959 O << *GetARMSetPICJumpTableLabel2(JTI, MO2.getImm(), MBB);
960 else if (TM.getRelocationModel() == Reloc::PIC_)
961 O << *MBB->getSymbol() << '-' << *JTISymbol;
963 O << *MBB->getSymbol();
970 void ARMAsmPrinter::printJT2BlockOperand(const MachineInstr *MI, int OpNum,
972 const MachineOperand &MO1 = MI->getOperand(OpNum);
973 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
974 unsigned JTI = MO1.getIndex();
976 MCSymbol *JTISymbol = GetARMJTIPICJumpTableLabel2(JTI, MO2.getImm());
978 // Can't use EmitLabel until instprinter happens, label comes out in the wrong
980 O << *JTISymbol << ":\n";
982 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
983 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
984 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
985 bool ByteOffset = false, HalfWordOffset = false;
986 if (MI->getOpcode() == ARM::t2TBB)
988 else if (MI->getOpcode() == ARM::t2TBH)
989 HalfWordOffset = true;
991 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
992 MachineBasicBlock *MBB = JTBBs[i];
994 O << MAI->getData8bitsDirective();
995 else if (HalfWordOffset)
996 O << MAI->getData16bitsDirective();
998 if (ByteOffset || HalfWordOffset)
999 O << '(' << *MBB->getSymbol() << "-" << *JTISymbol << ")/2";
1001 O << "\tb.w " << *MBB->getSymbol();
1008 void ARMAsmPrinter::printTBAddrMode(const MachineInstr *MI, int OpNum,
1010 O << "[pc, " << getRegisterName(MI->getOperand(OpNum).getReg());
1011 if (MI->getOpcode() == ARM::t2TBH)
1016 void ARMAsmPrinter::printNoHashImmediate(const MachineInstr *MI, int OpNum,
1018 O << MI->getOperand(OpNum).getImm();
1021 void ARMAsmPrinter::printVFPf32ImmOperand(const MachineInstr *MI, int OpNum,
1023 const ConstantFP *FP = MI->getOperand(OpNum).getFPImm();
1024 O << '#' << FP->getValueAPF().convertToFloat();
1026 O << "\t\t" << MAI->getCommentString() << ' ';
1027 WriteAsOperand(O, FP, /*PrintType=*/false);
1031 void ARMAsmPrinter::printVFPf64ImmOperand(const MachineInstr *MI, int OpNum,
1033 const ConstantFP *FP = MI->getOperand(OpNum).getFPImm();
1034 O << '#' << FP->getValueAPF().convertToDouble();
1036 O << "\t\t" << MAI->getCommentString() << ' ';
1037 WriteAsOperand(O, FP, /*PrintType=*/false);
1041 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
1042 unsigned AsmVariant, const char *ExtraCode,
1044 // Does this asm operand have a single letter operand modifier?
1045 if (ExtraCode && ExtraCode[0]) {
1046 if (ExtraCode[1] != 0) return true; // Unknown modifier.
1048 switch (ExtraCode[0]) {
1049 default: return true; // Unknown modifier.
1050 case 'a': // Print as a memory address.
1051 if (MI->getOperand(OpNum).isReg()) {
1052 O << "[" << getRegisterName(MI->getOperand(OpNum).getReg()) << "]";
1056 case 'c': // Don't print "#" before an immediate operand.
1057 if (!MI->getOperand(OpNum).isImm())
1059 printNoHashImmediate(MI, OpNum, O);
1061 case 'P': // Print a VFP double precision register.
1062 case 'q': // Print a NEON quad precision register.
1063 printOperand(MI, OpNum, O);
1066 if (TM.getTargetData()->isLittleEndian())
1070 if (TM.getTargetData()->isBigEndian())
1073 case 'H': // Write second word of DI / DF reference.
1074 // Verify that this operand has two consecutive registers.
1075 if (!MI->getOperand(OpNum).isReg() ||
1076 OpNum+1 == MI->getNumOperands() ||
1077 !MI->getOperand(OpNum+1).isReg())
1079 ++OpNum; // Return the high-part.
1083 printOperand(MI, OpNum, O);
1087 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
1088 unsigned OpNum, unsigned AsmVariant,
1089 const char *ExtraCode,
1091 if (ExtraCode && ExtraCode[0])
1092 return true; // Unknown modifier.
1094 const MachineOperand &MO = MI->getOperand(OpNum);
1095 assert(MO.isReg() && "unexpected inline asm memory operand");
1096 O << "[" << getRegisterName(MO.getReg()) << "]";
1100 void ARMAsmPrinter::EmitInstruction(const MachineInstr *MI) {
1102 printInstructionThroughMCStreamer(MI);
1106 if (MI->getOpcode() == ARM::CONSTPOOL_ENTRY)
1109 SmallString<128> Str;
1110 raw_svector_ostream OS(Str);
1111 printInstruction(MI, OS);
1112 OutStreamer.EmitRawText(OS.str());
1114 // Make sure the instruction that follows TBB is 2-byte aligned.
1115 // FIXME: Constant island pass should insert an "ALIGN" instruction instead.
1116 if (MI->getOpcode() == ARM::t2TBB)
1120 void ARMAsmPrinter::EmitStartOfAsmFile(Module &M) {
1121 if (Subtarget->isTargetDarwin()) {
1122 Reloc::Model RelocM = TM.getRelocationModel();
1123 if (RelocM == Reloc::PIC_ || RelocM == Reloc::DynamicNoPIC) {
1124 // Declare all the text sections up front (before the DWARF sections
1125 // emitted by AsmPrinter::doInitialization) so the assembler will keep
1126 // them together at the beginning of the object file. This helps
1127 // avoid out-of-range branches that are due a fundamental limitation of
1128 // the way symbol offsets are encoded with the current Darwin ARM
1130 const TargetLoweringObjectFileMachO &TLOFMacho =
1131 static_cast<const TargetLoweringObjectFileMachO &>(
1132 getObjFileLowering());
1133 OutStreamer.SwitchSection(TLOFMacho.getTextSection());
1134 OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection());
1135 OutStreamer.SwitchSection(TLOFMacho.getConstTextCoalSection());
1136 if (RelocM == Reloc::DynamicNoPIC) {
1137 const MCSection *sect =
1138 OutContext.getMachOSection("__TEXT", "__symbol_stub4",
1139 MCSectionMachO::S_SYMBOL_STUBS,
1140 12, SectionKind::getText());
1141 OutStreamer.SwitchSection(sect);
1143 const MCSection *sect =
1144 OutContext.getMachOSection("__TEXT", "__picsymbolstub4",
1145 MCSectionMachO::S_SYMBOL_STUBS,
1146 16, SectionKind::getText());
1147 OutStreamer.SwitchSection(sect);
1152 // Use unified assembler syntax.
1153 OutStreamer.EmitRawText(StringRef("\t.syntax unified"));
1155 // Emit ARM Build Attributes
1156 if (Subtarget->isTargetELF()) {
1158 std::string CPUString = Subtarget->getCPUString();
1159 if (CPUString != "generic")
1160 OutStreamer.EmitRawText("\t.cpu " + Twine(CPUString));
1162 // FIXME: Emit FPU type
1163 if (Subtarget->hasVFP2())
1164 OutStreamer.EmitRawText("\t.eabi_attribute " +
1165 Twine(ARMBuildAttrs::VFP_arch) + ", 2");
1167 // Signal various FP modes.
1168 if (!UnsafeFPMath) {
1169 OutStreamer.EmitRawText("\t.eabi_attribute " +
1170 Twine(ARMBuildAttrs::ABI_FP_denormal) + ", 1");
1171 OutStreamer.EmitRawText("\t.eabi_attribute " +
1172 Twine(ARMBuildAttrs::ABI_FP_exceptions) + ", 1");
1175 if (FiniteOnlyFPMath())
1176 OutStreamer.EmitRawText("\t.eabi_attribute " +
1177 Twine(ARMBuildAttrs::ABI_FP_number_model)+ ", 1");
1179 OutStreamer.EmitRawText("\t.eabi_attribute " +
1180 Twine(ARMBuildAttrs::ABI_FP_number_model)+ ", 3");
1182 // 8-bytes alignment stuff.
1183 OutStreamer.EmitRawText("\t.eabi_attribute " +
1184 Twine(ARMBuildAttrs::ABI_align8_needed) + ", 1");
1185 OutStreamer.EmitRawText("\t.eabi_attribute " +
1186 Twine(ARMBuildAttrs::ABI_align8_preserved) + ", 1");
1188 // Hard float. Use both S and D registers and conform to AAPCS-VFP.
1189 if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard) {
1190 OutStreamer.EmitRawText("\t.eabi_attribute " +
1191 Twine(ARMBuildAttrs::ABI_HardFP_use) + ", 3");
1192 OutStreamer.EmitRawText("\t.eabi_attribute " +
1193 Twine(ARMBuildAttrs::ABI_VFP_args) + ", 1");
1195 // FIXME: Should we signal R9 usage?
1200 void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) {
1201 if (Subtarget->isTargetDarwin()) {
1202 // All darwin targets use mach-o.
1203 const TargetLoweringObjectFileMachO &TLOFMacho =
1204 static_cast<const TargetLoweringObjectFileMachO &>(getObjFileLowering());
1205 MachineModuleInfoMachO &MMIMacho =
1206 MMI->getObjFileInfo<MachineModuleInfoMachO>();
1208 // Output non-lazy-pointers for external and common global variables.
1209 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList();
1211 if (!Stubs.empty()) {
1212 // Switch with ".non_lazy_symbol_pointer" directive.
1213 OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
1215 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
1217 OutStreamer.EmitLabel(Stubs[i].first);
1218 // .indirect_symbol _foo
1219 MachineModuleInfoImpl::StubValueTy &MCSym = Stubs[i].second;
1220 OutStreamer.EmitSymbolAttribute(MCSym.getPointer(),MCSA_IndirectSymbol);
1223 // External to current translation unit.
1224 OutStreamer.EmitIntValue(0, 4/*size*/, 0/*addrspace*/);
1226 // Internal to current translation unit.
1228 // When we place the LSDA into the TEXT section, the type info pointers
1229 // need to be indirect and pc-rel. We accomplish this by using NLPs.
1230 // However, sometimes the types are local to the file. So we need to
1231 // fill in the value for the NLP in those cases.
1232 OutStreamer.EmitValue(MCSymbolRefExpr::Create(MCSym.getPointer(),
1234 4/*size*/, 0/*addrspace*/);
1238 OutStreamer.AddBlankLine();
1241 Stubs = MMIMacho.GetHiddenGVStubList();
1242 if (!Stubs.empty()) {
1243 OutStreamer.SwitchSection(getObjFileLowering().getDataSection());
1245 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
1247 OutStreamer.EmitLabel(Stubs[i].first);
1249 OutStreamer.EmitValue(MCSymbolRefExpr::
1250 Create(Stubs[i].second.getPointer(),
1252 4/*size*/, 0/*addrspace*/);
1256 OutStreamer.AddBlankLine();
1259 // Funny Darwin hack: This flag tells the linker that no global symbols
1260 // contain code that falls through to other global symbols (e.g. the obvious
1261 // implementation of multiple entry points). If this doesn't occur, the
1262 // linker can safely perform dead code stripping. Since LLVM never
1263 // generates code that does this, it is always safe to set.
1264 OutStreamer.EmitAssemblerFlag(MCAF_SubsectionsViaSymbols);
1268 //===----------------------------------------------------------------------===//
1270 void ARMAsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) {
1271 ARMMCInstLower MCInstLowering(OutContext, *Mang, *this);
1272 switch (MI->getOpcode()) {
1273 case ARM::t2MOVi32imm:
1274 assert(0 && "Should be lowered by thumb2it pass");
1276 case ARM::PICADD: { // FIXME: Remove asm string from td file.
1277 // This is a pseudo op for a label + instruction sequence, which looks like:
1280 // This adds the address of LPC0 to r0.
1283 // FIXME: MOVE TO SHARED PLACE.
1284 unsigned Id = (unsigned)MI->getOperand(2).getImm();
1285 const char *Prefix = MAI->getPrivateGlobalPrefix();
1286 MCSymbol *Label =OutContext.GetOrCreateSymbol(Twine(Prefix)
1287 + "PC" + Twine(getFunctionNumber()) + "_" + Twine(Id));
1288 OutStreamer.EmitLabel(Label);
1291 // Form and emit tha dd.
1293 AddInst.setOpcode(ARM::ADDrr);
1294 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1295 AddInst.addOperand(MCOperand::CreateReg(ARM::PC));
1296 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
1297 OutStreamer.EmitInstruction(AddInst);
1300 case ARM::CONSTPOOL_ENTRY: { // FIXME: Remove asm string from td file.
1301 /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool
1302 /// in the function. The first operand is the ID# for this instruction, the
1303 /// second is the index into the MachineConstantPool that this is, the third
1304 /// is the size in bytes of this constant pool entry.
1305 unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
1306 unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
1309 OutStreamer.EmitLabel(GetCPISymbol(LabelId));
1311 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
1312 if (MCPE.isMachineConstantPoolEntry())
1313 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
1315 EmitGlobalConstant(MCPE.Val.ConstVal);
1319 case ARM::MOVi2pieces: { // FIXME: Remove asmstring from td file.
1320 // This is a hack that lowers as a two instruction sequence.
1321 unsigned DstReg = MI->getOperand(0).getReg();
1322 unsigned ImmVal = (unsigned)MI->getOperand(1).getImm();
1324 unsigned SOImmValV1 = ARM_AM::getSOImmTwoPartFirst(ImmVal);
1325 unsigned SOImmValV2 = ARM_AM::getSOImmTwoPartSecond(ImmVal);
1329 TmpInst.setOpcode(ARM::MOVi);
1330 TmpInst.addOperand(MCOperand::CreateReg(DstReg));
1331 TmpInst.addOperand(MCOperand::CreateImm(SOImmValV1));
1334 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
1335 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
1337 TmpInst.addOperand(MCOperand::CreateReg(0)); // cc_out
1338 OutStreamer.EmitInstruction(TmpInst);
1343 TmpInst.setOpcode(ARM::ORRri);
1344 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg
1345 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // inreg
1346 TmpInst.addOperand(MCOperand::CreateImm(SOImmValV2)); // so_imm
1348 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
1349 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
1351 TmpInst.addOperand(MCOperand::CreateReg(0)); // cc_out
1352 OutStreamer.EmitInstruction(TmpInst);
1356 case ARM::MOVi32imm: { // FIXME: Remove asmstring from td file.
1357 // This is a hack that lowers as a two instruction sequence.
1358 unsigned DstReg = MI->getOperand(0).getReg();
1359 unsigned ImmVal = (unsigned)MI->getOperand(1).getImm();
1363 TmpInst.setOpcode(ARM::MOVi16);
1364 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg
1365 TmpInst.addOperand(MCOperand::CreateImm(ImmVal & 65535)); // lower16(imm)
1368 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
1369 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
1371 OutStreamer.EmitInstruction(TmpInst);
1376 TmpInst.setOpcode(ARM::MOVTi16);
1377 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // dstreg
1378 TmpInst.addOperand(MCOperand::CreateReg(DstReg)); // srcreg
1379 TmpInst.addOperand(MCOperand::CreateImm(ImmVal >> 16)); // upper16(imm)
1382 TmpInst.addOperand(MCOperand::CreateImm(MI->getOperand(2).getImm()));
1383 TmpInst.addOperand(MCOperand::CreateReg(MI->getOperand(3).getReg()));
1385 OutStreamer.EmitInstruction(TmpInst);
1393 MCInstLowering.Lower(MI, TmpInst);
1394 OutStreamer.EmitInstruction(TmpInst);
1397 //===----------------------------------------------------------------------===//
1398 // Target Registry Stuff
1399 //===----------------------------------------------------------------------===//
1401 static MCInstPrinter *createARMMCInstPrinter(const Target &T,
1402 unsigned SyntaxVariant,
1403 const MCAsmInfo &MAI) {
1404 if (SyntaxVariant == 0)
1405 return new ARMInstPrinter(MAI, false);
1409 // Force static initialization.
1410 extern "C" void LLVMInitializeARMAsmPrinter() {
1411 RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget);
1412 RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget);
1414 TargetRegistry::RegisterMCInstPrinter(TheARMTarget, createARMMCInstPrinter);
1415 TargetRegistry::RegisterMCInstPrinter(TheThumbTarget, createARMMCInstPrinter);