1 //===- ARMRegisterInfo.cpp - ARM Register Information -----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the "Instituto Nokia de Tecnologia" and
6 // is distributed under the University of Illinois Open Source
7 // License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
11 // This file contains the ARM implementation of the MRegisterInfo class.
13 //===----------------------------------------------------------------------===//
16 #include "ARMRegisterInfo.h"
17 #include "llvm/CodeGen/MachineInstrBuilder.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineFrameInfo.h"
20 #include "llvm/CodeGen/MachineLocation.h"
21 #include "llvm/Type.h"
22 #include "llvm/ADT/STLExtras.h"
26 ARMRegisterInfo::ARMRegisterInfo()
27 : ARMGenRegisterInfo(ARM::ADJCALLSTACKDOWN, ARM::ADJCALLSTACKUP) {
30 void ARMRegisterInfo::
31 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
32 unsigned SrcReg, int FI,
33 const TargetRegisterClass *RC) const {
34 // On the order of operands here: think "[FI + 0] = SrcReg".
35 assert (RC == ARM::IntRegsRegisterClass);
36 BuildMI(MBB, I, ARM::str, 3).addFrameIndex(FI).addImm(0).addReg(SrcReg);
39 void ARMRegisterInfo::
40 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
41 unsigned DestReg, int FI,
42 const TargetRegisterClass *RC) const {
43 assert (RC == ARM::IntRegsRegisterClass);
44 BuildMI(MBB, I, ARM::ldr, 2, DestReg).addFrameIndex(FI).addImm(0);
47 void ARMRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
48 MachineBasicBlock::iterator I,
49 unsigned DestReg, unsigned SrcReg,
50 const TargetRegisterClass *RC) const {
51 assert (RC == ARM::IntRegsRegisterClass);
52 BuildMI(MBB, I, ARM::movrr, 1, DestReg).addReg(SrcReg);
55 MachineInstr *ARMRegisterInfo::foldMemoryOperand(MachineInstr* MI,
61 const unsigned* ARMRegisterInfo::getCalleeSaveRegs() const {
62 static const unsigned CalleeSaveRegs[] = { 0 };
63 return CalleeSaveRegs;
66 const TargetRegisterClass* const *
67 ARMRegisterInfo::getCalleeSaveRegClasses() const {
68 static const TargetRegisterClass * const CalleeSaveRegClasses[] = { 0 };
69 return CalleeSaveRegClasses;
72 void ARMRegisterInfo::
73 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
74 MachineBasicBlock::iterator I) const {
79 ARMRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
80 MachineInstr &MI = *II;
81 MachineBasicBlock &MBB = *MI.getParent();
82 MachineFunction &MF = *MBB.getParent();
84 assert (MI.getOpcode() == ARM::ldr);
86 unsigned FrameIdx = 2;
89 int FrameIndex = MI.getOperand(FrameIdx).getFrameIndex();
91 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
92 assert (MI.getOperand(OffIdx).getImmedValue() == 0);
94 unsigned StackSize = MF.getFrameInfo()->getStackSize();
100 // Replace the FrameIndex with r13
101 MI.getOperand(FrameIdx).ChangeToRegister(ARM::R13);
102 // Replace the ldr offset with Offset
103 MI.getOperand(OffIdx).ChangeToImmediate(Offset);
105 // Insert a set of r12 with the full address
106 // r12 = r13 + offset
107 MachineBasicBlock *MBB2 = MI.getParent();
108 BuildMI(*MBB2, II, ARM::addri, 2, ARM::R12).addReg(ARM::R13).addImm(Offset);
110 // Replace the FrameIndex with r12
111 MI.getOperand(FrameIdx).ChangeToRegister(ARM::R12);
115 void ARMRegisterInfo::
116 processFunctionBeforeFrameFinalized(MachineFunction &MF) const {}
118 void ARMRegisterInfo::emitPrologue(MachineFunction &MF) const {
119 MachineBasicBlock &MBB = MF.front();
120 MachineFrameInfo *MFI = MF.getFrameInfo();
121 int NumBytes = (int) MFI->getStackSize();
124 assert(NumBytes == 0);
127 BuildMI(MBB, MBB.begin(), ARM::str, 1, ARM::R14).addReg(ARM::R13);
130 void ARMRegisterInfo::emitEpilogue(MachineFunction &MF,
131 MachineBasicBlock &MBB) const {
132 MachineBasicBlock::iterator MBBI = prior(MBB.end());
133 assert(MBBI->getOpcode() == ARM::bx &&
134 "Can only insert epilog into returning blocks");
136 MachineFrameInfo *MFI = MF.getFrameInfo();
137 int NumBytes = (int) MFI->getStackSize();
139 assert(NumBytes == 0);
141 BuildMI(MBB, MBBI, ARM::ldr, 2, ARM::R14).addImm(0).addReg(ARM::R13);
145 unsigned ARMRegisterInfo::getRARegister() const {
149 unsigned ARMRegisterInfo::getFrameRegister(MachineFunction &MF) const {
153 #include "ARMGenRegisterInfo.inc"