1 //===-- ARMJITInfo.cpp - Implement the JIT interfaces for the ARM target --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the JIT interfaces for the ARM target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "jit"
15 #include "ARMJITInfo.h"
16 #include "ARMConstantPoolValue.h"
17 #include "ARMRelocations.h"
18 #include "ARMSubtarget.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/Config/alloca.h"
22 #include "llvm/Support/Streams.h"
23 #include "llvm/System/Memory.h"
27 void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
31 /// JITCompilerFunction - This contains the address of the JIT function used to
32 /// compile a function lazily.
33 static TargetJITInfo::JITCompilerFn JITCompilerFunction;
35 // Get the ASMPREFIX for the current host. This is often '_'.
36 #ifndef __USER_LABEL_PREFIX__
37 #define __USER_LABEL_PREFIX__
39 #define GETASMPREFIX2(X) #X
40 #define GETASMPREFIX(X) GETASMPREFIX2(X)
41 #define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__)
43 // CompilationCallback stub - We can't use a C function with inline assembly in
44 // it, because we the prolog/epilog inserted by GCC won't work for us (we need
45 // to preserve more context and manipulate the stack directly). Instead,
46 // write our own wrapper, which does things our way, so we have complete
47 // control over register saving and restoring.
50 void ARMCompilationCallback(void);
54 ".globl " ASMPREFIX "ARMCompilationCallback\n"
55 ASMPREFIX "ARMCompilationCallback:\n"
56 // Save caller saved registers since they may contain stuff
57 // for the real target function right now. We have to act as if this
58 // whole compilation callback doesn't exist as far as the caller is
59 // concerned, so we can't just preserve the callee saved regs.
60 "stmdb sp!, {r0, r1, r2, r3, lr}\n"
61 // The LR contains the address of the stub function on entry.
62 // pass it as the argument to the C part of the callback
65 // Call the C portion of the callback
66 "bl " ASMPREFIX "ARMCompilationCallbackC\n"
68 // Restoring the LR to the return address of the function that invoked
69 // the stub and de-allocating the stack space for it requires us to
70 // swap the two saved LR values on the stack, as they're backwards
71 // for what we need since the pop instruction has a pre-determined
72 // order for the registers.
74 // 0 | LR | Original return address
76 // 1 | LR | Stub address (start of stub)
77 // 2-5 | R3..R0 | Saved registers (we need to preserve all regs)
80 // We need to exchange the values in slots 0 and 1 so we can
81 // return to the address in slot 1 with the address in slot 0
82 // restored to the LR.
87 // Return to the (newly modified) stub to invoke the real function.
88 // The above twiddling of the saved return addresses allows us to
89 // deallocate everything, including the LR the stub saved, all in one
91 "ldmia sp!, {r0, r1, r2, r3, lr, pc}\n"
93 #else // Not an ARM host
94 void ARMCompilationCallback() {
95 assert(0 && "Cannot call ARMCompilationCallback() on a non-ARM arch!\n");
101 /// ARMCompilationCallbackC - This is the target-specific function invoked
102 /// by the function stub when we did not know the real target of a call.
103 /// This function must locate the start of the stub or call site and pass
104 /// it into the JIT compiler function.
105 extern "C" void ARMCompilationCallbackC(intptr_t StubAddr) {
106 // Get the address of the compiled code for this function.
107 intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)StubAddr);
109 // Rewrite the call target... so that we don't end up here every time we
110 // execute the call. We're replacing the first two instructions of the
114 bool ok = sys::Memory::setRangeWritable((void*)StubAddr, 8);
117 cerr << "ERROR: Unable to mark stub writable\n";
120 *(intptr_t *)StubAddr = 0xe51ff004;
121 *(intptr_t *)(StubAddr+4) = NewVal;
122 ok = sys::Memory::setRangeExecutable((void*)StubAddr, 8);
125 cerr << "ERROR: Unable to mark stub executable\n";
130 TargetJITInfo::LazyResolverFn
131 ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) {
132 JITCompilerFunction = F;
133 return ARMCompilationCallback;
136 void *ARMJITInfo::emitGlobalValueNonLazyPtr(const GlobalValue *GV, void *Ptr,
137 MachineCodeEmitter &MCE) {
138 MCE.startGVStub(GV, 4, 4);
139 MCE.emitWordLE((intptr_t)Ptr);
140 return MCE.finishGVStub(GV);
143 void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn,
144 MachineCodeEmitter &MCE) {
145 unsigned addr = (intptr_t)Fn;
146 // If this is just a call to an external function, emit a branch instead of a
147 // call. The code is the same except for one bit of the last instruction.
148 if (Fn != (void*)(intptr_t)ARMCompilationCallback) {
149 // Branch to the corresponding function addr.
150 // The stub is 8-byte size and 4-aligned.
151 MCE.startGVStub(F, 8, 4);
152 MCE.emitWordLE(0xe51ff004); // LDR PC, [PC,#-4]
153 MCE.emitWordLE(addr); // addr of function
155 // The compilation callback will overwrite the first two words of this
156 // stub with indirect branch instructions targeting the compiled code.
157 // This stub sets the return address to restart the stub, so that
158 // the new branch will be invoked when we come back.
160 // Branch and link to the compilation callback.
161 // The stub is 16-byte size and 4-byte aligned.
162 MCE.startGVStub(F, 16, 4);
163 // Save LR so the callback can determine which stub called it.
164 // The compilation callback is responsible for popping this prior
166 MCE.emitWordLE(0xe92d4000); // PUSH {lr}
167 // Set the return address to go back to the start of this stub
168 MCE.emitWordLE(0xe24fe00c); // SUB LR, PC, #12
169 // Invoke the compilation callback
170 MCE.emitWordLE(0xe51ff004); // LDR PC, [PC,#-4]
171 // The address of the compilation callback
172 MCE.emitWordLE((intptr_t)ARMCompilationCallback);
175 return MCE.finishGVStub(F);
178 intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const {
179 ARM::RelocationType RT = (ARM::RelocationType)MR->getRelocationType();
180 if (RT == ARM::reloc_arm_pic_jt)
181 // Destination address - jump table base.
182 return (intptr_t)(MR->getResultPointer()) - MR->getConstantVal();
183 else if (RT == ARM::reloc_arm_jt_base)
184 // Jump table base address.
185 return getJumpTableBaseAddr(MR->getJumpTableIndex());
186 else if (RT == ARM::reloc_arm_cp_entry)
187 // Constant pool entry address.
188 return getConstantPoolEntryAddr(MR->getConstantPoolIndex());
189 else if (RT == ARM::reloc_arm_machine_cp_entry) {
190 ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)MR->getConstantVal();
191 assert((!ACPV->hasModifier() && !ACPV->mustAddCurrentAddress()) &&
192 "Can't handle this machine constant pool entry yet!");
193 intptr_t Addr = (intptr_t)(MR->getResultPointer());
194 Addr -= getPCLabelAddr(ACPV->getLabelId()) + ACPV->getPCAdjustment();
197 return (intptr_t)(MR->getResultPointer());
200 /// relocate - Before the JIT can run a block of code that has been emitted,
201 /// it must rewrite the code to contain the actual addresses of any
202 /// referenced global symbols.
203 void ARMJITInfo::relocate(void *Function, MachineRelocation *MR,
204 unsigned NumRelocs, unsigned char* GOTBase) {
205 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
206 void *RelocPos = (char*)Function + MR->getMachineCodeOffset();
207 intptr_t ResultPtr = resolveRelocDestAddr(MR);
208 switch ((ARM::RelocationType)MR->getRelocationType()) {
209 case ARM::reloc_arm_cp_entry:
210 case ARM::reloc_arm_relative: {
211 // It is necessary to calculate the correct PC relative value. We
212 // subtract the base addr from the target addr to form a byte offset.
213 ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
214 // If the result is positive, set bit U(23) to 1.
216 *((unsigned*)RelocPos) |= 1 << 23;
218 // Otherwise, obtain the absolute value and set
221 *((unsigned*)RelocPos) &= 0xFF7FFFFF;
223 // Set the immed value calculated.
224 *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
225 // Set register Rn to PC.
226 *((unsigned*)RelocPos) |= 0xF << 16;
229 case ARM::reloc_arm_pic_jt:
230 case ARM::reloc_arm_machine_cp_entry:
231 case ARM::reloc_arm_absolute: {
232 // These addresses have already been resolved.
233 *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
236 case ARM::reloc_arm_branch: {
237 // It is necessary to calculate the correct value of signed_immed_24
238 // field. We subtract the base addr from the target addr to form a
239 // byte offset, which must be inside the range -33554432 and +33554428.
240 // Then, we set the signed_immed_24 field of the instruction to bits
241 // [25:2] of the byte offset. More details ARM-ARM p. A4-11.
242 ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
243 ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2;
244 assert(ResultPtr >= -33554432 && ResultPtr <= 33554428);
245 *((unsigned*)RelocPos) |= ResultPtr;
248 case ARM::reloc_arm_jt_base: {
249 // JT base - (instruction addr + 8)
250 ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
251 *((unsigned*)RelocPos) |= ResultPtr;