More dead code removal (using -Wunreachable-code)
[oota-llvm.git] / lib / Target / ARM / ARMELFWriterInfo.cpp
1 //===-- ARMELFWriterInfo.cpp - ELF Writer Info for the ARM backend --------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file implements ELF writer information for the ARM backend.
11 //
12 //===----------------------------------------------------------------------===//
13
14 #include "ARMELFWriterInfo.h"
15 #include "ARMRelocations.h"
16 #include "llvm/Function.h"
17 #include "llvm/Support/ErrorHandling.h"
18 #include "llvm/Target/TargetData.h"
19 #include "llvm/Target/TargetMachine.h"
20 #include "llvm/Support/ELF.h"
21
22 using namespace llvm;
23
24 //===----------------------------------------------------------------------===//
25 //  Implementation of the ARMELFWriterInfo class
26 //===----------------------------------------------------------------------===//
27
28 ARMELFWriterInfo::ARMELFWriterInfo(TargetMachine &TM)
29   : TargetELFWriterInfo(TM.getTargetData()->getPointerSizeInBits() == 64,
30                         TM.getTargetData()->isLittleEndian()) {
31 }
32
33 ARMELFWriterInfo::~ARMELFWriterInfo() {}
34
35 unsigned ARMELFWriterInfo::getRelocationType(unsigned MachineRelTy) const {
36   switch (MachineRelTy) {
37   case ARM::reloc_arm_absolute:
38   case ARM::reloc_arm_relative:
39   case ARM::reloc_arm_cp_entry:
40   case ARM::reloc_arm_vfp_cp_entry:
41   case ARM::reloc_arm_machine_cp_entry:
42   case ARM::reloc_arm_jt_base:
43   case ARM::reloc_arm_pic_jt:
44     assert(0 && "unsupported ARM relocation type"); return 0;
45     
46   case ARM::reloc_arm_branch: return ELF::R_ARM_CALL;
47   case ARM::reloc_arm_movt:   return ELF::R_ARM_MOVT_ABS;
48   case ARM::reloc_arm_movw:   return ELF::R_ARM_MOVW_ABS_NC;
49   default:
50     llvm_unreachable("unknown ARM relocation type");
51   }
52 }
53
54 long int ARMELFWriterInfo::getDefaultAddendForRelTy(unsigned RelTy,
55                                                     long int Modifier) const {
56   assert(0 && "ARMELFWriterInfo::getDefaultAddendForRelTy() not implemented");
57   return 0;
58 }
59
60 unsigned ARMELFWriterInfo::getRelocationTySize(unsigned RelTy) const {
61   assert(0 && "ARMELFWriterInfo::getRelocationTySize() not implemented");
62   return 0;
63 }
64
65 bool ARMELFWriterInfo::isPCRelativeRel(unsigned RelTy) const {
66   assert(0 && "ARMELFWriterInfo::isPCRelativeRel() not implemented");
67   return 1;
68 }
69
70 unsigned ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() const {
71   assert(0 &&
72          "ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() not implemented");
73   return 0;
74 }
75
76 long int ARMELFWriterInfo::computeRelocation(unsigned SymOffset,
77                                              unsigned RelOffset,
78                                              unsigned RelTy) const {
79   assert(0 &&
80          "ARMELFWriterInfo::getAbsoluteLabelMachineRelTy() not implemented");
81   return 0;
82 }