1 //===-- ARMConstantIslandPass.cpp - ARM constant islands --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Chris Lattner and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that splits the constant pool up into 'islands'
11 // which are scattered through-out the function. This is required due to the
12 // limited pc-relative displacements that ARM has.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "arm-cp-islands"
18 #include "ARMMachineFunctionInfo.h"
19 #include "ARMInstrInfo.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/Target/TargetData.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Support/Compiler.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/ADT/SmallVector.h"
28 #include "llvm/ADT/STLExtras.h"
29 #include "llvm/ADT/Statistic.h"
32 STATISTIC(NumCPEs, "Number of constpool entries");
33 STATISTIC(NumSplit, "Number of uncond branches inserted");
34 STATISTIC(NumCBrFixed, "Number of cond branches fixed");
35 STATISTIC(NumUBrFixed, "Number of uncond branches fixed");
38 /// ARMConstantIslands - Due to limited PC-relative displacements, ARM
39 /// requires constant pool entries to be scattered among the instructions
40 /// inside a function. To do this, it completely ignores the normal LLVM
41 /// constant pool; instead, it places constants wherever it feels like with
42 /// special instructions.
44 /// The terminology used in this pass includes:
45 /// Islands - Clumps of constants placed in the function.
46 /// Water - Potential places where an island could be formed.
47 /// CPE - A constant pool entry that has been placed somewhere, which
48 /// tracks a list of users.
49 class VISIBILITY_HIDDEN ARMConstantIslands : public MachineFunctionPass {
50 /// NextUID - Assign unique ID's to CPE's.
53 /// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed
54 /// by MBB Number. The two-byte pads required for Thumb alignment are
55 /// counted as part of the following block (i.e., the offset and size for
56 /// a padded block will both be ==2 mod 4).
57 std::vector<unsigned> BBSizes;
59 /// BBOffsets - the offset of each MBB in bytes, starting from 0.
60 /// The two-byte pads required for Thumb alignment are counted as part of
61 /// the following block.
62 std::vector<unsigned> BBOffsets;
64 /// WaterList - A sorted list of basic blocks where islands could be placed
65 /// (i.e. blocks that don't fall through to the following block, due
66 /// to a return, unreachable, or unconditional branch).
67 std::vector<MachineBasicBlock*> WaterList;
69 /// CPUser - One user of a constant pool, keeping the machine instruction
70 /// pointer, the constant pool being referenced, and the max displacement
71 /// allowed from the instruction to the CP.
76 CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp)
77 : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp) {}
80 /// CPUsers - Keep track of all of the machine instructions that use various
81 /// constant pools and their max displacement.
82 std::vector<CPUser> CPUsers;
84 /// CPEntry - One per constant pool entry, keeping the machine instruction
85 /// pointer, the constpool index, and the number of CPUser's which
86 /// reference this entry.
91 CPEntry(MachineInstr *cpemi, unsigned cpi, unsigned rc = 0)
92 : CPEMI(cpemi), CPI(cpi), RefCount(rc) {}
95 /// CPEntries - Keep track of all of the constant pool entry machine
96 /// instructions. For each original constpool index (i.e. those that
97 /// existed upon entry to this pass), it keeps a vector of entries.
98 /// Original elements are cloned as we go along; the clones are
99 /// put in the vector of the original element, but have distinct CPIs.
100 std::vector<std::vector<CPEntry> > CPEntries;
102 /// ImmBranch - One per immediate branch, keeping the machine instruction
103 /// pointer, conditional or unconditional, the max displacement,
104 /// and (if isCond is true) the corresponding unconditional branch
108 unsigned MaxDisp : 31;
111 ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr)
112 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {}
115 /// Branches - Keep track of all the immediate branch instructions.
117 std::vector<ImmBranch> ImmBranches;
119 /// PushPopMIs - Keep track of all the Thumb push / pop instructions.
121 SmallVector<MachineInstr*, 4> PushPopMIs;
123 /// HasFarJump - True if any far jump instruction has been emitted during
124 /// the branch fix up pass.
127 const TargetInstrInfo *TII;
128 ARMFunctionInfo *AFI;
131 virtual bool runOnMachineFunction(MachineFunction &Fn);
133 virtual const char *getPassName() const {
134 return "ARM constant island placement and branch shortening pass";
138 void DoInitialPlacement(MachineFunction &Fn,
139 std::vector<MachineInstr*> &CPEMIs);
140 CPEntry *findConstPoolEntry(unsigned CPI, const MachineInstr *CPEMI);
141 void InitialFunctionScan(MachineFunction &Fn,
142 const std::vector<MachineInstr*> &CPEMIs);
143 MachineBasicBlock *SplitBlockBeforeInstr(MachineInstr *MI);
144 void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB);
145 void AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta);
146 bool DecrementOldEntry(unsigned CPI, MachineInstr* CPEMI);
147 int LookForExistingCPEntry(CPUser& U, unsigned UserOffset);
148 bool LookForWater(CPUser&U, unsigned UserOffset,
149 MachineBasicBlock** NewMBB);
150 MachineBasicBlock* AcceptWater(MachineBasicBlock *WaterBB,
151 std::vector<MachineBasicBlock*>::iterator IP);
152 void CreateNewWater(unsigned CPUserIndex, unsigned UserOffset,
153 MachineBasicBlock** NewMBB);
154 bool HandleConstantPoolUser(MachineFunction &Fn, unsigned CPUserIndex);
155 void RemoveDeadCPEMI(MachineInstr *CPEMI);
156 bool RemoveUnusedCPEntries();
157 bool CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
158 MachineInstr *CPEMI, unsigned Disp,
160 bool WaterIsInRange(unsigned UserOffset, MachineBasicBlock *Water,
162 bool OffsetIsInRange(unsigned UserOffset, unsigned TrialOffset,
163 unsigned Disp, bool NegativeOK);
164 bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
165 bool FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br);
166 bool FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br);
167 bool FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br);
168 bool UndoLRSpillRestore();
170 unsigned GetOffsetOf(MachineInstr *MI) const;
172 void verify(MachineFunction &Fn);
176 /// verify - check BBOffsets, BBSizes, alignment of islands
177 void ARMConstantIslands::verify(MachineFunction &Fn) {
178 assert(BBOffsets.size() == BBSizes.size());
179 for (unsigned i = 1, e = BBOffsets.size(); i != e; ++i)
180 assert(BBOffsets[i-1]+BBSizes[i-1] == BBOffsets[i]);
182 for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
184 MachineBasicBlock *MBB = MBBI;
186 MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY)
187 assert((BBOffsets[MBB->getNumber()]%4 == 0 &&
188 BBSizes[MBB->getNumber()]%4 == 0) ||
189 (BBOffsets[MBB->getNumber()]%4 != 0 &&
190 BBSizes[MBB->getNumber()]%4 != 0));
195 /// print block size and offset information - debugging
196 void ARMConstantIslands::dumpBBs() {
197 for (unsigned J = 0, E = BBOffsets.size(); J !=E; ++J) {
198 DOUT << "block" << J << " offset" << BBOffsets[J] <<
199 " size" << BBSizes[J] << "\n";
203 /// createARMConstantIslandPass - returns an instance of the constpool
205 FunctionPass *llvm::createARMConstantIslandPass() {
206 return new ARMConstantIslands();
209 bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) {
210 MachineConstantPool &MCP = *Fn.getConstantPool();
212 TII = Fn.getTarget().getInstrInfo();
213 AFI = Fn.getInfo<ARMFunctionInfo>();
214 isThumb = AFI->isThumbFunction();
218 // Renumber all of the machine basic blocks in the function, guaranteeing that
219 // the numbers agree with the position of the block in the function.
222 /// Thumb functions containing constant pools get 2-byte alignment. This is so
223 /// we can keep exact track of where the alignment padding goes. Set default.
224 AFI->setAlign(isThumb ? 1U : 2U);
226 // Perform the initial placement of the constant pool entries. To start with,
227 // we put them all at the end of the function.
228 std::vector<MachineInstr*> CPEMIs;
229 if (!MCP.isEmpty()) {
230 DoInitialPlacement(Fn, CPEMIs);
235 /// The next UID to take is the first unused one.
236 NextUID = CPEMIs.size();
238 // Do the initial scan of the function, building up information about the
239 // sizes of each block, the location of all the water, and finding all of the
240 // constant pool users.
241 InitialFunctionScan(Fn, CPEMIs);
244 /// Remove dead constant pool entries.
245 RemoveUnusedCPEntries();
247 // Iteratively place constant pool entries and fix up branches until there
249 bool MadeChange = false;
252 for (unsigned i = 0, e = CPUsers.size(); i != e; ++i)
253 Change |= HandleConstantPoolUser(Fn, i);
255 for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i)
256 Change |= FixUpImmediateBr(Fn, ImmBranches[i]);
263 // After a while, this might be made debug-only, but it is not expensive.
266 // If LR has been forced spilled and no far jumps (i.e. BL) has been issued.
267 // Undo the spill / restore of LR if possible.
268 if (!HasFarJump && AFI->isLRSpilledForFarJump() && isThumb)
269 MadeChange |= UndoLRSpillRestore();
282 /// DoInitialPlacement - Perform the initial placement of the constant pool
283 /// entries. To start with, we put them all at the end of the function.
284 void ARMConstantIslands::DoInitialPlacement(MachineFunction &Fn,
285 std::vector<MachineInstr*> &CPEMIs){
286 // Create the basic block to hold the CPE's.
287 MachineBasicBlock *BB = new MachineBasicBlock();
288 Fn.getBasicBlockList().push_back(BB);
290 // Add all of the constants from the constant pool to the end block, use an
291 // identity mapping of CPI's to CPE's.
292 const std::vector<MachineConstantPoolEntry> &CPs =
293 Fn.getConstantPool()->getConstants();
295 const TargetData &TD = *Fn.getTarget().getTargetData();
296 for (unsigned i = 0, e = CPs.size(); i != e; ++i) {
297 unsigned Size = TD.getTypeSize(CPs[i].getType());
298 // Verify that all constant pool entries are a multiple of 4 bytes. If not,
299 // we would have to pad them out or something so that instructions stay
301 assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!");
302 MachineInstr *CPEMI =
303 BuildMI(BB, TII->get(ARM::CONSTPOOL_ENTRY))
304 .addImm(i).addConstantPoolIndex(i).addImm(Size);
305 CPEMIs.push_back(CPEMI);
307 // Add a new CPEntry, but no corresponding CPUser yet.
308 std::vector<CPEntry> CPEs;
309 CPEs.push_back(CPEntry(CPEMI, i));
310 CPEntries.push_back(CPEs);
312 DOUT << "Moved CPI#" << i << " to end of function as #" << i << "\n";
316 /// BBHasFallthrough - Return true if the specified basic block can fallthrough
317 /// into the block immediately after it.
318 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
319 // Get the next machine basic block in the function.
320 MachineFunction::iterator MBBI = MBB;
321 if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function.
324 MachineBasicBlock *NextBB = next(MBBI);
325 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
326 E = MBB->succ_end(); I != E; ++I)
333 /// findConstPoolEntry - Given the constpool index and CONSTPOOL_ENTRY MI,
334 /// look up the corresponding CPEntry.
335 ARMConstantIslands::CPEntry
336 *ARMConstantIslands::findConstPoolEntry(unsigned CPI,
337 const MachineInstr *CPEMI) {
338 std::vector<CPEntry> &CPEs = CPEntries[CPI];
339 // Number of entries per constpool index should be small, just do a
341 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
342 if (CPEs[i].CPEMI == CPEMI)
348 /// InitialFunctionScan - Do the initial scan of the function, building up
349 /// information about the sizes of each block, the location of all the water,
350 /// and finding all of the constant pool users.
351 void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn,
352 const std::vector<MachineInstr*> &CPEMIs) {
354 for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
356 MachineBasicBlock &MBB = *MBBI;
358 // If this block doesn't fall through into the next MBB, then this is
359 // 'water' that a constant pool island could be placed.
360 if (!BBHasFallthrough(&MBB))
361 WaterList.push_back(&MBB);
363 unsigned MBBSize = 0;
364 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
366 // Add instruction size to MBBSize.
367 MBBSize += ARM::GetInstSize(I);
369 int Opc = I->getOpcode();
370 if (TII->isBranch(Opc)) {
377 // A Thumb table jump may involve padding; for the offsets to
378 // be right, functions containing these must be 4-byte aligned.
380 if ((Offset+MBBSize)%4 != 0)
381 MBBSize += 2; // padding
382 continue; // Does not get an entry in ImmBranches
384 continue; // Ignore other JT branches
405 // Record this immediate branch.
406 unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale;
407 ImmBranches.push_back(ImmBranch(I, MaxOffs, isCond, UOpc));
410 if (Opc == ARM::tPUSH || Opc == ARM::tPOP_RET)
411 PushPopMIs.push_back(I);
413 // Scan the instructions for constant pool operands.
414 for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op)
415 if (I->getOperand(op).isConstantPoolIndex()) {
416 // We found one. The addressing mode tells us the max displacement
417 // from the PC that this instruction permits.
419 // Basic size info comes from the TSFlags field.
422 unsigned TSFlags = I->getInstrDescriptor()->TSFlags;
423 switch (TSFlags & ARMII::AddrModeMask) {
425 // Constant pool entries can reach anything.
426 if (I->getOpcode() == ARM::CONSTPOOL_ENTRY)
428 if (I->getOpcode() == ARM::tLEApcrel) {
429 Bits = 8; // Taking the address of a CP entry.
432 assert(0 && "Unknown addressing mode for CP reference!");
433 case ARMII::AddrMode1: // AM1: 8 bits << 2
435 Scale = 4; // Taking the address of a CP entry.
437 case ARMII::AddrMode2:
438 Bits = 12; // +-offset_12
440 case ARMII::AddrMode3:
441 Bits = 8; // +-offset_8
443 // addrmode4 has no immediate offset.
444 case ARMII::AddrMode5:
446 Scale = 4; // +-(offset_8*4)
448 case ARMII::AddrModeT1:
449 Bits = 5; // +offset_5
451 case ARMII::AddrModeT2:
453 Scale = 2; // +(offset_5*2)
455 case ARMII::AddrModeT4:
457 Scale = 4; // +(offset_5*4)
459 case ARMII::AddrModeTs:
461 Scale = 4; // +(offset_8*4)
465 // Remember that this is a user of a CP entry.
466 unsigned CPI = I->getOperand(op).getConstantPoolIndex();
467 MachineInstr *CPEMI = CPEMIs[CPI];
468 unsigned MaxOffs = ((1 << Bits)-1) * Scale;
469 CPUsers.push_back(CPUser(I, CPEMI, MaxOffs));
471 // Increment corresponding CPEntry reference count.
472 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
473 assert(CPE && "Cannot find a corresponding CPEntry!");
476 // Instructions can only use one CP entry, don't bother scanning the
477 // rest of the operands.
482 // In thumb mode, if this block is a constpool island, we may need padding
483 // so it's aligned on 4 byte boundary.
486 MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY &&
490 BBSizes.push_back(MBBSize);
491 BBOffsets.push_back(Offset);
496 /// GetOffsetOf - Return the current offset of the specified machine instruction
497 /// from the start of the function. This offset changes as stuff is moved
498 /// around inside the function.
499 unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const {
500 MachineBasicBlock *MBB = MI->getParent();
502 // The offset is composed of two things: the sum of the sizes of all MBB's
503 // before this instruction's block, and the offset from the start of the block
505 unsigned Offset = BBOffsets[MBB->getNumber()];
507 // If we're looking for a CONSTPOOL_ENTRY in Thumb, see if this block has
508 // alignment padding, and compensate if so.
510 MI->getOpcode() == ARM::CONSTPOOL_ENTRY &&
514 // Sum instructions before MI in MBB.
515 for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) {
516 assert(I != MBB->end() && "Didn't find MI in its own basic block?");
517 if (&*I == MI) return Offset;
518 Offset += ARM::GetInstSize(I);
522 /// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB
524 static bool CompareMBBNumbers(const MachineBasicBlock *LHS,
525 const MachineBasicBlock *RHS) {
526 return LHS->getNumber() < RHS->getNumber();
529 /// UpdateForInsertedWaterBlock - When a block is newly inserted into the
530 /// machine function, it upsets all of the block numbers. Renumber the blocks
531 /// and update the arrays that parallel this numbering.
532 void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) {
533 // Renumber the MBB's to keep them consequtive.
534 NewBB->getParent()->RenumberBlocks(NewBB);
536 // Insert a size into BBSizes to align it properly with the (newly
537 // renumbered) block numbers.
538 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
540 // Likewise for BBOffsets.
541 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
543 // Next, update WaterList. Specifically, we need to add NewMBB as having
544 // available water after it.
545 std::vector<MachineBasicBlock*>::iterator IP =
546 std::lower_bound(WaterList.begin(), WaterList.end(), NewBB,
548 WaterList.insert(IP, NewBB);
552 /// Split the basic block containing MI into two blocks, which are joined by
553 /// an unconditional branch. Update datastructures and renumber blocks to
554 /// account for this change and returns the newly created block.
555 MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
556 MachineBasicBlock *OrigBB = MI->getParent();
558 // Create a new MBB for the code after the OrigBB.
559 MachineBasicBlock *NewBB = new MachineBasicBlock(OrigBB->getBasicBlock());
560 MachineFunction::iterator MBBI = OrigBB; ++MBBI;
561 OrigBB->getParent()->getBasicBlockList().insert(MBBI, NewBB);
563 // Splice the instructions starting with MI over to NewBB.
564 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
566 // Add an unconditional branch from OrigBB to NewBB.
567 // Note the new unconditional branch is not being recorded.
568 BuildMI(OrigBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewBB);
571 // Update the CFG. All succs of OrigBB are now succs of NewBB.
572 while (!OrigBB->succ_empty()) {
573 MachineBasicBlock *Succ = *OrigBB->succ_begin();
574 OrigBB->removeSuccessor(Succ);
575 NewBB->addSuccessor(Succ);
577 // This pass should be run after register allocation, so there should be no
578 // PHI nodes to update.
579 assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI)
580 && "PHI nodes should be eliminated by now!");
583 // OrigBB branches to NewBB.
584 OrigBB->addSuccessor(NewBB);
586 // Update internal data structures to account for the newly inserted MBB.
587 // This is almost the same as UpdateForInsertedWaterBlock, except that
588 // the Water goes after OrigBB, not NewBB.
589 NewBB->getParent()->RenumberBlocks(NewBB);
591 // Insert a size into BBSizes to align it properly with the (newly
592 // renumbered) block numbers.
593 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
595 // Likewise for BBOffsets.
596 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
598 // Next, update WaterList. Specifically, we need to add OrigMBB as having
599 // available water after it (but not if it's already there, which happens
600 // when splitting before a conditional branch that is followed by an
601 // unconditional branch - in that case we want to insert NewBB).
602 std::vector<MachineBasicBlock*>::iterator IP =
603 std::lower_bound(WaterList.begin(), WaterList.end(), OrigBB,
605 MachineBasicBlock* WaterBB = *IP;
606 if (WaterBB == OrigBB)
607 WaterList.insert(next(IP), NewBB);
609 WaterList.insert(IP, OrigBB);
611 // Figure out how large the first NewMBB is. (It cannot
612 // contain a constpool_entry or tablejump.)
613 unsigned NewBBSize = 0;
614 for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
616 NewBBSize += ARM::GetInstSize(I);
618 unsigned OrigBBI = OrigBB->getNumber();
619 unsigned NewBBI = NewBB->getNumber();
620 // Set the size of NewBB in BBSizes.
621 BBSizes[NewBBI] = NewBBSize;
623 // We removed instructions from UserMBB, subtract that off from its size.
624 // Add 2 or 4 to the block to count the unconditional branch we added to it.
625 unsigned delta = isThumb ? 2 : 4;
626 BBSizes[OrigBBI] -= NewBBSize - delta;
628 // ...and adjust BBOffsets for NewBB accordingly.
629 BBOffsets[NewBBI] = BBOffsets[OrigBBI] + BBSizes[OrigBBI];
631 // All BBOffsets following these blocks must be modified.
632 AdjustBBOffsetsAfter(NewBB, delta);
637 /// OffsetIsInRange - Checks whether UserOffset (the location of a constant pool
638 /// reference) is within MaxDisp of TrialOffset (a proposed location of a
639 /// constant pool entry).
640 bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset,
641 unsigned TrialOffset, unsigned MaxDisp, bool NegativeOK) {
642 // On Thumb offsets==2 mod 4 are rounded down by the hardware for
643 // purposes of the displacement computation; compensate for that here.
644 // Effectively, the valid range of displacements is 2 bytes smaller for such
646 if (isThumb && UserOffset%4 !=0)
648 // CPEs will be rounded up to a multiple of 4.
649 if (isThumb && TrialOffset%4 != 0)
652 if (UserOffset <= TrialOffset) {
653 // User before the Trial.
654 if (TrialOffset-UserOffset <= MaxDisp)
656 } else if (NegativeOK) {
657 if (UserOffset-TrialOffset <= MaxDisp)
663 /// WaterIsInRange - Returns true if a CPE placed after the specified
664 /// Water (a basic block) will be in range for the specific MI.
666 bool ARMConstantIslands::WaterIsInRange(unsigned UserOffset,
667 MachineBasicBlock* Water, unsigned MaxDisp)
669 MachineFunction::iterator I = next(MachineFunction::iterator(Water));
670 unsigned CPEOffset = BBOffsets[Water->getNumber()] +
671 BBSizes[Water->getNumber()];
673 // If the CPE is to be inserted before the instruction, that will raise
674 // the offset of the instruction. (Currently applies only to ARM, so
675 // no alignment compensation attempted here.)
676 if (CPEOffset < UserOffset)
679 return OffsetIsInRange (UserOffset, CPEOffset, MaxDisp, !isThumb);
682 /// CPEIsInRange - Returns true if the distance between specific MI and
683 /// specific ConstPool entry instruction can fit in MI's displacement field.
684 bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
686 unsigned MaxDisp, bool DoDump) {
687 unsigned CPEOffset = GetOffsetOf(CPEMI);
688 assert(CPEOffset%4 == 0 && "Misaligned CPE");
691 DOUT << "User of CPE#" << CPEMI->getOperand(0).getImm()
692 << " max delta=" << MaxDisp
693 << " insn address=" << UserOffset
694 << " CPE address=" << CPEOffset
695 << " offset=" << int(CPEOffset-UserOffset) << "\t" << *MI;
698 return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, !isThumb);
701 /// BBIsJumpedOver - Return true of the specified basic block's only predecessor
702 /// unconditionally branches to its only successor.
703 static bool BBIsJumpedOver(MachineBasicBlock *MBB) {
704 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
707 MachineBasicBlock *Succ = *MBB->succ_begin();
708 MachineBasicBlock *Pred = *MBB->pred_begin();
709 MachineInstr *PredMI = &Pred->back();
710 if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB)
711 return PredMI->getOperand(0).getMBB() == Succ;
715 void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB,
717 MachineFunction::iterator MBBI = BB; MBBI = next(MBBI);
718 for(unsigned i=BB->getNumber()+1; i<BB->getParent()->getNumBlockIDs(); i++) {
719 BBOffsets[i] += delta;
720 // If some existing blocks have padding, adjust the padding as needed, a
721 // bit tricky. delta can be negative so don't use % on that.
723 MachineBasicBlock *MBB = MBBI;
725 // Constant pool entries require padding.
726 if (MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) {
727 unsigned oldOffset = BBOffsets[i] - delta;
728 if (oldOffset%4==0 && BBOffsets[i]%4!=0) {
732 } else if (oldOffset%4!=0 && BBOffsets[i]%4==0) {
733 // remove existing padding
738 // Thumb jump tables require padding. They can be at the end, or
739 // followed by an unconditional branch.
740 MachineInstr *ThumbJTMI = NULL;
741 if (prior(MBB->end())->getOpcode() == ARM::tBR_JTr)
742 ThumbJTMI = prior(MBB->end());
743 else if (prior(MBB->end()) != MBB->begin() &&
744 prior(prior(MBB->end()))->getOpcode() == ARM::tBR_JTr)
745 ThumbJTMI = prior(prior(MBB->end()));
747 unsigned newMIOffset = GetOffsetOf(ThumbJTMI);
748 unsigned oldMIOffset = newMIOffset - delta;
749 if (oldMIOffset%4 == 0 && newMIOffset%4 != 0) {
750 // remove existing padding
753 } else if (oldMIOffset%4 != 0 && newMIOffset%4 == 0) {
767 /// DecrementOldEntry - find the constant pool entry with index CPI
768 /// and instruction CPEMI, and decrement its refcount. If the refcount
769 /// becomes 0 remove the entry and instruction. Returns true if we removed
770 /// the entry, false if we didn't.
772 bool ARMConstantIslands::DecrementOldEntry(unsigned CPI, MachineInstr *CPEMI) {
773 // Find the old entry. Eliminate it if it is no longer used.
774 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
775 assert(CPE && "Unexpected!");
776 if (--CPE->RefCount == 0) {
777 RemoveDeadCPEMI(CPEMI);
785 /// LookForCPEntryInRange - see if the currently referenced CPE is in range;
786 /// if not, see if an in-range clone of the CPE is in range, and if so,
787 /// change the data structures so the user references the clone. Returns:
788 /// 0 = no existing entry found
789 /// 1 = entry found, and there were no code insertions or deletions
790 /// 2 = entry found, and there were code insertions or deletions
791 int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset)
793 MachineInstr *UserMI = U.MI;
794 MachineInstr *CPEMI = U.CPEMI;
796 // Check to see if the CPE is already in-range.
797 if (CPEIsInRange(UserMI, UserOffset, CPEMI, U.MaxDisp, true)) {
798 DOUT << "In range\n";
802 // No. Look for previously created clones of the CPE that are in range.
803 unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
804 std::vector<CPEntry> &CPEs = CPEntries[CPI];
805 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
806 // We already tried this one
807 if (CPEs[i].CPEMI == CPEMI)
809 // Removing CPEs can leave empty entries, skip
810 if (CPEs[i].CPEMI == NULL)
812 if (CPEIsInRange(UserMI, UserOffset, CPEs[i].CPEMI, U.MaxDisp, false)) {
813 DOUT << "Replacing CPE#" << CPI << " with CPE#" << CPEs[i].CPI << "\n";
814 // Point the CPUser node to the replacement
815 U.CPEMI = CPEs[i].CPEMI;
816 // Change the CPI in the instruction operand to refer to the clone.
817 for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j)
818 if (UserMI->getOperand(j).isConstantPoolIndex()) {
819 UserMI->getOperand(j).setConstantPoolIndex(CPEs[i].CPI);
822 // Adjust the refcount of the clone...
824 // ...and the original. If we didn't remove the old entry, none of the
825 // addresses changed, so we don't need another pass.
826 return DecrementOldEntry(CPI, CPEMI) ? 2 : 1;
832 /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in
833 /// the specific unconditional branch instruction.
834 static inline unsigned getUnconditionalBrDisp(int Opc) {
835 return (Opc == ARM::tB) ? ((1<<10)-1)*2 : ((1<<23)-1)*4;
838 /// AcceptWater - Small amount of common code factored out of the following.
840 MachineBasicBlock* ARMConstantIslands::AcceptWater(MachineBasicBlock *WaterBB,
841 std::vector<MachineBasicBlock*>::iterator IP) {
842 DOUT << "found water in range\n";
843 // Remove the original WaterList entry; we want subsequent
844 // insertions in this vicinity to go after the one we're
845 // about to insert. This considerably reduces the number
846 // of times we have to move the same CPE more than once.
848 // CPE goes before following block (NewMBB).
849 return next(MachineFunction::iterator(WaterBB));
852 /// LookForWater - look for an existing entry in the WaterList in which
853 /// we can place the CPE referenced from U so it's within range of U's MI.
854 /// Returns true if found, false if not. If it returns true, *NewMBB
855 /// is set to the WaterList entry.
856 /// For ARM, we prefer the water that's farthest away. For Thumb, prefer
857 /// water that will not introduce padding to water that will; within each
858 /// group, prefer the water that's farthest away.
860 bool ARMConstantIslands::LookForWater(CPUser &U, unsigned UserOffset,
861 MachineBasicBlock** NewMBB) {
862 std::vector<MachineBasicBlock*>::iterator IPThatWouldPad;
863 MachineBasicBlock* WaterBBThatWouldPad = NULL;
864 if (!WaterList.empty()) {
865 for (std::vector<MachineBasicBlock*>::iterator IP = prior(WaterList.end()),
866 B = WaterList.begin();; --IP) {
867 MachineBasicBlock* WaterBB = *IP;
868 if (WaterIsInRange(UserOffset, WaterBB, U.MaxDisp)) {
870 (BBOffsets[WaterBB->getNumber()] +
871 BBSizes[WaterBB->getNumber()])%4 != 0) {
872 // This is valid Water, but would introduce padding. Remember
873 // it in case we don't find any Water that doesn't do this.
874 if (!WaterBBThatWouldPad) {
875 WaterBBThatWouldPad = WaterBB;
879 *NewMBB = AcceptWater(WaterBB, IP);
887 if (isThumb && WaterBBThatWouldPad) {
888 *NewMBB = AcceptWater(WaterBBThatWouldPad, IPThatWouldPad);
894 /// CreateNewWater - No existing WaterList entry will work for
895 /// CPUsers[CPUserIndex], so create a place to put the CPE. The end of the
896 /// block is used if in range, and the conditional branch munged so control
897 /// flow is correct. Otherwise the block is split to create a hole with an
898 /// unconditional branch around it. In either case *NewMBB is set to a
899 /// block following which the new island can be inserted (the WaterList
900 /// is not adjusted).
902 void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex,
903 unsigned UserOffset, MachineBasicBlock** NewMBB) {
904 CPUser &U = CPUsers[CPUserIndex];
905 MachineInstr *UserMI = U.MI;
906 MachineInstr *CPEMI = U.CPEMI;
907 MachineBasicBlock *UserMBB = UserMI->getParent();
908 unsigned OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()] +
909 BBSizes[UserMBB->getNumber()];
910 assert(OffsetOfNextBlock== BBOffsets[UserMBB->getNumber()+1]);
912 // If the use is at the end of the block, or the end of the block
913 // is within range, make new water there. (The addition below is
914 // for the unconditional branch we will be adding: 4 bytes on ARM,
915 // 2 on Thumb. Possible Thumb alignment padding is allowed for
916 // inside OffsetIsInRange.
917 // If the block ends in an unconditional branch already, it is water,
918 // and is known to be out of range, so we'll always be adding a branch.)
919 if (&UserMBB->back() == UserMI ||
920 OffsetIsInRange(UserOffset, OffsetOfNextBlock + (isThumb ? 2: 4),
921 U.MaxDisp, !isThumb)) {
922 DOUT << "Split at end of block\n";
923 if (&UserMBB->back() == UserMI)
924 assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!");
925 *NewMBB = next(MachineFunction::iterator(UserMBB));
926 // Add an unconditional branch from UserMBB to fallthrough block.
927 // Record it for branch lengthening; this new branch will not get out of
928 // range, but if the preceding conditional branch is out of range, the
929 // targets will be exchanged, and the altered branch may be out of
930 // range, so the machinery has to know about it.
931 int UncondBr = isThumb ? ARM::tB : ARM::B;
932 BuildMI(UserMBB, TII->get(UncondBr)).addMBB(*NewMBB);
933 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr);
934 ImmBranches.push_back(ImmBranch(&UserMBB->back(),
935 MaxDisp, false, UncondBr));
936 int delta = isThumb ? 2 : 4;
937 BBSizes[UserMBB->getNumber()] += delta;
938 AdjustBBOffsetsAfter(UserMBB, delta);
940 // What a big block. Find a place within the block to split it.
941 // This is a little tricky on Thumb since instructions are 2 bytes
942 // and constant pool entries are 4 bytes: if instruction I references
943 // island CPE, and instruction I+1 references CPE', it will
944 // not work well to put CPE as far forward as possible, since then
945 // CPE' cannot immediately follow it (that location is 2 bytes
946 // farther away from I+1 than CPE was from I) and we'd need to create
947 // a new island. So, we make a first guess, then walk through the
948 // instructions between the one currently being looked at and the
949 // possible insertion point, and make sure any other instructions
950 // that reference CPEs will be able to use the same island area;
951 // if not, we back up the insertion point.
953 // The 4 in the following is for the unconditional branch we'll be
954 // inserting (allows for long branch on Thumb). Alignment of the
955 // island is handled inside OffsetIsInRange.
956 unsigned BaseInsertOffset = UserOffset + U.MaxDisp -4;
957 // This could point off the end of the block if we've already got
958 // constant pool entries following this block; only the last one is
959 // in the water list. Back past any possible branches (allow for a
960 // conditional and a maximally long unconditional).
961 if (BaseInsertOffset >= BBOffsets[UserMBB->getNumber()+1])
962 BaseInsertOffset = BBOffsets[UserMBB->getNumber()+1] -
964 unsigned EndInsertOffset = BaseInsertOffset +
965 CPEMI->getOperand(2).getImm();
966 MachineBasicBlock::iterator MI = UserMI;
968 unsigned CPUIndex = CPUserIndex+1;
969 for (unsigned Offset = UserOffset+ARM::GetInstSize(UserMI);
970 Offset < BaseInsertOffset;
971 Offset += ARM::GetInstSize(MI),
973 if (CPUIndex < CPUsers.size() && CPUsers[CPUIndex].MI == MI) {
974 if (!OffsetIsInRange(Offset, EndInsertOffset,
975 CPUsers[CPUIndex].MaxDisp, !isThumb)) {
976 BaseInsertOffset -= (isThumb ? 2 : 4);
977 EndInsertOffset -= (isThumb ? 2 : 4);
979 // This is overly conservative, as we don't account for CPEMIs
980 // being reused within the block, but it doesn't matter much.
981 EndInsertOffset += CPUsers[CPUIndex].CPEMI->getOperand(2).getImm();
985 DOUT << "Split in middle of big block\n";
986 *NewMBB = SplitBlockBeforeInstr(prior(MI));
990 /// HandleConstantPoolUser - Analyze the specified user, checking to see if it
991 /// is out-of-range. If so, pick it up the constant pool value and move it some
992 /// place in-range. Return true if we changed any addresses (thus must run
993 /// another pass of branch lengthening), false otherwise.
994 bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn,
995 unsigned CPUserIndex){
996 CPUser &U = CPUsers[CPUserIndex];
997 MachineInstr *UserMI = U.MI;
998 MachineInstr *CPEMI = U.CPEMI;
999 unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
1000 unsigned Size = CPEMI->getOperand(2).getImm();
1001 MachineBasicBlock *NewMBB;
1002 // Compute this only once, it's expensive. The 4 or 8 is the value the
1003 // hardware keeps in the PC (2 insns ahead of the reference).
1004 unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8);
1006 // Special case: tLEApcrel are two instructions MI's. The actual user is the
1007 // second instruction.
1008 if (UserMI->getOpcode() == ARM::tLEApcrel)
1011 // See if the current entry is within range, or there is a clone of it
1013 int result = LookForExistingCPEntry(U, UserOffset);
1014 if (result==1) return false;
1015 else if (result==2) return true;
1017 // No existing clone of this CPE is within range.
1018 // We will be generating a new clone. Get a UID for it.
1019 unsigned ID = NextUID++;
1021 // Look for water where we can place this CPE. We look for the farthest one
1022 // away that will work. Forward references only for now (although later
1023 // we might find some that are backwards).
1025 if (!LookForWater(U, UserOffset, &NewMBB)) {
1027 DOUT << "No water found\n";
1028 CreateNewWater(CPUserIndex, UserOffset, &NewMBB);
1031 // Okay, we know we can put an island before NewMBB now, do it!
1032 MachineBasicBlock *NewIsland = new MachineBasicBlock();
1033 Fn.getBasicBlockList().insert(NewMBB, NewIsland);
1035 // Update internal data structures to account for the newly inserted MBB.
1036 UpdateForInsertedWaterBlock(NewIsland);
1038 // Decrement the old entry, and remove it if refcount becomes 0.
1039 DecrementOldEntry(CPI, CPEMI);
1041 // Now that we have an island to add the CPE to, clone the original CPE and
1042 // add it to the island.
1043 U.CPEMI = BuildMI(NewIsland, TII->get(ARM::CONSTPOOL_ENTRY))
1044 .addImm(ID).addConstantPoolIndex(CPI).addImm(Size);
1045 CPEntries[CPI].push_back(CPEntry(U.CPEMI, ID, 1));
1048 BBOffsets[NewIsland->getNumber()] = BBOffsets[NewMBB->getNumber()];
1049 // Compensate for .align 2 in thumb mode.
1050 if (isThumb && BBOffsets[NewIsland->getNumber()]%4 != 0)
1052 // Increase the size of the island block to account for the new entry.
1053 BBSizes[NewIsland->getNumber()] += Size;
1054 AdjustBBOffsetsAfter(NewIsland, Size);
1056 // Finally, change the CPI in the instruction operand to be ID.
1057 for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i)
1058 if (UserMI->getOperand(i).isConstantPoolIndex()) {
1059 UserMI->getOperand(i).setConstantPoolIndex(ID);
1063 DOUT << " Moved CPE to #" << ID << " CPI=" << CPI << "\t" << *UserMI;
1068 /// RemoveDeadCPEMI - Remove a dead constant pool entry instruction. Update
1069 /// sizes and offsets of impacted basic blocks.
1070 void ARMConstantIslands::RemoveDeadCPEMI(MachineInstr *CPEMI) {
1071 MachineBasicBlock *CPEBB = CPEMI->getParent();
1072 unsigned Size = CPEMI->getOperand(2).getImm();
1073 CPEMI->eraseFromParent();
1074 BBSizes[CPEBB->getNumber()] -= Size;
1075 // All succeeding offsets have the current size value added in, fix this.
1076 if (CPEBB->empty()) {
1077 // In thumb mode, the size of island may be padded by two to compensate for
1078 // the alignment requirement. Then it will now be 2 when the block is
1079 // empty, so fix this.
1080 // All succeeding offsets have the current size value added in, fix this.
1081 if (BBSizes[CPEBB->getNumber()] != 0) {
1082 Size += BBSizes[CPEBB->getNumber()];
1083 BBSizes[CPEBB->getNumber()] = 0;
1086 AdjustBBOffsetsAfter(CPEBB, -Size);
1087 // An island has only one predecessor BB and one successor BB. Check if
1088 // this BB's predecessor jumps directly to this BB's successor. This
1089 // shouldn't happen currently.
1090 assert(!BBIsJumpedOver(CPEBB) && "How did this happen?");
1091 // FIXME: remove the empty blocks after all the work is done?
1094 /// RemoveUnusedCPEntries - Remove constant pool entries whose refcounts
1096 bool ARMConstantIslands::RemoveUnusedCPEntries() {
1097 unsigned MadeChange = false;
1098 for (unsigned i = 0, e = CPEntries.size(); i != e; ++i) {
1099 std::vector<CPEntry> &CPEs = CPEntries[i];
1100 for (unsigned j = 0, ee = CPEs.size(); j != ee; ++j) {
1101 if (CPEs[j].RefCount == 0 && CPEs[j].CPEMI) {
1102 RemoveDeadCPEMI(CPEs[j].CPEMI);
1103 CPEs[j].CPEMI = NULL;
1111 /// BBIsInRange - Returns true if the distance between specific MI and
1112 /// specific BB can fit in MI's displacement field.
1113 bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB,
1115 unsigned PCAdj = isThumb ? 4 : 8;
1116 unsigned BrOffset = GetOffsetOf(MI) + PCAdj;
1117 unsigned DestOffset = BBOffsets[DestBB->getNumber()];
1119 DOUT << "Branch of destination BB#" << DestBB->getNumber()
1120 << " from BB#" << MI->getParent()->getNumber()
1121 << " max delta=" << MaxDisp
1122 << " from " << GetOffsetOf(MI) << " to " << DestOffset
1123 << " offset " << int(DestOffset-BrOffset) << "\t" << *MI;
1125 if (BrOffset <= DestOffset) {
1126 // Branch before the Dest.
1127 if (DestOffset-BrOffset <= MaxDisp)
1130 if (BrOffset-DestOffset <= MaxDisp)
1136 /// FixUpImmediateBr - Fix up an immediate branch whose destination is too far
1137 /// away to fit in its displacement field.
1138 bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) {
1139 MachineInstr *MI = Br.MI;
1140 MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
1142 // Check to see if the DestBB is already in-range.
1143 if (BBIsInRange(MI, DestBB, Br.MaxDisp))
1147 return FixUpUnconditionalBr(Fn, Br);
1148 return FixUpConditionalBr(Fn, Br);
1151 /// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is
1152 /// too far away to fit in its displacement field. If the LR register has been
1153 /// spilled in the epilogue, then we can use BL to implement a far jump.
1154 /// Otherwise, add an intermediate branch instruction to to a branch.
1156 ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) {
1157 MachineInstr *MI = Br.MI;
1158 MachineBasicBlock *MBB = MI->getParent();
1159 assert(isThumb && "Expected a Thumb function!");
1161 // Use BL to implement far jump.
1162 Br.MaxDisp = (1 << 21) * 2;
1163 MI->setInstrDescriptor(TII->get(ARM::tBfar));
1164 BBSizes[MBB->getNumber()] += 2;
1165 AdjustBBOffsetsAfter(MBB, 2);
1169 DOUT << " Changed B to long jump " << *MI;
1174 /// FixUpConditionalBr - Fix up a conditional branch whose destination is too
1175 /// far away to fit in its displacement field. It is converted to an inverse
1176 /// conditional branch + an unconditional branch to the destination.
1178 ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
1179 MachineInstr *MI = Br.MI;
1180 MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
1182 // Add a unconditional branch to the destination and invert the branch
1183 // condition to jump over it:
1189 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImmedValue();
1190 CC = ARMCC::getOppositeCondition(CC);
1192 // If the branch is at the end of its MBB and that has a fall-through block,
1193 // direct the updated conditional branch to the fall-through block. Otherwise,
1194 // split the MBB before the next instruction.
1195 MachineBasicBlock *MBB = MI->getParent();
1196 MachineInstr *BMI = &MBB->back();
1197 bool NeedSplit = (BMI != MI) || !BBHasFallthrough(MBB);
1201 if (next(MachineBasicBlock::iterator(MI)) == MBB->back() &&
1202 BMI->getOpcode() == Br.UncondBr) {
1203 // Last MI in the BB is a unconditional branch. Can we simply invert the
1204 // condition and swap destinations:
1210 MachineBasicBlock *NewDest = BMI->getOperand(0).getMachineBasicBlock();
1211 if (BBIsInRange(MI, NewDest, Br.MaxDisp)) {
1212 DOUT << " Invert Bcc condition and swap its destination with " << *BMI;
1213 BMI->getOperand(0).setMachineBasicBlock(DestBB);
1214 MI->getOperand(0).setMachineBasicBlock(NewDest);
1215 MI->getOperand(1).setImm(CC);
1222 SplitBlockBeforeInstr(MI);
1223 // No need for the branch to the next block. We're adding a unconditional
1224 // branch to the destination.
1225 int delta = ARM::GetInstSize(&MBB->back());
1226 BBSizes[MBB->getNumber()] -= delta;
1227 MachineBasicBlock* SplitBB = next(MachineFunction::iterator(MBB));
1228 AdjustBBOffsetsAfter(SplitBB, -delta);
1229 MBB->back().eraseFromParent();
1230 // BBOffsets[SplitBB] is wrong temporarily, fixed below
1232 MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
1234 DOUT << " Insert B to BB#" << DestBB->getNumber()
1235 << " also invert condition and change dest. to BB#"
1236 << NextBB->getNumber() << "\n";
1238 // Insert a new conditional branch and a new unconditional branch.
1239 // Also update the ImmBranch as well as adding a new entry for the new branch.
1240 BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB).addImm(CC);
1241 Br.MI = &MBB->back();
1242 BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back());
1243 BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB);
1244 BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back());
1245 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
1246 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
1248 // Remove the old conditional branch. It may or may not still be in MBB.
1249 BBSizes[MI->getParent()->getNumber()] -= ARM::GetInstSize(MI);
1250 MI->eraseFromParent();
1252 // The net size change is an addition of one unconditional branch.
1253 int delta = ARM::GetInstSize(&MBB->back());
1254 AdjustBBOffsetsAfter(MBB, delta);
1258 /// UndoLRSpillRestore - Remove Thumb push / pop instructions that only spills
1259 /// LR / restores LR to pc.
1260 bool ARMConstantIslands::UndoLRSpillRestore() {
1261 bool MadeChange = false;
1262 for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) {
1263 MachineInstr *MI = PushPopMIs[i];
1264 if (MI->getNumOperands() == 1) {
1265 if (MI->getOpcode() == ARM::tPOP_RET &&
1266 MI->getOperand(0).getReg() == ARM::PC)
1267 BuildMI(MI->getParent(), TII->get(ARM::tBX_RET));
1268 MI->eraseFromParent();