1 //===-- ARMConstantIslandPass.cpp - ARM constant islands --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Chris Lattner and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that splits the constant pool up into 'islands'
11 // which are scattered through-out the function. This is required due to the
12 // limited pc-relative displacements that ARM has.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "arm-cp-islands"
18 #include "ARMMachineFunctionInfo.h"
19 #include "ARMInstrInfo.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/Target/TargetData.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Support/Compiler.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/ADT/STLExtras.h"
28 #include "llvm/ADT/Statistic.h"
32 STATISTIC(NumSplit, "Number of uncond branches inserted");
33 STATISTIC(NumCBrFixed, "Number of cond branches fixed");
34 STATISTIC(NumUBrFixed, "Number of uncond branches fixed");
37 /// ARMConstantIslands - Due to limited pc-relative displacements, ARM
38 /// requires constant pool entries to be scattered among the instructions
39 /// inside a function. To do this, it completely ignores the normal LLVM
40 /// constant pool, instead, it places constants where-ever it feels like with
41 /// special instructions.
43 /// The terminology used in this pass includes:
44 /// Islands - Clumps of constants placed in the function.
45 /// Water - Potential places where an island could be formed.
46 /// CPE - A constant pool entry that has been placed somewhere, which
47 /// tracks a list of users.
48 class VISIBILITY_HIDDEN ARMConstantIslands : public MachineFunctionPass {
49 /// NextUID - Assign unique ID's to CPE's.
52 /// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed
54 std::vector<unsigned> BBSizes;
56 /// WaterList - A sorted list of basic blocks where islands could be placed
57 /// (i.e. blocks that don't fall through to the following block, due
58 /// to a return, unreachable, or unconditional branch).
59 std::vector<MachineBasicBlock*> WaterList;
61 /// CPUser - One user of a constant pool, keeping the machine instruction
62 /// pointer, the constant pool being referenced, and the max displacement
63 /// allowed from the instruction to the CP.
68 CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp)
69 : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp) {}
72 /// CPUsers - Keep track of all of the machine instructions that use various
73 /// constant pools and their max displacement.
74 std::vector<CPUser> CPUsers;
76 /// ImmBranch - One per immediate branch, keeping the machine instruction
77 /// pointer, conditional or unconditional, the max displacement,
78 /// and (if isCond is true) the corresponding unconditional branch
82 unsigned MaxDisp : 31;
85 ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr)
86 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {}
89 /// Branches - Keep track of all the immediate branch instructions.
91 std::vector<ImmBranch> ImmBranches;
93 /// PushPopMIs - Keep track of all the Thumb push / pop instructions.
95 std::vector<MachineInstr*> PushPopMIs;
97 /// HasFarJump - True if any far jump instruction has been emitted during
98 /// the branch fix up pass.
101 const TargetInstrInfo *TII;
102 const ARMFunctionInfo *AFI;
104 virtual bool runOnMachineFunction(MachineFunction &Fn);
106 virtual const char *getPassName() const {
107 return "ARM constant island placement and branch shortening pass";
111 void DoInitialPlacement(MachineFunction &Fn,
112 std::vector<MachineInstr*> &CPEMIs);
113 void InitialFunctionScan(MachineFunction &Fn,
114 const std::vector<MachineInstr*> &CPEMIs);
115 MachineBasicBlock *SplitBlockBeforeInstr(MachineInstr *MI);
116 void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB);
117 bool HandleConstantPoolUser(MachineFunction &Fn, CPUser &U);
118 bool CPEIsInRange(MachineInstr *MI, MachineInstr *CPEMI, unsigned Disp);
119 bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
120 bool FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br);
121 bool FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br);
122 bool FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br);
123 bool UndoLRSpillRestore();
125 unsigned GetOffsetOf(MachineInstr *MI) const;
126 unsigned GetOffsetOf(MachineBasicBlock *MBB) const;
130 /// createARMConstantIslandPass - returns an instance of the constpool
132 FunctionPass *llvm::createARMConstantIslandPass() {
133 return new ARMConstantIslands();
136 bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) {
137 MachineConstantPool &MCP = *Fn.getConstantPool();
139 TII = Fn.getTarget().getInstrInfo();
140 AFI = Fn.getInfo<ARMFunctionInfo>();
144 // Renumber all of the machine basic blocks in the function, guaranteeing that
145 // the numbers agree with the position of the block in the function.
148 // Perform the initial placement of the constant pool entries. To start with,
149 // we put them all at the end of the function.
150 std::vector<MachineInstr*> CPEMIs;
152 DoInitialPlacement(Fn, CPEMIs);
154 /// The next UID to take is the first unused one.
155 NextUID = CPEMIs.size();
157 // Do the initial scan of the function, building up information about the
158 // sizes of each block, the location of all the water, and finding all of the
159 // constant pool users.
160 InitialFunctionScan(Fn, CPEMIs);
163 // Iteratively place constant pool entries and fix up branches until there
165 bool MadeChange = false;
168 for (unsigned i = 0, e = CPUsers.size(); i != e; ++i)
169 Change |= HandleConstantPoolUser(Fn, CPUsers[i]);
170 for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i)
171 Change |= FixUpImmediateBr(Fn, ImmBranches[i]);
177 // If LR has been forced spilled and no far jumps (i.e. BL) has been issued.
178 // Undo the spill / restore of LR if possible.
179 if (!HasFarJump && AFI->isLRForceSpilled() && AFI->isThumbFunction())
180 MadeChange |= UndoLRSpillRestore();
190 /// DoInitialPlacement - Perform the initial placement of the constant pool
191 /// entries. To start with, we put them all at the end of the function.
192 void ARMConstantIslands::DoInitialPlacement(MachineFunction &Fn,
193 std::vector<MachineInstr*> &CPEMIs){
194 // Create the basic block to hold the CPE's.
195 MachineBasicBlock *BB = new MachineBasicBlock();
196 Fn.getBasicBlockList().push_back(BB);
198 // Add all of the constants from the constant pool to the end block, use an
199 // identity mapping of CPI's to CPE's.
200 const std::vector<MachineConstantPoolEntry> &CPs =
201 Fn.getConstantPool()->getConstants();
203 const TargetData &TD = *Fn.getTarget().getTargetData();
204 for (unsigned i = 0, e = CPs.size(); i != e; ++i) {
205 unsigned Size = TD.getTypeSize(CPs[i].getType());
206 // Verify that all constant pool entries are a multiple of 4 bytes. If not,
207 // we would have to pad them out or something so that instructions stay
209 assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!");
210 MachineInstr *CPEMI =
211 BuildMI(BB, TII->get(ARM::CONSTPOOL_ENTRY))
212 .addImm(i).addConstantPoolIndex(i).addImm(Size);
213 CPEMIs.push_back(CPEMI);
214 DEBUG(std::cerr << "Moved CPI#" << i << " to end of function as #"
219 /// BBHasFallthrough - Return true of the specified basic block can fallthrough
220 /// into the block immediately after it.
221 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
222 // Get the next machine basic block in the function.
223 MachineFunction::iterator MBBI = MBB;
224 if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function.
227 MachineBasicBlock *NextBB = next(MBBI);
228 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
229 E = MBB->succ_end(); I != E; ++I)
236 /// InitialFunctionScan - Do the initial scan of the function, building up
237 /// information about the sizes of each block, the location of all the water,
238 /// and finding all of the constant pool users.
239 void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn,
240 const std::vector<MachineInstr*> &CPEMIs) {
241 for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
243 MachineBasicBlock &MBB = *MBBI;
245 // If this block doesn't fall through into the next MBB, then this is
246 // 'water' that a constant pool island could be placed.
247 if (!BBHasFallthrough(&MBB))
248 WaterList.push_back(&MBB);
250 unsigned MBBSize = 0;
251 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
253 // Add instruction size to MBBSize.
254 MBBSize += ARM::GetInstSize(I);
256 int Opc = I->getOpcode();
257 if (TII->isBranch(Opc)) {
264 continue; // Ignore JT branches
285 // Record this immediate branch.
286 unsigned MaxOffs = (1 << (Bits-1)) * Scale;
287 ImmBranches.push_back(ImmBranch(I, MaxOffs, isCond, UOpc));
290 if (Opc == ARM::tPUSH || Opc == ARM::tPOP_RET)
291 PushPopMIs.push_back(I);
293 // Scan the instructions for constant pool operands.
294 for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op)
295 if (I->getOperand(op).isConstantPoolIndex()) {
296 // We found one. The addressing mode tells us the max displacement
297 // from the PC that this instruction permits.
299 // Basic size info comes from the TSFlags field.
302 unsigned TSFlags = I->getInstrDescriptor()->TSFlags;
303 switch (TSFlags & ARMII::AddrModeMask) {
305 // Constant pool entries can reach anything.
306 if (I->getOpcode() == ARM::CONSTPOOL_ENTRY)
308 assert(0 && "Unknown addressing mode for CP reference!");
309 case ARMII::AddrMode1: // AM1: 8 bits << 2
311 Scale = 4; // Taking the address of a CP entry.
313 case ARMII::AddrMode2:
315 Scale = 2; // +-offset_12
317 case ARMII::AddrMode3:
319 Scale = 2; // +-offset_8
321 // addrmode4 has no immediate offset.
322 case ARMII::AddrMode5:
324 Scale = 4; // +-(offset_8*4)
326 case ARMII::AddrModeT1:
327 Bits = 5; // +offset_5
329 case ARMII::AddrModeT2:
331 Scale = 2; // +(offset_5*2)
333 case ARMII::AddrModeT4:
335 Scale = 4; // +(offset_5*4)
337 case ARMII::AddrModeTs:
339 Scale = 4; // +(offset_8*4)
343 // Remember that this is a user of a CP entry.
344 MachineInstr *CPEMI =CPEMIs[I->getOperand(op).getConstantPoolIndex()];
345 unsigned MaxOffs = (1 << (Bits-1)) * Scale;
346 CPUsers.push_back(CPUser(I, CPEMI, MaxOffs));
348 // Instructions can only use one CP entry, don't bother scanning the
349 // rest of the operands.
354 // In thumb mode, if this block is a constpool island, pessmisticly assume
355 // it needs to be padded by two byte so it's aligned on 4 byte boundary.
356 if (AFI->isThumbFunction() &&
357 MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY)
360 BBSizes.push_back(MBBSize);
364 /// GetOffsetOf - Return the current offset of the specified machine instruction
365 /// from the start of the function. This offset changes as stuff is moved
366 /// around inside the function.
367 unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const {
368 MachineBasicBlock *MBB = MI->getParent();
370 // The offset is composed of two things: the sum of the sizes of all MBB's
371 // before this instruction's block, and the offset from the start of the block
375 // Sum block sizes before MBB.
376 for (unsigned BB = 0, e = MBB->getNumber(); BB != e; ++BB)
377 Offset += BBSizes[BB];
379 // Sum instructions before MI in MBB.
380 for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) {
381 assert(I != MBB->end() && "Didn't find MI in its own basic block?");
382 if (&*I == MI) return Offset;
383 Offset += ARM::GetInstSize(I);
387 /// GetOffsetOf - Return the current offset of the specified machine BB
388 /// from the start of the function. This offset changes as stuff is moved
389 /// around inside the function.
390 unsigned ARMConstantIslands::GetOffsetOf(MachineBasicBlock *MBB) const {
391 // Sum block sizes before MBB.
393 for (unsigned BB = 0, e = MBB->getNumber(); BB != e; ++BB)
394 Offset += BBSizes[BB];
399 /// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB
401 static bool CompareMBBNumbers(const MachineBasicBlock *LHS,
402 const MachineBasicBlock *RHS) {
403 return LHS->getNumber() < RHS->getNumber();
406 /// UpdateForInsertedWaterBlock - When a block is newly inserted into the
407 /// machine function, it upsets all of the block numbers. Renumber the blocks
408 /// and update the arrays that parallel this numbering.
409 void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) {
410 // Renumber the MBB's to keep them consequtive.
411 NewBB->getParent()->RenumberBlocks(NewBB);
413 // Insert a size into BBSizes to align it properly with the (newly
414 // renumbered) block numbers.
415 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
417 // Next, update WaterList. Specifically, we need to add NewMBB as having
418 // available water after it.
419 std::vector<MachineBasicBlock*>::iterator IP =
420 std::lower_bound(WaterList.begin(), WaterList.end(), NewBB,
422 WaterList.insert(IP, NewBB);
426 /// Split the basic block containing MI into two blocks, which are joined by
427 /// an unconditional branch. Update datastructures and renumber blocks to
428 /// account for this change and returns the newly created block.
429 MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
430 MachineBasicBlock *OrigBB = MI->getParent();
431 bool isThumb = AFI->isThumbFunction();
433 // Create a new MBB for the code after the OrigBB.
434 MachineBasicBlock *NewBB = new MachineBasicBlock(OrigBB->getBasicBlock());
435 MachineFunction::iterator MBBI = OrigBB; ++MBBI;
436 OrigBB->getParent()->getBasicBlockList().insert(MBBI, NewBB);
438 // Splice the instructions starting with MI over to NewBB.
439 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
441 // Add an unconditional branch from OrigBB to NewBB.
442 // Note the new unconditional branch is not being recorded.
443 BuildMI(OrigBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewBB);
446 // Update the CFG. All succs of OrigBB are now succs of NewBB.
447 while (!OrigBB->succ_empty()) {
448 MachineBasicBlock *Succ = *OrigBB->succ_begin();
449 OrigBB->removeSuccessor(Succ);
450 NewBB->addSuccessor(Succ);
452 // This pass should be run after register allocation, so there should be no
453 // PHI nodes to update.
454 assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI)
455 && "PHI nodes should be eliminated by now!");
458 // OrigBB branches to NewBB.
459 OrigBB->addSuccessor(NewBB);
461 // Update internal data structures to account for the newly inserted MBB.
462 UpdateForInsertedWaterBlock(NewBB);
464 // Figure out how large the first NewMBB is.
465 unsigned NewBBSize = 0;
466 for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
468 NewBBSize += ARM::GetInstSize(I);
470 // Set the size of NewBB in BBSizes.
471 BBSizes[NewBB->getNumber()] = NewBBSize;
473 // We removed instructions from UserMBB, subtract that off from its size.
474 // Add 2 or 4 to the block to count the unconditional branch we added to it.
475 BBSizes[OrigBB->getNumber()] -= NewBBSize - (isThumb ? 2 : 4);
480 /// CPEIsInRange - Returns true is the distance between specific MI and
481 /// specific ConstPool entry instruction can fit in MI's displacement field.
482 bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, MachineInstr *CPEMI,
484 unsigned PCAdj = AFI->isThumbFunction() ? 4 : 8;
485 unsigned UserOffset = GetOffsetOf(MI) + PCAdj;
486 // In thumb mode, pessmisticly assumes the .align 2 before the first CPE
487 // in the island adds two byte padding.
488 unsigned AlignAdj = AFI->isThumbFunction() ? 2 : 0;
489 unsigned CPEOffset = GetOffsetOf(CPEMI) + AlignAdj;
491 DEBUG(std::cerr << "User of CPE#" << CPEMI->getOperand(0).getImm()
492 << " max delta=" << MaxDisp
493 << " at offset " << int(UserOffset-CPEOffset) << "\t"
496 if (UserOffset <= CPEOffset) {
497 // User before the CPE.
498 if (CPEOffset-UserOffset <= MaxDisp)
500 } else if (!AFI->isThumbFunction()) {
501 // Thumb LDR cannot encode negative offset.
502 if (UserOffset-CPEOffset <= MaxDisp)
508 /// HandleConstantPoolUser - Analyze the specified user, checking to see if it
509 /// is out-of-range. If so, pick it up the constant pool value and move it some
511 bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn, CPUser &U){
512 MachineInstr *UserMI = U.MI;
513 MachineInstr *CPEMI = U.CPEMI;
515 // Check to see if the CPE is already in-range.
516 if (CPEIsInRange(UserMI, CPEMI, U.MaxDisp))
519 // Solution guaranteed to work: split the user's MBB right after the user and
520 // insert a clone the CPE into the newly created water.
522 MachineBasicBlock *UserMBB = UserMI->getParent();
523 MachineBasicBlock *NewMBB;
525 // TODO: Search for the best place to split the code. In practice, using
526 // loop nesting information to insert these guys outside of loops would be
528 bool isThumb = AFI->isThumbFunction();
529 if (&UserMBB->back() == UserMI) {
530 assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!");
531 NewMBB = next(MachineFunction::iterator(UserMBB));
532 // Add an unconditional branch from UserMBB to fallthrough block.
533 // Note the new unconditional branch is not being recorded.
534 BuildMI(UserMBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewMBB);
535 BBSizes[UserMBB->getNumber()] += isThumb ? 2 : 4;
537 MachineInstr *NextMI = next(MachineBasicBlock::iterator(UserMI));
538 NewMBB = SplitBlockBeforeInstr(NextMI);
541 // Okay, we know we can put an island before UserMBB now, do it!
542 MachineBasicBlock *NewIsland = new MachineBasicBlock();
543 Fn.getBasicBlockList().insert(NewMBB, NewIsland);
545 // Update internal data structures to account for the newly inserted MBB.
546 UpdateForInsertedWaterBlock(NewIsland);
548 // Now that we have an island to add the CPE to, clone the original CPE and
549 // add it to the island.
550 unsigned ID = NextUID++;
551 unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
552 unsigned Size = CPEMI->getOperand(2).getImm();
554 // Build a new CPE for this user.
555 U.CPEMI = BuildMI(NewIsland, TII->get(ARM::CONSTPOOL_ENTRY))
556 .addImm(ID).addConstantPoolIndex(CPI).addImm(Size);
558 // Compensate for .align 2 in thumb mode.
559 if (isThumb) Size += 2;
560 // Increase the size of the island block to account for the new entry.
561 BBSizes[NewIsland->getNumber()] += Size;
563 // Finally, change the CPI in the instruction operand to be ID.
564 for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i)
565 if (UserMI->getOperand(i).isConstantPoolIndex()) {
566 UserMI->getOperand(i).setConstantPoolIndex(ID);
570 DEBUG(std::cerr << " Moved CPE to #" << ID << " CPI=" << CPI << "\t"
576 /// BBIsInRange - Returns true is the distance between specific MI and
577 /// specific BB can fit in MI's displacement field.
578 bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB,
580 unsigned PCAdj = AFI->isThumbFunction() ? 4 : 8;
581 unsigned BrOffset = GetOffsetOf(MI) + PCAdj;
582 unsigned DestOffset = GetOffsetOf(DestBB);
584 DEBUG(std::cerr << "Branch of destination BB#" << DestBB->getNumber()
585 << " max delta=" << MaxDisp
586 << " at offset " << int(BrOffset-DestOffset) << "\t"
589 if (BrOffset <= DestOffset) {
590 if (DestOffset - BrOffset <= MaxDisp)
593 if (BrOffset - DestOffset <= MaxDisp)
599 /// FixUpImmediateBr - Fix up an immediate branch whose destination is too far
600 /// away to fit in its displacement field.
601 bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) {
602 MachineInstr *MI = Br.MI;
603 MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
605 // Check to see if the DestBB is already in-range.
606 if (BBIsInRange(MI, DestBB, Br.MaxDisp))
610 return FixUpUnconditionalBr(Fn, Br);
611 return FixUpConditionalBr(Fn, Br);
614 /// FixUpUnconditionalBr - Fix up an unconditional branches whose destination is
615 /// too far away to fit in its displacement field. If LR register has been
616 /// spilled in the epilogue, then we can use BL to implement a far jump.
617 /// Otherwise, add a intermediate branch instruction to to a branch.
619 ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) {
620 MachineInstr *MI = Br.MI;
621 MachineBasicBlock *MBB = MI->getParent();
622 assert(AFI->isThumbFunction() && "Expected a Thumb function!");
624 // Use BL to implement far jump.
625 Br.MaxDisp = (1 << 21) * 2;
626 MI->setInstrDescriptor(TII->get(ARM::tBfar));
627 BBSizes[MBB->getNumber()] += 2;
633 /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in the
634 /// specific unconditional branch instruction.
635 static inline unsigned getUnconditionalBrDisp(int Opc) {
636 return (Opc == ARM::tB) ? (1<<10)*2 : (1<<23)*4;
639 /// FixUpConditionalBr - Fix up a conditional branches whose destination is too
640 /// far away to fit in its displacement field. It is converted to an inverse
641 /// conditional branch + an unconditional branch to the destination.
643 ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
644 MachineInstr *MI = Br.MI;
645 MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
647 // Add a unconditional branch to the destination and invert the branch
648 // condition to jump over it:
654 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImmedValue();
655 CC = ARMCC::getOppositeCondition(CC);
657 // If the branch is at the end of its MBB and that has a fall-through block,
658 // direct the updated conditional branch to the fall-through block. Otherwise,
659 // split the MBB before the next instruction.
660 MachineBasicBlock *MBB = MI->getParent();
661 MachineInstr *BackMI = &MBB->back();
662 bool NeedSplit = (BackMI != MI) || !BBHasFallthrough(MBB);
666 if (next(MachineBasicBlock::iterator(MI)) == MBB->back() &&
667 BackMI->getOpcode() == Br.UncondBr) {
668 // Last MI in the BB is a unconditional branch. Can we simply invert the
669 // condition and swap destinations:
675 MachineBasicBlock *NewDest = BackMI->getOperand(0).getMachineBasicBlock();
676 if (BBIsInRange(MI, NewDest, Br.MaxDisp)) {
677 BackMI->getOperand(0).setMachineBasicBlock(DestBB);
678 MI->getOperand(0).setMachineBasicBlock(NewDest);
679 MI->getOperand(1).setImm(CC);
686 SplitBlockBeforeInstr(MI);
687 // No need for the branch to the next block. We're adding a unconditional
688 // branch to the destination.
689 MBB->back().eraseFromParent();
691 MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
693 // Insert a unconditional branch and replace the conditional branch.
694 // Also update the ImmBranch as well as adding a new entry for the new branch.
695 BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB).addImm(CC);
696 Br.MI = &MBB->back();
697 BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB);
698 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
699 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
700 MI->eraseFromParent();
702 // Increase the size of MBB to account for the new unconditional branch.
703 BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back());
708 /// UndoLRSpillRestore - Remove Thumb push / pop instructions that only spills
709 /// LR / restores LR to pc.
710 bool ARMConstantIslands::UndoLRSpillRestore() {
711 bool MadeChange = false;
712 for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) {
713 MachineInstr *MI = PushPopMIs[i];
714 if (MI->getNumOperands() == 1) {
715 if (MI->getOpcode() == ARM::tPOP_RET &&
716 MI->getOperand(0).getReg() == ARM::PC)
717 BuildMI(MI->getParent(), TII->get(ARM::tBX_RET));
718 MI->eraseFromParent();