1 //===- ARMCallingConv.td - Calling Conventions for ARM ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
9 // This describes the calling conventions for ARM architecture.
10 //===----------------------------------------------------------------------===//
12 /// CCIfSubtarget - Match if the current subtarget has a feature F.
13 class CCIfSubtarget<string F, CCAction A>:
14 CCIf<!strconcat("State.getTarget().getSubtarget<ARMSubtarget>().", F), A>;
16 /// CCIfAlign - Match of the original alignment of the arg
17 class CCIfAlign<string Align, CCAction A>:
18 CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
20 /// CCIfFloatABI - Match of the float ABI and the arg. ABIType may be "Hard" or
22 class CCIfFloatABI<string ABIType, CCAction A>:
23 CCIf<!strconcat("llvm::FloatABIType == llvm::FloatABI::", ABIType), A>;
25 //===----------------------------------------------------------------------===//
26 // ARM APCS Calling Convention
27 //===----------------------------------------------------------------------===//
28 def CC_ARM_APCS : CallingConv<[
30 CCIfType<[i8, i16], CCPromoteToType<i32>>,
32 // f64 is passed in pairs of GPRs, possibly split onto the stack
33 CCIfType<[f64], CCCustom<"CC_ARM_APCS_Custom_f64">>,
35 CCIfType<[f32], CCBitConvertToType<i32>>,
36 CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
38 CCIfType<[i32], CCAssignToStack<4, 4>>,
39 CCIfType<[f64], CCAssignToStack<8, 4>>
42 def RetCC_ARM_APCS : CallingConv<[
43 CCIfType<[f32], CCBitConvertToType<i32>>,
44 CCIfType<[f64], CCCustom<"RetCC_ARM_APCS_Custom_f64">>,
46 CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>,
47 CCIfType<[i64], CCAssignToRegWithShadow<[R0, R2], [R1, R3]>>
50 //===----------------------------------------------------------------------===//
51 // ARM AAPCS (EABI) Calling Convention, common parts
52 //===----------------------------------------------------------------------===//
54 def CC_ARM_AAPCS_Common : CallingConv<[
56 CCIfType<[i8, i16], CCPromoteToType<i32>>,
58 // i64/f64 is passed in even pairs of GPRs
59 // i64 is 8-aligned i32 here, so we may need to eat R1 as a pad register
60 // (and the same is true for f64 if VFP is not enabled)
61 CCIfType<[i32], CCIfAlign<"8", CCAssignToRegWithShadow<[R0, R2], [R0, R1]>>>,
62 CCIfType<[i32], CCIf<"State.getNextStackOffset() == 0 &&"
63 "ArgFlags.getOrigAlign() != 8",
64 CCAssignToReg<[R0, R1, R2, R3]>>>,
66 CCIfType<[i32, f32], CCAssignToStack<4, 4>>,
67 CCIfType<[f64], CCAssignToStack<8, 8>>
70 def RetCC_ARM_AAPCS_Common : CallingConv<[
71 CCIfType<[i32], CCAssignToReg<[R0, R1, R2, R3]>>
72 CCIfType<[i64], CCAssignToRegWithShadow<[R0, R2], [R1, R3]>>
75 //===----------------------------------------------------------------------===//
76 // ARM AAPCS (EABI) Calling Convention
77 //===----------------------------------------------------------------------===//
79 def CC_ARM_AAPCS : CallingConv<[
80 CCIfType<[f64], CCCustom<"CC_ARM_AAPCS_Custom_f64">>,
81 CCIfType<[f32], CCBitConvertToType<i32>>,
82 CCDelegateTo<CC_ARM_AAPCS_Common>
85 def RetCC_ARM_AAPCS : CallingConv<[
86 CCIfType<[f64], CCCustom<"RetCC_ARM_AAPCS_Custom_f64">>,
87 CCIfType<[f32], CCBitConvertToType<i32>>,
88 CCDelegateTo<RetCC_ARM_AAPCS_Common>
91 //===----------------------------------------------------------------------===//
92 // ARM AAPCS-VFP (EABI) Calling Convention
93 //===----------------------------------------------------------------------===//
95 def CC_ARM_AAPCS_VFP : CallingConv<[
96 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
97 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
98 S9, S10, S11, S12, S13, S14, S15]>>,
99 CCDelegateTo<CC_ARM_AAPCS_Common>
102 def RetCC_ARM_AAPCS_VFP : CallingConv<[
103 CCIfType<[f64], CCAssignToReg<[D0, D1, D2, D3, D4, D5, D6, D7]>>,
104 CCIfType<[f32], CCAssignToReg<[S0, S1, S2, S3, S4, S5, S6, S7, S8,
105 S9, S10, S11, S12, S13, S14, S15]>>,
106 CCDelegateTo<RetCC_ARM_AAPCS_Common>
109 //===----------------------------------------------------------------------===//
110 // ARM Calling Convention Dispatch
111 //===----------------------------------------------------------------------===//
113 def CC_ARM : CallingConv<[
114 CCIfSubtarget<"isAAPCS_ABI()",
115 CCIfSubtarget<"hasVFP2()",
117 CCDelegateTo<CC_ARM_AAPCS_VFP>>>>,
118 CCIfSubtarget<"isAAPCS_ABI()", CCDelegateTo<CC_ARM_AAPCS>>,
119 CCDelegateTo<CC_ARM_APCS>
122 def RetCC_ARM : CallingConv<[
123 CCIfSubtarget<"isAAPCS_ABI()",
124 CCIfSubtarget<"hasVFP2()",
126 CCDelegateTo<RetCC_ARM_AAPCS_VFP>>>>,
127 CCIfSubtarget<"isAAPCS_ABI()", CCDelegateTo<RetCC_ARM_AAPCS>>,
128 CCDelegateTo<RetCC_ARM_APCS>