1 //===-- ARMAsmBackend.cpp - ARM Assembler Backend -------------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #include "llvm/Target/TargetAsmBackend.h"
12 #include "ARMFixupKinds.h"
13 #include "llvm/ADT/Twine.h"
14 #include "llvm/MC/MCAssembler.h"
15 #include "llvm/MC/MCExpr.h"
16 #include "llvm/MC/MCObjectFormat.h"
17 #include "llvm/MC/MCObjectWriter.h"
18 #include "llvm/MC/MCSectionELF.h"
19 #include "llvm/MC/MCSectionMachO.h"
20 #include "llvm/Object/MachOFormat.h"
21 #include "llvm/Support/ELF.h"
22 #include "llvm/Support/ErrorHandling.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include "llvm/Target/TargetRegistry.h"
28 class ARMAsmBackend : public TargetAsmBackend {
30 ARMAsmBackend(const Target &T) : TargetAsmBackend() {}
32 bool MayNeedRelaxation(const MCInst &Inst) const;
34 void RelaxInstruction(const MCInst &Inst, MCInst &Res) const;
36 bool WriteNopData(uint64_t Count, MCObjectWriter *OW) const;
38 unsigned getPointerSize() const {
43 static unsigned adjustFixupValue(unsigned Kind, uint64_t Value) {
46 llvm_unreachable("Unknown fixup kind!");
48 case ARM::fixup_arm_movt_hi16:
49 case ARM::fixup_arm_movw_lo16:
51 case ARM::fixup_arm_pcrel_12: {
53 // ARM PC-relative values are offset by 8.
55 if ((int64_t)Value < 0) {
59 assert ((Value < 4096) && "Out of range pc-relative fixup value!");
63 case ARM::fixup_arm_branch:
64 // These values don't encode the low two bits since they're always zero.
65 // Offset by 8 just as above.
66 return (Value - 8) >> 2;
67 case ARM::fixup_arm_vfp_pcrel_10: {
68 // Offset by 8 just as above.
71 if ((int64_t)Value < 0) {
75 // These values don't encode the low two bits since they're always zero.
77 assert ((Value < 256) && "Out of range pc-relative fixup value!");
84 } // end anonymous namespace
86 bool ARMAsmBackend::MayNeedRelaxation(const MCInst &Inst) const {
87 // FIXME: Thumb targets, different move constant targets..
91 void ARMAsmBackend::RelaxInstruction(const MCInst &Inst, MCInst &Res) const {
92 assert(0 && "ARMAsmBackend::RelaxInstruction() unimplemented");
96 bool ARMAsmBackend::WriteNopData(uint64_t Count, MCObjectWriter *OW) const {
97 // FIXME: Zero fill for now. That's not right, but at least will get the
98 // section size right.
99 for (uint64_t i = 0; i != Count; ++i)
105 // FIXME: This should be in a separate file.
106 // ELF is an ELF of course...
107 class ELFARMAsmBackend : public ARMAsmBackend {
108 MCELFObjectFormat Format;
111 Triple::OSType OSType;
112 ELFARMAsmBackend(const Target &T, Triple::OSType _OSType)
113 : ARMAsmBackend(T), OSType(_OSType) {
114 HasScatteredSymbols = true;
117 virtual const MCObjectFormat &getObjectFormat() const {
121 void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
122 uint64_t Value) const;
124 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
125 return createELFObjectWriter(OS, /*Is64Bit=*/false,
127 /*IsLittleEndian=*/true,
128 /*HasRelocationAddend=*/false);
132 // Fixme: can we raise this to share code between Darwin and ELF?
133 void ELFARMAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
134 uint64_t Value) const {
136 // Fixme: 2 for Thumb
137 unsigned NumBytes = 4;
138 Value = adjustFixupValue(Fixup.getKind(), Value);
140 switch (Fixup.getKind()) {
141 default: assert(0 && "Unsupported Fixup kind"); break;
142 case ARM::fixup_arm_branch: {
143 unsigned Lo24 = Value & 0xFFFFFF;
147 case ARM::fixup_arm_movt_hi16:
148 case ARM::fixup_arm_movw_lo16: {
149 unsigned Hi4 = (Value & 0xF000) >> 12;
150 unsigned Lo12 = Value & 0x0FFF;
151 // inst{19-16} = Hi4;
152 // inst{11-0} = Lo12;
153 Value = (Hi4 << 16) | (Lo12);
158 assert((Fixup.getOffset() % NumBytes == 0)
159 && "Offset mod NumBytes is nonzero!");
160 // For each byte of the fragment that the fixup touches, mask in the
161 // bits from the fixup value.
162 // The Value has been "split up" into the appropriate bitfields above.
163 // Fixme: how to share code with the .td generated code?
164 for (unsigned i = 0; i != NumBytes; ++i) {
165 DF.getContents()[Fixup.getOffset() + i] &= uint8_t(Mask >> (i * 8));
166 DF.getContents()[Fixup.getOffset() + i] |= uint8_t(Value >> (i * 8));
171 // FIXME: This should be in a separate file.
172 class DarwinARMAsmBackend : public ARMAsmBackend {
173 MCMachOObjectFormat Format;
175 DarwinARMAsmBackend(const Target &T) : ARMAsmBackend(T) {
176 HasScatteredSymbols = true;
179 virtual const MCObjectFormat &getObjectFormat() const {
183 void ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
184 uint64_t Value) const;
186 MCObjectWriter *createObjectWriter(raw_ostream &OS) const {
187 // FIXME: Subtarget info should be derived. Force v7 for now.
188 return createMachObjectWriter(OS, /*Is64Bit=*/false,
189 object::mach::CTM_ARM,
190 object::mach::CSARM_V7,
191 /*IsLittleEndian=*/true);
194 virtual bool doesSectionRequireSymbols(const MCSection &Section) const {
198 } // end anonymous namespace
200 static unsigned getFixupKindNumBytes(unsigned Kind) {
202 default: llvm_unreachable("Unknown fixup kind!");
203 case FK_Data_4: return 4;
204 case ARM::fixup_arm_pcrel_12: return 3;
205 case ARM::fixup_arm_vfp_pcrel_10: return 3;
206 case ARM::fixup_arm_branch: return 3;
210 void DarwinARMAsmBackend::ApplyFixup(const MCFixup &Fixup, MCDataFragment &DF,
211 uint64_t Value) const {
212 unsigned NumBytes = getFixupKindNumBytes(Fixup.getKind());
213 Value = adjustFixupValue(Fixup.getKind(), Value);
215 assert(Fixup.getOffset() + NumBytes <= DF.getContents().size() &&
216 "Invalid fixup offset!");
217 // For each byte of the fragment that the fixup touches, mask in the
218 // bits from the fixup value.
219 for (unsigned i = 0; i != NumBytes; ++i)
220 DF.getContents()[Fixup.getOffset() + i] |= uint8_t(Value >> (i * 8));
222 } // end anonymous namespace
224 TargetAsmBackend *llvm::createARMAsmBackend(const Target &T,
225 const std::string &TT) {
226 switch (Triple(TT).getOS()) {
228 return new DarwinARMAsmBackend(T);
229 case Triple::MinGW32:
232 assert(0 && "Windows not supported on ARM");
234 return new ELFARMAsmBackend(T, Triple(TT).getOS());