1 //===-- ARM.h - Top-level interface for ARM representation---- --*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the entry points for global functions defined in the LLVM
13 //===----------------------------------------------------------------------===//
18 #include "llvm/Support/ErrorHandling.h"
19 #include "llvm/Target/TargetMachine.h"
24 class ARMBaseTargetMachine;
26 class MachineCodeEmitter;
28 class ObjectCodeEmitter;
29 class formatted_raw_ostream;
31 // Enums corresponding to ARM condition codes
33 // The CondCodes constants map directly to the 4-bit encoding of the
34 // condition field for predicated instructions.
53 inline static CondCodes getOppositeCondition(CondCodes CC){
55 default: llvm_unreachable("Unknown condition code");
74 inline static const char *ARMCondCodeToString(ARMCC::CondCodes CC) {
76 default: llvm_unreachable("Unknown condition code");
77 case ARMCC::EQ: return "eq";
78 case ARMCC::NE: return "ne";
79 case ARMCC::HS: return "hs";
80 case ARMCC::LO: return "lo";
81 case ARMCC::MI: return "mi";
82 case ARMCC::PL: return "pl";
83 case ARMCC::VS: return "vs";
84 case ARMCC::VC: return "vc";
85 case ARMCC::HI: return "hi";
86 case ARMCC::LS: return "ls";
87 case ARMCC::GE: return "ge";
88 case ARMCC::LT: return "lt";
89 case ARMCC::GT: return "gt";
90 case ARMCC::LE: return "le";
91 case ARMCC::AL: return "al";
95 FunctionPass *createARMISelDag(ARMBaseTargetMachine &TM);
96 FunctionPass *createARMCodePrinterPass(formatted_raw_ostream &O,
97 ARMBaseTargetMachine &TM,
99 FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
100 MachineCodeEmitter &MCE);
102 FunctionPass *createARMCodeEmitterPass(ARMBaseTargetMachine &TM,
103 MachineCodeEmitter &MCE);
104 FunctionPass *createARMJITCodeEmitterPass(ARMBaseTargetMachine &TM,
105 JITCodeEmitter &JCE);
106 FunctionPass *createARMObjectCodeEmitterPass(ARMBaseTargetMachine &TM,
107 ObjectCodeEmitter &OCE);
109 FunctionPass *createARMLoadStoreOptimizationPass(bool PreAlloc = false);
110 FunctionPass *createARMConstantIslandPass();
112 FunctionPass *createThumb2ITBlockPass();
114 } // end namespace llvm;
116 // Defines symbolic names for ARM registers. This defines a mapping from
117 // register name to register number.
119 #include "ARMGenRegisterNames.inc"
121 // Defines symbolic names for the ARM instructions.
123 #include "ARMGenInstrNames.inc"