1 //===-- SIRegisterInfo.cpp - SI Register Information ---------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the SI implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
15 #include "SIRegisterInfo.h"
16 #include "AMDGPUTargetMachine.h"
17 #include "AMDGPUUtil.h"
21 SIRegisterInfo::SIRegisterInfo(AMDGPUTargetMachine &tm,
22 const TargetInstrInfo &tii)
23 : AMDGPURegisterInfo(tm, tii),
28 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const
30 BitVector Reserved(getNumRegs());
34 const TargetRegisterClass *
35 SIRegisterInfo::getISARegClass(const TargetRegisterClass * rc) const
37 switch (rc->getID()) {
38 case AMDGPU::GPRF32RegClassID:
39 return &AMDGPU::VReg_32RegClass;
44 const TargetRegisterClass * SIRegisterInfo::getCFGStructurizerRegClass(
49 case MVT::i32: return &AMDGPU::VReg_32RegClass;