1 //===-- AArch64MCTargetDesc.h - AArch64 Target Descriptions -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file provides AArch64 specific target descriptions.
12 //===----------------------------------------------------------------------===//
14 #ifndef LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
15 #define LLVM_LIB_TARGET_AARCH64_MCTARGETDESC_AARCH64MCTARGETDESC_H
17 #include "llvm/Support/DataTypes.h"
21 class formatted_raw_ostream;
30 class MCSubtargetInfo;
35 extern Target TheAArch64leTarget;
36 extern Target TheAArch64beTarget;
37 extern Target TheARM64Target;
39 MCCodeEmitter *createAArch64MCCodeEmitter(const MCInstrInfo &MCII,
40 const MCRegisterInfo &MRI,
42 MCAsmBackend *createAArch64leAsmBackend(const Target &T,
43 const MCRegisterInfo &MRI, StringRef TT,
45 MCAsmBackend *createAArch64beAsmBackend(const Target &T,
46 const MCRegisterInfo &MRI, StringRef TT,
49 MCObjectWriter *createAArch64ELFObjectWriter(raw_ostream &OS, uint8_t OSABI,
52 MCObjectWriter *createAArch64MachObjectWriter(raw_ostream &OS, uint32_t CPUType,
56 createAArch64MCAsmStreamer(MCContext &Ctx, formatted_raw_ostream &OS,
57 bool isVerboseAsm, bool useDwarfDirectory,
58 MCInstPrinter *InstPrint, MCCodeEmitter *CE,
59 MCAsmBackend *TAB, bool ShowInst);
60 } // End llvm namespace
62 // Defines symbolic names for AArch64 registers. This defines a mapping from
63 // register name to register number.
65 #define GET_REGINFO_ENUM
66 #include "AArch64GenRegisterInfo.inc"
68 // Defines symbolic names for the AArch64 instructions.
70 #define GET_INSTRINFO_ENUM
71 #include "AArch64GenInstrInfo.inc"
73 #define GET_SUBTARGETINFO_ENUM
74 #include "AArch64GenSubtargetInfo.inc"