1 set(LLVM_TARGET_DEFINITIONS AArch64.td)
3 tablegen(LLVM AArch64GenRegisterInfo.inc -gen-register-info)
4 tablegen(LLVM AArch64GenInstrInfo.inc -gen-instr-info)
5 tablegen(LLVM AArch64GenMCCodeEmitter.inc -gen-emitter)
6 tablegen(LLVM AArch64GenMCPseudoLowering.inc -gen-pseudo-lowering)
7 tablegen(LLVM AArch64GenAsmWriter.inc -gen-asm-writer)
8 tablegen(LLVM AArch64GenAsmWriter1.inc -gen-asm-writer -asmwriternum=1)
9 tablegen(LLVM AArch64GenAsmMatcher.inc -gen-asm-matcher)
10 tablegen(LLVM AArch64GenDAGISel.inc -gen-dag-isel)
11 tablegen(LLVM AArch64GenFastISel.inc -gen-fast-isel)
12 tablegen(LLVM AArch64GenCallingConv.inc -gen-callingconv)
13 tablegen(LLVM AArch64GenSubtargetInfo.inc -gen-subtarget)
14 tablegen(LLVM AArch64GenDisassemblerTables.inc -gen-disassembler)
15 add_public_tablegen_target(AArch64CommonTableGen)
17 add_llvm_target(AArch64CodeGen
18 AArch64A57FPLoadBalancing.cpp
19 AArch64AddressTypePromotion.cpp
20 AArch64AdvSIMDScalarPass.cpp
22 AArch64BranchRelaxation.cpp
23 AArch64CleanupLocalDynamicTLSPass.cpp
25 AArch64ConditionalCompares.cpp
26 AArch64DeadRegisterDefinitionsPass.cpp
27 AArch64ExpandPseudoInsts.cpp
29 AArch64A53Fix835769.cpp
30 AArch64FrameLowering.cpp
31 AArch64ConditionOptimizer.cpp
32 AArch64ISelDAGToDAG.cpp
33 AArch64ISelLowering.cpp
35 AArch64LoadStoreOptimizer.cpp
36 AArch64MCInstLower.cpp
37 AArch64PromoteConstant.cpp
38 AArch64PBQPRegAlloc.cpp
39 AArch64RegisterInfo.cpp
40 AArch64SelectionDAGInfo.cpp
41 AArch64StorePairSuppress.cpp
43 AArch64TargetMachine.cpp
44 AArch64TargetObjectFile.cpp
45 AArch64TargetTransformInfo.cpp
48 add_dependencies(LLVMAArch64CodeGen intrinsics_gen)
50 add_subdirectory(TargetInfo)
51 add_subdirectory(AsmParser)
52 add_subdirectory(Disassembler)
53 add_subdirectory(InstPrinter)
54 add_subdirectory(MCTargetDesc)
55 add_subdirectory(Utils)